Switches: Implementation and Performance

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Last time: ATM

4 GFC 8 VPI 16 VCI 3 Ty pe 1 CLP 8 HEC (CRC-8) 384 (48 by tes) Pay load

(UNI)

GFC: generic flow control

Cell format

VPI: virtual path identifier

VCI: virtual circuit identifier Type: used for management (congestion, signaling, framing)

CLP: cell loss priority (what gets tossed in case of overload)

HEC: header error check Question: Why is it important to check the header for errors?
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Segmentation and Reassembly

IP
outgoing packet from upper layer

IP
incoming packet to upper layer

AAL

AAL

ATM Adaptation Layer

cells
ATM ATM

cells

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Virtual Path
Public network Network A Network B

VPI (8 bits): Establishes a path between two sites. VCI (16 bits): Establishes the connection between the endpoints in each of the two sites. Effectively what you have is a two-level hierarchy of VC connections. Switches in the public network do not have to deal with individual virtual circuits between two sites.
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The ATM Reference Model

The ATM reference model.

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The ATM Reference Model (2)

The ATM layers and sublayers and their functions.

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Physical Layer of ATM

ATM could run on top of any physical media in theory Most popular medium is the fiber optics network (e.g. SONET (Synchronous Optical Network)), the current most popular long distance network medium

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SONET
Time-division multiplexing (TDMA) 810-byte frame is transmitted every 125 u seconds (making it 8000 frames/sec, compatible with PCM channel in digital phone systems) The basic rate is thus 51.84 Mbps (810*8*8000 = 51.84 Mbps). This is called STS-1 for Synchronous Transport Signal 1. All SONET trunks are a multiple of STS-1
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Other Common Bandwidth

Service Electrical Optical DS 1 (T1) DS3 (T3) STS-1 OC-1 STS-3 OC-3 STS-12 OC-12 STS-24 OC-24 STS-48 OC-48
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Bandwidth 1.544 Mbps 44.736 Mbps 51.84 Mbps 155.250 Mbps 622.080 Mbps 1.244160 Gbps 2.488320 Gbps
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ATM and LAN

LAN is designed to have easy broadcast and multicast capability ATM is designed as a switch, not easy to broadcast or multicast To make the two inter-operable, two approaches
Re-design protocols that rely on broadcast (e.g. ARP has its sibling ATMARP) Have ATM emulate LAN

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Switches: Implementation and Performance

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Turn your old workstation into a new switch

I/O bus

Low cost.
CPU Interf ace 1

Flexibility.
Interf ace 2

Ease of programming.

Interf ace 3 Main memory

Good alternative to evaluate new protocols.

Question: What are the performance considerations? Question: How do you quantify the performance of a switch?
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Switch design
Control processor

Switch fabric Input port Output port

Control processor: Inspects packets and gives commands to the fabric.

Ports: Interface the switch with the outside world. Store information of where packets need to go. May pass control info to fabric or attach forwarding info to packets. Implement buffering (at input or output). Fabric: Pattern of interconnection between input and output ports.
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Input Buffering vs. Output Buffering

2 1 2 Switch Port 1 Port 2

Question: How does input buffering affect performance and fairness? Factoid: When output is uniformly distributed among all output ports, head-of-line blocking limits switch throughput to 59% of the theoretical maximum.
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Fabrics
Shared-bus: Implicit in workstations used as switches.
Questions: What is the impact of the shared-bus fabric on performance (latency and throughput)? What holds back these metrics?

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Fabrics
Shared-memory: Packets are read into memory by input ports and read from memory from output ports.
Questions: How are shared-memory switches similar to shared-bus switches? How do they differ?

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Fabrics
Crossbar: A matrix of nxn pathways that can connect any input port to any output port.
Each output port must be able to accept packets from all input ports at the same time. Question: What is the requirement of the memory bandwidth of each output port?

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Fabrics
Self-routing: Read the selfrouting header from each packet to determine the appropriate output port. Commonly built as a collection of 2x2 switching elements arranged in a regular pattern. This is one of the most scalable approaches to fabric design.
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Input port Switch f abric Output port

Original packet header (a)

Input port

Switch f abric

Output port

Self -routin g header (b)

Input port

Sw it ch f abric

Output port

(c)

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2x2 Switches and Banyan Networks

001 011 110 111 011 001

Each 2x2 switch inspects one bit in the self-routing header and sends a packet to the upper output if it found a 0 and to the lower output if it found a 1.
Question: What happens if two packets arrive at the same time and go to the same output?

110 111

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