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VLSI DESIGN

15TH TO 22ND SEPTEMBER 2001


ORGANIZED BY

ORIENTATION WORKSHOP ON

VISVESWARAIAH TECHNOLOGICAL UNIVERSITY, BELGAUM


&

B V B COLLEGE OF ENGINEERING & TECH., HUBLI


Getting Started with LASI: LAyout System for Individuals
Presentation By: Mr. AJAY J., Ms. KEERTI SHETTI (Student Tutors) & Mr. V D KULKARNI (Course Coordinator)
BVBCET,HUBLI, 2001

K L E SOCIETYS

Introduction to Lasi
This schematic presents a brief and colorful way in which to use the Lasi 6 package. Please be patient as you go through this presentation , any wrong clicks can lead to you missing out some slides which may be important. This presentation is prepared keeping the beginner in mind.
Enjoy your way through it
Click here to proceed

This is the first screen you see as soon as you click the shortcut. You can either edit a previous cell or create a new one. To edit or modify a previous cell click on list button. What happens is.

On clicking the above list appears. The list above shows the already available cells, but we are to create a new cell, so click the cancel button.

Lets now enter the name of the new file as inv_sch. This is a schematic entry as the name suggests. Now press the ok button to proceed.

On clicking ok it prompts for a rank of the cell. Lets name it 2. Now click ok button to proceed.

This is the screen that appears on your visual display unit. Lets now begin to draw the schematic design of the inverter. To do so,click on the obj button on the right of your screen

This list shows the rank 1 cells (specified in brackets) which can be added in a rank 2 cell. Double click on the PMOS_SCH...

This list shows the rank 1 cells (specified in brackets) which can be added in a rank 2 cell. Double click on the PMOS_SCH...

Now clicking on the add button and bringing the cursor into the screen you will find the outline of a box appearing on the screen as seen below. Place it somewhere on the screen, preferably above the origin (as indicated by the octagonal cursor point at the bottom of the screen).

Click here to proceed

We find that after placing the PMOS_SCH we still have the outline with us, in order to drop this click on the put button on the right side of the screen

Click here to proceed

Now similar to the previous instructions for placing a PMOS , place a NMOS exactly below the PMOS. However if the alignment is not right there is nothing to worry

Click here to proceed

Click on the Cget button and drag a rubber band around the required cell to be moved

Click here to proceed

When the cell gets selected click on the zoom button on the top of the screen and zoom into the area to be moved as will be seen in the next slide

Click here to proceed

Now click on the Mov button. (bottom right) Click the cursor on the place from where it is to be moved to the place to which it is to be moved.

Click here to proceed

Now click on Fit button (top) an then click on Aput button (bottom right),to fit the drawing in the screen and to deselect the selected cell.

Then click on the Draw button (top) to refresh the drawing. It is a good
practice to refresh the drawing every now and then and dont forget to save your drawing occasionally

To save your drawing click on the save button on the top...

As soon as you click the save button you see a window as shown. The instructions on the window are easily understood.

Click OK to save the cell

As per the previous instructions , insert the schematic symbol of the ground in the circuit

click here to proceed

In order to make the connections first right click on the screen till you get the Menu 1 tab on the top right corner. Now click on the Layr button to get the screen as seen below. Select the MET1 as shown below and click OK

Now back on the main screen click on the Obj tab and select POLY/PATH by double clicking it..

Now back on the main screen click on the Obj tab and select POLY/PATH by double clicking it..

Now make the connections as shown in the figure. In order to make the connections zoom into the area of interest and click on the initial point of the connection, then move to the final point and click again.

Then click on the Aput tab. Similarly make all the connections shown in the circuit.

Click here to proceed

Now well give the node texts to the various nodes. In order to do that right click on the screen till you get Menu2 on the top right corner. Click on the Tlyr tab to obtain the screen below. Select the NTXT (node text) and click OK

Now click on the Text tab and then click at the various nodes and give the texts as shown.

Also remember to connect the substrate of PMOS and NMOS to Vdd and GND respectively. This can be done by clicking on the vertex of the text at the substrate nodes.

Click here to proceed

Click on the Tlyr tab on the right of the screen and in the box below select CTXT . Then click OK...

Click on the text tab and give the connector texts as shown in this figure.

It must be taken care not to give same connector texts to more than one nodes. Also connector texts must be a number

Click here to proceed

From the Tlyr tab in the box below select DTXT (device text) and click OK

Insert the device texts as shown.

Note that the device texts are to be given inside the cell boundary. If the cell outline is not seen click ON the I button on the bottom of the screen and click Draw

Click here to proceed

Again from the Tlyr select the PTXT (Parameter Text) and click OK...

Click on the text button and add the parameter text to both the devices. Here again they must lie inside the cell outline

After adding the parameter texts refresh and save the circuit. Now click on the Sys button on the top of the screen

On clicking the Sys button we get the screen below.

Click on the LasiCkt button

On clicking we get a window as seen above. Click on the setup button.

The screen which appears is as seen. Here if the name of your circuit is on the name of the cell, then write the name of the header and footer file and click OK If the name of the cell is different then click on the list button and select your circuit from the list.

Click here to proceed

As soon as you flag it i.e. click go you find this screen appearing. After the compilation operation it reports as to whether there is any errors or not.

If there are no errors we can simulate the circuit in spice and check for the results.

We can view the circuit file or the report file as is required from the read button at the top left of the screen.

Click OK to proceed

We have just now found out how to draw a schematic of an inverter and to compile it to get a spice simulatable file. We shall now look at how to draw a layout for the same inverter and generate the spice simulatable circuit file.

Dont click on the dollar to proceed!!


( Click somewhere else )

Now click on the cell button to get the screen as shown.

You begin the same way as that of the schematic by writing the name of the file. Here the name inv_lay indicates that it is a layout design. Click on OK to proceed.

Here again we write the rank of the cell as rank 2 as we are going to use the standard transistors which are already made in rank one. If we wish to make our own transistors we can do that by creating a rank one cell.

Click on OK to proceed.

We click on the Obj button to get the screen shown, here we double click on the SFRAME...

We click on the Obj button to get the screen shown, here we double click on the SFRAME...

Now click the Add button and place the standard frame in such a way that the crosshairs of the cursor is exactly at the origin. This is to prevent the occurrence of any errors in the higher ranking cell where this circuit is called. Now click on the Put button to free the cursor.
Click on the Obj button to proceed

In this list select the P9X2 by double clicking it. This is a PMOS transistor of channel length 2 microns and channel width 9 microns.

Double click on the selected item

In this list select the P9X2 by double clicking it. This is a PMOS transistor of channel length 2 microns and channel width 9 microns.

Double click on the selected item

Now place the PMOS transistor in the N-well as shown and then click on the Put button to free the cursor
Click on the Obj button to proceed further.

Double click on the N3X2 i.e. NMOS transistor of channel length and width of 2 and 3 microns respectively.

Double click on the N3X2 i.e. NMOS transistor of channel length and width of 2 and 3 microns respectively.

Place the NMOS transistor in the Psubstrate and then click on the Layr button to get the screen shown. Select the POL1 (poly1) and click OK

Now in the main screen click on the Obj button and get the screen as shown. Double click on the BOX to select it.

Now in the main screen click on the Obj button and get the screen as shown. Double click on the BOX to select it.

Now make the connections as shown in the figure. You can see that there is a square bigger at the center of the connection. This is to take care of the design rule of placing the contact to connect a metal for the outside world

Now click on the Layr button to proceed.

Select the CONT (contact) to make the next connection and click OK

Zoom into the area of the square and place the contact as shown. Make sure that the contact is exactly 2 microns. Also that it is surrounded by POLY by at-least 2 microns.

Now click on the Layr button to proceed.

Select the MET1 (metal1) to make the next connection and click OK

Now draw a rubber band as shown in the figure to make the connections of the drain of the PMOS and NMOS transistors. Make sure that they are aligned properly. If not follow the same procedure used to align as used in the schematic.

Now make the connections for the input and output as shown. Make sure that the metal covers the contact by at-least 1 micron on all sides

Click above to proceed

Now make the connections of the Vdd and ground as shown in the figure

Click on the Layr button to proceed

Now we shall name the various nodes. To do that select NTXT from the Layr menu and click OK

Now name the various nodes as shown. Also remember to connect the substrate/body of the transistors. To do that zoom into the places pointed out by the arrows.

Click on the zoom button to proceed

Place the cursor exactly at the vertex of the text 4B indicated by a small rhombus and click to get the text box. Add Vdd or 0 for the PMOS or NMOS respectively

Click on Tlyr to proceed

From the Tlyr menu select the CTXT to name the various connectors. Click OK to proceed.

Click on the text button to add text and name the connector texts as shown in the figure. Now click on the save button to save the work

Save it in the same name and click OK to proceed.

To insert the device text select DTXT from Tlyr and click OK.

Insert the names of the devices as m1 and m2 as shown

Click on the Tlyr button to proceed

To insert the parameter text select the PTXT from the Tlyr menu and click OK

After naming the various required things refresh and save your drawing and now click the sys button.

First click on the LasiDrc button.

In this screen click on the setup button...

Now see if all the particulars in the respective text boxes are correct. Make the start check as 1 and finish check as 52 lambda size as 1um.

Click on the reset and fit buttons and then click OK

Click
hi

On clicking the go button we get a screen as shown. Listed below are the various checks being carried out. The process file supplied contains only 36 rules. On completion of all the checks successfully we get a message as to no flags set. However if there are any errors then it is shown by the number of flags set.

Click on the Sys button and get the screen as shown, now click on the LasiCkt button.

On this screen click on the setup button to proceed.

Make sure all the details written are correct. Meddle only with the name of the cell, header file and footer file. Also make sure that the rules is selected to circuit Click OK to proceed

On clicking the Go button we find this screen. Lasi compiles the circuit and if there are no errors it reports so. If there are any errors Lasi reports that too.

Click here to proceed

Now well find the various parasitic capacitance's. To do so firstly..

Click on the cap button on the Menu 2.

Here click on the manual mode and proceed further...

After clicking on the Manual button click on the top of the screen and draw a rubber band across till the bottom of the inverter.

Click on the inverter to proceed

On clicking on the bottom we get something like a wire mesh covering the whole diagram. This selects the area for capacitance measurements.

Click anywhere inside the mesh to proceed further.

Click on the Sys button and get this screen. Then click on LasiCkt button..

On the window which appears click on the Trace button...

Fill the relevant details as given in the technology file or ask your instructor for the rough capacitance values and fill them in the table.

Click OK to proceed

Now click on the Setup button and fill the details as done previously. Then click on Go button. Click me to proceed

We can see the various capacitance values written in the spice file. Click OK to proceed

With that we literally come to an end of the various ways in which in which a design can be made. We have deliberately chosen the design of the inverter as it is the fundamental unit and is the simplest to make.

Now let us take up an example of sub-circuit instantiation.

First we go in for the schematic and then the layout.

Click on the bulls-eye to proceed

We begin the same way by clicking on the cell button and then writing the name of the cell as shown here. We give the name as B2BINV_SCH meaning back to back inverter schematic. Then click OK

This has to be a rank 3 cell as we are calling a rank 2 cell (inverter) in it. Now click OK.

Im sure you know how to get these cells and place them!! By clicking the OBJ button and selecting the inv_sch and adding it.

Click on put to proceed.

Click here to proceed

Now take the MET1 from Layr and make the connections as shown in the figure.

Add the various node texts as shown here. It can be noted that we can give the same node text to the nodes made in this rank as that of the previous rank.

Click to proceed

Now give the various connector texts as shown. Note that connector texts are given only to the input, output and vdd.

Click to proceed

Now while giving the device texts take care to give it as X1,X2 and so on. This is because of the sub-circuit instantiation and spice understands only X as a sub-circuit call.

Click on any of the inverters to proceed

Now give the parameter texts same as the name of the rank2 cell, as illustrated in the figure below.

Click to proceed

Click on the Sys button and get the LasiCkt and compile the circuit as in the previous cases.

Click on Go to proceed

Now we will draw the layout connected back to back. This is similar to that by using schematics

Click on the fish to proceed!!


Hope you have not hooked more than what you can pull??

Need any explanation? Im sure you dont!!

Click OK to proceed

As always make the connections. Use MET1

Click on any inverter to proceed!!

Name the various nodes using node texts

Click on the question mark on top left to proceed.


You can use it in the package whenever you are struck.

Give the various connector and device and parameter texts.

Click on any of the command buttons on top to proceed.

Click on the Sys button an then run LasiDrc and then LasiCkt

Click here for some points to be noted

Make sure that before beginning a design in layout Dgrd (design grid) and Wgrd (working grid) both are one micron. If they are not click on Dgrd and Wgrd buttons repeatedly till we get one micron.
Please be thorough with all the design rules which are relevant to the design which you are making. Even-though Lasi allows you to make errors and then detects it for you, it is always better to know some of the rules. Also let there be some fundamental knowledge about spice, so that you can simulate and verify your design.