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Xilinx Embedded Development Kit

Xilinx Platform Studio (XPS) CPE 329 Winter 2004

Normal VHDL Flow

Design module Implement in VHDL Synthesize Download

XPS Flow
Design system Define hardware for system Setup software environment Write software to implement system Synthesize and compile system Download implementation


Define hardware

Specifically, create MHS file

MHS = MicroBlaze Hardware Specification

Add modules to system Define memory map Connect modules to buses Connect non-bus module I/O Set any necessary module parameters Define user constraints (pin-outs)


Setup Software Environment

Create MSS file

MSS = MicroBlaze Software Specification

Select interface level to devices Generate libraries and device drivers to use C code that implements system Use libraries and drivers generated previously Add source files to system

Write software


Synthesize and Compile

Generate netlists to synthesize Generate bitstream for download Compile system code and libraries Update bitstream with compiled code


Download bitstream

Define Hardware
Add/Edit Cores Dialog Boxes

Add Modules to System

Always add (for this course)

MicroBlaze module (microblaze) BRAM module (bram_module) 2 LMB BRAM controllers (lmb_bram_if_cntlr)
Data side and instruction side

Add other peripherals as necessary

GPIO (opb_gpio) Timer (opb_timer)

Change instance names if desired

Define Memory Map (1)

None for microblaze and bram_block modules Set address range for lmb_bram_if_cntlrs

Identical address ranges!

MicroBlaze is Harvard GNU compiler is Von Neumann

Base address is 0x00000000 High address is 0x00001FFF or lower

Define Memory Map (2)

Other modules have minimum memory requirements, set these appropriately No address ranges may overlap

LMB memory controllers are only exceptions

Put modules on each bus on a separate memory segment

LMB modules (memory) assigned in 0x00000000-0x00001FFF OPB modules assigned in 0x00002000-0xFFFFFFFF

Connect Modules to Buses (1)

Add buses to system

OPB: opb_v20_v1_10_b Data LMB: lmb_v10_00_a Instruction LMB: lmb_v10_00_a Rename buses if desired

Connect Modules to Buses (2)

Connect buses

Check box to create a connection

S: slave on bus M: master on bus MS: master and slave on bus

Do not connect instruction OPB (cpu iopb)

Connect BRAM to controllers

Select one port for each memory controller Rename connector if desired

Connect Module I/O (1)

Add all I/O pins to connect

I/O depends on module See documentation or lab assistant for necessary I/O to use Select first signal Hold Ctrl and select other signals Click Connect button

To connect multiple signals:

Net Names that are the same are connected External is visible outside system (to pins)

Connect Module I/O (2)

Add an external port for signals that are not part of a module I/O
Click Add Port button Give signal name (i.e., sclk) Give polarity based on signal use

OUT is output of system IN is input to system

Ignore Port Class (leave NONE) Connect to existing net (i.e., sys_clk)

Set Module Parameters

Select module from drop down list Values listed on right are default To change a value:

Select module and parameter Click the <<Add button Change parameter in left window Click on Open PDF Doc with module selected

See documentation for parameter info

Define User Constraints

Save in file with ucf extension (e.g., system.ucf) within data folder of main project folder Text file with one constraint (pin definition) per line Format for one signal: NET net_name LOC = pin#; Example: NET sys_clk LOC = B8; Format for a signal within a vector: NET net_name<num> LOC = pin#; Example: NET led_pin<0> LOC = C15; pin# is found from documentation or lab assistant

Setup Software Environment

Device Driver Interface

Each module may have multiple interfaces

0 is a very low level (register-level) interface 1 is a higher level (system call-level) interface Right click on module name Set Interface Level to desired value Set Interface Level of MicroBlaze to 1

Open S/W Settings for each module

Generate Libraries and Drivers

Click on toolbar button => or select from Tools menu Check for errors Most warnings can be ignored

Write Software

Write Software

Implement system functionality in C code Use the libraries and drivers generated previously when applicable

Driver API depends on interface level Check documentation and generated files for information and and API description Example: my_code in main project directory Do NOT store source files in code directory within MicroBlaze directory

Save source files in a directory you create

Add Source Files to Project

Click Add Program Sources button Select source file to add Click Open You may wish to compile code to make sure it is syntactically correct

Compile =>
or run from Tools menu

Synthesize and Compile System


Generate net list for system

XPS generates VHDL for system Modules generated based on system definition

Generate bitstream for download

Synthesizes VHDL and libraries Creates format to use in iMPACT


Compile code, if not done previously

Update bitstream

BRAMs initially empty Updating places compiled code in correct memory locations of BRAM

Code Size

If compilation is successful the size of your compiled code is shown The code size must be small enough to fit in the BRAM block If the HEX entry (code size in hexadecimal) is larger than the HIGHADDR of the memory controllers, then your code will not fit

Restructure code to decrease size Ask lab assistants for hints if needed


Download Design (1)

Use iMPACT tool

Same as when using ISE Only operation not performed in XPS

Connect JTAG and power to board Open iMPACT

Select Configure Devices => Click Next Select Boundary-Scan Mode => Click Next Select Automatically connect => Click Next

A single device should appear

Download Design (2)

Assign program file

implementation/download.bit file NOT system.bit (before updating bitstream)

Ignore the warning about wrong identification Right-click device and select Program

Make sure Verify is UNchecked

When done your system should be running!


Define hardware for system Setup software environment for program Write software to implement functionality Synthesize and compile system Download implementation
Repeat the steps if the system is changed