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if (n > 0) { } else { }
While loop
while (s != NULL) { }
Others
Comparison Instructions
To set up conditions in CR or XER bits
Compare signed word and unsigned word cmpw r3, r4 ; set CR0 as for signed r3-r4 cmplw r3, r4 ; set CR0 as for unsigned r3-r4 Cmplw: compare logical Compare using immediate values
cmpwi r3, 200 ; set CR0 as for signed r3-200
Comparison may specify which CR field to use cmpw cr3, r3, r4 ; set CR3 instead of CR0 cmplwi cr2, r3, r4 ; logical and using immediate ; and set CR2 cmpw cr0, r3, r4 ; equivalent to cmpw r3, r4
Conditional branches
Target address
Unconditional Branches
Unconditional branches
(-4)
The target loop is specified as an offset from the curren instruction (PC-relative).
Conditional Branches
Commonly used branches Use condition register CR0 LT, GT, EQ, SO Common forms: ble target_address
ble: branch if less then or equal GT=0 blt: branch if less then LT=1 beq: branch if equal EQ=1 bne: branch if not equal EQ=0
Conditional Branches
Using CR fields bne cr2, target
; branch if EQ of CR2 is zero
Example: using branch with comparison instructions loop: addi r3, r3, 1 ; increase r3 cmpw r3, r4 ; compare r4 bne target ; branch if r3 != r4 Example: using different CR field loop: addi r3, r3, 1 ; increase r3 cmpw cr3, r3, r4 ; compare using cr3 bne cr3, target ; branch if r3 != r4
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PC-relative: next PC = PC + EXTS(PC-Offset || 0b00) Absolute: next PC = EXTS(PC-Offset || 0b00); Register: next PC = value of register
Why sign-extension of an address (for absolute)? Are addresses ever negative? Upper address space usually reserved for I/O addresses (say oxff000000 onwards). 0xff00 gets sign-extended to 0xffffff00.
Underlying Details
Instruction format
bx
bcx bclrx bcctrx
0-5 18 16
6-10 BO
11-15 PC-Offset BI
16-29 BD
30 31 AA LK AA LK
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19
BO
BO
BI
BI
00000
00000
16
528
LK
LK
bx: encodes 24-bit address (26-bit effective) bcx: encodes 14-bit address (16-bit effective) bclrx: uses LR register as target address bcctrx: uses CR register as target address x: representing AA and LK bits, e.g. l, a, la
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Instruction Fields
bcx
Underlying Details
16 BO BI BD AA LK
BO: Branch options Encodes branching on TRUE or FALSE or on CTR values BI: Index of the CR bit to use five bits index to 32 CR bits, 3-bit for CR index, 2-bit to select LT, GT, EQ, or SO BD: Branch displacement 14-bit (16-bit effective), signed-extended AA: absolute address bit 1 use absolute addressing; 0 use PC-relative addressing LK: link bit 1 update LR with PC+4; 0 do not update
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BO and BI Fields
Underlying Details
Frequently used BO encoding in bc, bclr, and bcctr
BO=00100 (4): branch if the condition is false BO=01100 (12): branch if the condition is true BO=10100 (20): branch always BO=10000 (16): decreases CTR then branch if CTR!=0
Examples:
blt target_addr bc 12, 0, target_addr blt cr3, target_addr bc 12, 12, target_addr blr bclr 20, 0: unconditional branch to addr in LR bnelr target_addr bclr 4, 2: branch to LR if not equal
Explanation: bc 4, 14, target_addr: branch if bit 14 in CR (CR3[EQ]) is false (because BO=4) bne cr3, target_addr
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AA and LK fields
bx
bcx bclrx bcctrx 0-5 18 16
Underlying Details
6-10 BO 10-15 Offset BI BD 16-29 30 31 AA LK AA LK
19
19
BO
BO
BI
BI
00000
00000
16
528
LK
LK
Branch examples using AA and LK bits (zeros by default) bl target_addr ; branch and save PC+4 in LR ba target_addr ; branch using absolute addressing bla target_addr ; branch using absolute addressing ; and save PC+4 in LR
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parent_func
2. 3.
PC <= LR
child_func
blr
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C Arithmetic Expressions
Basic operations static int sum; static int x1, x2; static int y1, y2; sum = (x1+x2)(y1+y2)+100;
Assembly
lwz lwz add lwz lwz add subf addi stw
r3, 4(r13) r0, 8(r13) r4, r3, r0 r3, 12(r13) r0, 16(r13) r0, r3, r0 r3, r0, r4 r0, r3, 100; r0, 0(r13)
; ; ; ; ; ; ; ; ;
load x1 load x2 x1+x2 load y1 load y2 y1+y2 minus add 100 store sum
C Arithmetic Expressions
Sign extension static short sum; static short x1, x2; static short y1, y2; sum = (x1+x2)(y1+y2) + 100; Assembly
lha lha add lha lha add subf addi sth r3, 2(r13) r0, 4(r13) r4, r3, r0 r3, 6(r13) r0, 8(r13) r0, r3, r0 r3, r0, r4 r0, r3, 100 r0, 0(r13) ; ; ; ; ; ; ; ; ; load x1 load x2 x1+x2 load y1 load y2 y1+y2 minus add 100 store sum
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If-then-else C Program
if (x > y) z = 1; else z = 0;
Notes:
Code generated by CodeWarrior and then revised x r3; y r4; z r31 li r31, 1 => addi r31, 0, 1; li called simplified mnemonic
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If-then-else
C Program static int x, y; static int max; if (x y > 0) max = x; else max = y;
Assembly lwz r4, 0(r13) ; load y lwz r0, 4(r13) ; load x subf r0, r4, r0 ; x-y cmpwi r0, 0x0000 ; x-y>0? ble skip1 ; no, skip max=x lwz r0, 0(r13) ; load x stw r0, 8(r13) ; max=x b skip2 ; skip max=y lwz r0, 4(r13) ; load y stw r0, 8(r13) ; max=y
skip1: skip2:
Notes:
Generated by CodeWarrior and then revised Can you optimize the code? i.e. reduce number of instruction but produce the same output
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If-then-else
Binary code
Assembly Source: Disassembled code: Address Binary 00000048: 7C001800 0000004C: 4081000C 00000050: 3BE00001 00000054: 48000008 00000058: 3BE00000 0000005C: Assembly cmpw ble li b li r0,r3 *+12 r31,1 *+8 r31,0
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For loop
C code static int sum; static int X[100]; int i; sum = 0; for (i = 0; i < 100; i ++) sum += X[i];
Assembly
li r0, 0 ; sum = 0 ; sumr31 stw r0, 0(r13); ; sum = 0 li r31, 0 ; ir31 b cmp_ ; loop: slwi r4, r31, 2 ; r4=i*4 lis r3, X@ha ; load X address ori r3, r3, X@lo ; load X address add r3, r3, r4 ; X[i] address lwz r4, 0(r3) ; load X[i] lwz r0, 0(r13) ; load sum add r0, r0, r4 ; sum+=X[i] stw r0, 0(r13) ; store sum addi r31, r31, 1 ; increase i cmp_: cmpwi r31, 0x0064 ; 0x64 = 100 blt loop (generated by CodeWarrior and then revised)
Exercise: (1) How many instructions will be executed? (2) Optimize the code to reduce the loop body to 4 instructions; (3) further reduce the loop body to 3 instructions. Loop body includes the branch instruction.
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