By Y. Anil Kumar 13331D5701 M.

TECH (1/1)

Why MOSFET? Large signal analysis

Triode Saturation Cutoff

Small signal analysis

Common Source Common Drain Common Gate

High power JFETs are not common. Enhancement mode is not possible in a JFET, i.e. the gate bias has to be below the source voltage, ( depletion mode) which is awkward for simple power supply arrangements. Hence JFET are not suitable for logic gates. The gate is insulated electrically from the channel, no current flows between the gate and the channel, no matter what the gate voltage is. Thus, the MOSFET has practically infinite impedance . This makes MOSFETs useful for power amplifiers.

MOS metal-oxide-semiconductor structure. MOSFET is a four-terminal device: gate (G), source (S), drain (D) and body (B). The device size (channel region) is specified by channel width (W) and channel length (L). Two kinds of MOSFETs: n-channel (NMOS) and p-channel (PMOS) devices The device structure is basically symmetric in terms of drain and source. Source and drain terminals are specified by the operation voltage.

Consider the channel between drain and source as a series of resistors, source is grounded and Vds is connected to drain, so the voltage at each pint along y-axis is given by VGS - VDS(y) At the point VDSsat = VGS - Vt , the channel is pinched off at the drain side. Increasing VDS beyond this value has little effect on the channel shape and iD saturates at this value. Triode region: VDS < VGS - Vt Saturation region: VDS VGS - Vt

Drain current in triode region is

Drain current in saturation region is given by making VDS = VGS - Vth

Transconductance gm is given by

Cutoff : VGS = 0 Sub threshold : 0 < VGS < Vt Sub threshold region is useful in low power, low frequency, and low speed applications Example : Biomedical applications like heart beat measurement, blood pressure measurement

The expression we derived for saturation region assumed that the pinch-off point remains at the drain and thus iD remains constant. In reality, the pinch-off point moves slightly away from the drain: Channel-width Modulation

Recall that Drain-Body and Source-Body diodes should be reversed biased. We assumed that Source is connected to the body (VSB= 0) and VDS = VDB> 0 In a chip (same body for all NMOS), it is impossible to connect all sources to the body (all NMOS sources are connected together. Thus, the body (for NMOS) is connected to the largest negative voltage (negative terminal of the power supply). Doing so, changes the threshold voltage (called Body Effect)

Low frequency model: At low frequencies the capacitors can be neglected

High frequency model: At high frequencies the capacitors need to be taken into account

Common source configuration serves as the gain stage. The disadvantage is high output impedance. BTW, to be a good voltage amplifier, we want Rin large, Ro small and Avo large. Feedback (Rs)lowers the gain of the stage, compared to a pure common-source configuration. However, the benefit is an increased linearity and better high frequency behavior. Common drain (Source Follower) configuration acts as a voltage buffer. It provides no gain, but has low output impedance. It is typically the last stage in a multi-stage amplifier.

This amplifier provides gain and is useful when a specific (low) Rin is required. This is, e.g., the case when the impedance needs to be matched, as with transmission lines (e.g. to 50 ). Another application of the CG configuration is that it acts as a current buffer (current gain close to unity, small Rin, large Rout).