LTE Physical Layer

Supervised By Prof :

AHMED YAHIA

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Prepared by
Ahmed Abdel-kader Mahmoud Ahmed Mahmoud Abdel-rahman Sabry Abdullah Mohamed Mahmoud Mohsen Mohamed Hesham Mohamed Refaat Yaser Mohamd Osman 2
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Acknowledgement
Any attempt at any level cannot be satisfactorily completed without the will of God and the support and guidance of learned people. We would like to express our immense gratitude to Dr. Ahmed Yahia for his constant support and motivation that has encouraged us to come up with this project. 3
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CONTENTS

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Introduction To Mobile Communication

Cellular concept. Access techniques. Switching techniques. 1st generation. Why 2nd generation ?

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Cellular Concept

Frequency reuse Reuse distance Increasing capacity Clusters

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Cell Types
Cell classifications:
Macro cell. ( 1 Km: 35km) Micro cell..(100m to- 1Km)

Pico cell.....(10m)
Umbrella cell.(random)

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Multiple Access Techniques

TDMA CDMA

f
FDMA OFDMA

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Switching techniques:
Circuit Switching
Channel for one user

Packet Switching
Channel for multiple users

One path
Fixed bit rate Billing by time Used for real time application

Multiple path
Variable bit rat Billing by volume Used for data transfer

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1st generation features:

Introduced to commercial uses in early of 1979 & late of 1980 Analog technology Not compatible system : such as American system (AMPS) uses 800 MHZ and Germany system (c450) used 450 MHZ so no roaming Access technique (FDMA) Duplex technique (FDD)
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Mobile Communication Evolutions

UMTS EDGE GPRS

LTE

GSM
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GSM
Global System For Mobile Communication

Features.
Frequency

band. Network architecture.

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Features:
Access techniques: FDMA / TDMA.
Operating frequency: (900 1800 1900) MHz .

FDD.

8 time slot / carrier.

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Features:
Cellular concept: frequency reuse. Circuit switching.

Data rate: 9.6 Kb/s.

Hard handover
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GSM frequency band:

Uplink Guard band Downlink

890 MHz

915 MHz

935MHz

960 MHz

Channel B.W= 200 KHz carriers = 25 MHz / 200 KHz = 125 carrier

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GSM Spectrum Allocation :

CH 124 0 1 2 3 4 5 6 7 0 1

CH 3 CH 2 CH 1 0 0 1

0 1 2

1 2 3

2 3 4

3 4 5

4 5 6

5 6 7

6 7 0

7 0 1

0 1

Time

Time slot = 0.577 ms Frame duration = 0.577 ms * 8 = 4.616 ms

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Network Architecture GSM

EIR AUC VLR HLR

SMC

IWF

BTS BTS

BTS BTS

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GPRS General Packet Radio Services:

Features. New services. Network Architecture. Network service area.
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:Features
Various new coding schemes with transmission rates up to 21.4 Kb/s per physical channel. Theoretical transmission rate up to 171.2 Kb/s.

Packet & circuit switching.

GPRS enables point-to-point transmission and volume dependent charging.

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Features

Access techniques : TDMA/FDMA.

Duplex techniques : FDD.

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Services offered
Always on internet access. Multimedia messaging service (MMS). Internet applications for smart devices through wireless application protocol (WAP). Point-to-point (PTP) service : inter-networking with the internet (IP).

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Network Architecture Of GPRS

E I R A U C V L R H L R

BTS/

BTS/

BSC/ PCU

IP Network

Backbone Network IP

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CDMA
Code Division Multiple Access

Types Of Spread Spectrum Power Control

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Types Of Spread Spectrum

Direct sequence spread spectrum Frequency hopping spread spectrum Time hopping spread spectrum

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UMTS
Universal Mobile Telecommunication System

Features. Frequency band. Network architecture.

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UMTS Features
Wide band CDMA
Frequency band 2100 MHz
Chip rate 3.84 Mc/s
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Channel bandwidth 5MHz

UMTS Features
Channelization codes (4x4 512 x512) OVSF codes

Rake receiver

Soft and softer hand over

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UMTS Features
Inter system hand over Macro diversity

Variable rate (AMR) Vo-coder

Closed loop power control

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Network Architecture UMTS

GSM BSS E I R
BTS BTS

A U C

V L R

H L R

BSC

Node B Node B

RNC

IP Network

Node B Node B

RNC Core Network

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CGF
Billing System
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UTRAN

Long Term Evolution

LTE Specifications Frequency Band LTE Targets LTE Network Architecture Orthogonal Frequency Division Multiplexing
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LTE Specifications
Digital technology Cellular concept

OFDMA Downlink.

SC-FDMA Uplink.
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LTE Specifications
VOIP Technology. Frequency Band 2600MHz

Channel Bandwidth Up To 20MHz

MIMO Technology (2 x 2) or (4 x 4)

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LTE Specifications
Packet Switching.

IP V6

FDD or TDD

New applications IP-TV, video streaming, HD video

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LTE Frequency Band

FDD Uplink TDD band FDD Downlink

2500MHz

2570MHz

2620MHz

2690MHz
15 KHZ

Channel bandwidth 5MHZ to 20 MHZ Bit Rate 100 Mbps up to 1 Gbps Sub carrier spacing 15 KHZ 35
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LTE Network Architecture

Services
External networks: Operator services (e.g. IMS) and internet

PCRF

P-GW

HSS

EPC

S-GW

MME

E-UTRAN
eNode B eNode B

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LTE Targets
Increasing User Throughput
Increasing Spectral Efficiency

Increasing Number Of Subcarrier

15 KHZ

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LTE Targets
Decreasing Latency Factor

MSC BSC BTS

GSM

MSC BSC BTS

MSC RNC
Node B

MSC RNC
Node B

S-GW

S-GW

eNode B

eNode B
LTE 38
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UMTS

Basic channel access modes

Transmit Antennas

The Radio Channel

Receive Antennas

Transmit Antennas

The Radio Channel

Receive Antennas

SISO
Single Input Single Output

SIMO

Single Input Multiple Output (Receive diversity)

MISO

MIMO

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Multiple Input Single Output (Transmit diversity) Multiple Input Multiple Output 11/29/2013 (Multiple data streams)

MIMO
Transmitting multiple data streams in the same space and time used to be called interference! So how does MIMO work?
1. MIMO capacity gains come from taking advantage of spatial diversity in the radio channel 2. The performance can be optimized using precoding

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Multiple Input Multiple Output

OFDMA
Orthogonal Frequency Division Multiplexing

OFDM is a spectrally efficient modulation technique ,It is conveniently implemented using IFFT and FFT operations Bandwidth W being divided into K sub-carriers, leading to carrier spacing f, satisfying f =W/K Symbol duration T satisfying T = 1/f 41
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Sc-Fdma
For the LTE uplink, a different concept is used for the access technique. Although still using a form of OFDMA technology, the implementation is called Single Carrier Frequency Division Multiple Access (SCFDMA).One of the key parameters that affects all mobiles is that of battery life. Even though battery performance is improving all the time, it is still necessary to ensure that the mobiles use as little battery power as possible

SC-FDMA

Multi Path Propgation

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Cyclic prefix insertion

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FAST FOUREER TRANSFORM

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GPRS

EDGE

WCDMA

HSDPA

LTE 100 Mbps

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Hard ware design

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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 48
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

1 0 1 1 0 1 0 0
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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

Convolutional Encoder
1 +
Input
c2

Output

0
c1

+ 1 1 1 51
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Convolutional Encoder
1

+
Input
c2

Output

0
c1

+ 0 1 0 1 52 1
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Convolutional Encoder
0 +
Input
c2

Output

1
c1

0
0 0 1 0 1 53 1
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Convolutional Encoder
0 +
Input
c2

Output

0
c1

+
1 0 0 1 0 0 1 0 1 54 1
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Convolutional Encoder
1 +
Input
c2

Output

1
c1

+
0 0 1 0 0 1 0 0 1 0 1 55 1
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Convolutional Encoder
0

+
Input
c2

Output

1
c1

+ 0 0 0 0 1 0 0 1 0 0 1 0 1 56 1
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Convolutional Encoder
1 +
Input
c2

Output

0
c1

+ 0 1 0 0 0 0 1 0 0 1 0 0 1 0 1 1 57
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Convolutional Encoder
1 +
Input
c2

Output

1
c1

1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 0 0 1 0 0 58 1 0 1 1
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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 59
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

INTERLAEVER
1 1 1 0

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INTERLAEVER
1 0 1 0 1 0 0 1

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OFDM Transmitter

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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 63
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

OFDM Transmitter

S/P S/P

IFFT
CP Insertio n

p/s

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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 65
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

OFDM Receiver
1

1 0 1
FFT

s/p

CP removal

0 0 1 0

S/P

01 001 011

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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 67
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

DE-INTERLEAVER
1 1 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 0 1 0 1 0 0 1

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Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 69
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

VITERBI DECODER
11 00 01 00 00 00 10 00 10 00 00 00 01 00 11 00

a (00)
11 11 11 11 00 11 11 00 11 11 00 01 10 10 01 11 11 00 01 10 10 01 11 11 00 01 10 10 01 11 11 00 01 10

b (01)

c (10)

01 10

01 10 10

01
10 10

d (11)
01

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10 01

01

Viterbi decoder with error

1
10 00

0
01

1
00

1
10

0
10

1
01

0
01

0
11

3
00

4
00

5
00

3
00

a (00)
11

00

00

00

11

11

11

11

11

11

11 11 00 01 2 00 01 10

b (01)

2
11

4
11 00 1

3
11 00 4

4
11 00 4 01 5 10

5
11 00 2 01 10

c (10)

01 1 10

01 10

3 4

01 4
10

4 5

10

3
10 10

1 3 3
10

5
10

d (11)

10

3
01

1
01

6
01

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10 01

01

01

Data format

Convolutional Encoder

Interleaver

S/P

IFFT

p/s
CP Insertion

Channel interface

Channel

C P R E M O V a

Channel interface

s/p 72
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Data deformat

Viterbi Decoder

DEInterleaver

p/s

FFT

1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0

DATA DE-FORMATION

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VHDL VHSIC Hardware Description Language

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VHDLs Organization
The basic VHDL model is known as a Design Entity and has two parts
Interface - denoted by keyword entity defines I/O signals for the model Body - denoted by keyword architecture describes how the model works
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VHDL (Xor) Example

Interface

entity XOR2_OP is -- Input/Output ports port (A, B : in BIT; Z : out BIT); end XOR2_OP;

Body

architecture EXD of XOR2_OP is -- declarations go before begin begin Z <= A xor B; end EXD

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Interleaver code
entity interleaver is Port ( clk : in rst : in input : in output : out end inter;

STD_LOGIC; STD_LOGIC; STD_LOGIC; STD_LOGIC);

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Architecture part
architecture Behavioral of interleaver is signal temp1 : std_logic_vector (3 downto 0); signal temp2 : std_logic_vector (3 downto 0); signal temp3 : std_logic_vector (3 downto 0); signal temp4 : std_logic_vector (3 downto 0);
x1

x2

x3

x4

signal x1 signal x2 signal x3 signal x4

: std_logic_vector (3 downto 0); : std_logic_vector (3 downto 0); : std_logic_vector (3 downto 0); :std_logic_vector (3 downto 0);

temp 1 temp 2 temp 3 temp 4

signal y : std_logic_vector (15 downto 0); signal count1 : std_logic_vector (4 downto 0); signal count2 : std_logic_vector (4 downto 0);

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Architecture part
begin process (clk,rst,input) begin if rst = '1' then output <= '0'; count1 <= "00000"; count2 <= "00000"; 79
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Architecture part
elsif rising_edge (clk) then if count1 < "10001" then temp1 <= input & temp1 (3 downto 1); temp2 <= temp1(0) & temp2 (3 downto 1); temp3 <= temp2(0) & temp3 (3 downto 1); temp4 <= temp3(0) & temp4 (3 downto 1); x1 <= temp1(0) & temp2(0) & temp3(0) & temp4(0); x2 <= temp1(1) & temp2(1) & temp3(1) & temp4(1); x3 <= temp1(2) & temp2(2) & temp3(2) & temp4(2); x4 <= temp1(3) & temp2(3) & temp3(3) & temp4(3); count1 <= count1 + 1 ; end if;

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Architecture part
if count1 = "10001" then y <= x1 & x2 & x3 & x4 ; count1 <= "00000"; end if; if count2 < "10001" then output <= y(0); y <= '0' & y (15 downto 1); count2 <= count2 + 1 ; else count2 <= "00000"; end if; end if; end process; end Behavioral;

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Simulation

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Data formation PISO

Data Format block behave as parallel in serial out (PISO) register which converts the input with parallel form to the output with serial form. It adds tail of Zeros to the input data. It generates the required signals for convolutional encoder.

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Data formation

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Parallel to serial module

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Convolutional encoder
We have used R = , K=3. It is used to encode each 1 bit into 2 bits for error detection and correction purposes.

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Convolutional encoder simulation

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Interleaver
Randomizes The Sequence of Data By Storing It Row by Row & Retrieving It Column by Column For Error Isolation

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Interleaver Simulation

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Data deformation SIPO

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serial to Parallel module

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Data de-formation

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FPGA
Xilinx XC3S500E Spartan-3E FPGA Up to 232 user-I/O pins Over 10,000 logic cells 2-line,16-character LCD screen 50MHz clock oscillator

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Future work Suggestions

Channel Estimation Improvement The next step in improvement would be use a channel estimator that utilizes channel statistics,which known as minimum mean-squared error estimation (MMSE). Developing other modules For the future works, it is suggested to develop other modules such as advanced error correction teqniques, QAM or QPSK modulation RF part. These modules will make a complete set of OFDM system for transmitter and receiver. 94
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Conculosion

Presenting the way for people in the past to communicate Presenting the creation of mobile phone starting from the 2nd Generation which is called Global system for mobile communication (GSM) The progresses that happened to make it better by using the General Packet Radio Service (GPRS). Presenting the birth of the 3rd Generation that enables all subscribers to send and receive lager amount of data than GSM including pictures, faxes, e-mails and internet browsing. The real revolution of mobile communications occurs by the invention of the CDMA in USA and the Universal Mobile Telecommunication System (UMTS) in Europe. Enabling all subscribers to hold video calls and support them by offering larger capacity for data rate and multimedia messages. Finally, Presenting the 4th generation including LTE, and UMB increases the transmission rate with much higher quality.

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Thanks all

To Parctical Part.
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