Welcome to Our Presentation

G-1

Internal Architecture of 8086 Microprocessor

Presented by
Md. Md. Ashek-E- Elahi Md. Shahabub Arefin Chowdhury Md. Abu Bakar Siddique Md. Mokaddes Ali 07105003 07205007 08105104 08105029

G-1

Contents
Introduction Execution Unit

Basic Architecture of 8086

Bus Interface Unit (BIU) Instruction Queue

Control System and Instruction Decode

Flags General Purpose Register

Internal Part of the 8086 Microprocessor Arithmetic Logic Unit (ALU)

Segment register
Instruction Pointer (IP) Bus Control Logic Real address generator

Pointer Registers
Index Register Temporary Registers Conclusion

G-1

Introduction
Intel 8086 is a 16 bit integer processor. It has 16-bit data bus and 20-bit address bus. The lower 16-bit address lines and 16-bit data lines are multiplexed (AD0-AD15). Since 20-bit address lines are available, 8086 can access up to 2 20 or 1 Giga byte of physical memory.

G-1

The basic architecture of 8086 is shown below :

G-1

Internal Part of the 8086 Microprocessor

The 8086 Microprocessor is divided into two independent functional unit. They are1. Bus interface unit (BUS) 2. Execution unit (EU)

G-1

Bus Interface Unit (BIU)

The Bus Interface Unit (BIU) sends out addresses fetches instruction from memory, reads data from port and memory and writes data to port and memory. The functional ports of the BIU are: Instruction Queue (IQ) Segment Registers (SR) Instruction Pointer (IP) Bus Control Logic Real address generator

G-1

Instruction Queue
The instruction queue is six bytes in length, it is first in first out resister and it use to speed up the execution of programs.

G-1

Segment register
These registers are used to store the 16-bit starting address of the four memory segment. They are Code segment (CS) register. Data segment (DS) register. Stack segment (SS) register. Extra segment (ES) register.

G-1

Instruction Pointer (IP)

Instruction Pointer is designated as register IP. To access

Instruction 8086 uses the register CS and IP. The CS register contains the segment address of the next Instruction. The IP contains the offset. So IP always hold the address of memory location (offset) of the next instruction to be executed.

G-1

10

Bus Control Logic

The Bus control logic of the BIU generates all the bus control signals. Such as read and write signals for memory and input/output.

G-1

11

Real address generator

The 8086 contain the on chip logical address to physical address mapping hardware. The programmers works with the logical address which includes the six bit contains of a segment register and a six bit displacement or offset value.

G-1

12

Execution Unit
The EU works in parallel with the BIU. It informs the BIU the location at which the next instruction or data is to be fetched. The functional part of the EU Control System and Instruction Decode. Arithmetic and Logic Unit (ALU) Flag register General Purpose registers Stack pointer and Base pointer registers Index register Temporary registers.
G-1 13

Control System and Instruction Decode

The control circuit of the EU directs all the internal operation of the processor. The instruction in the EU translates the instruction fetched from the memory into a series of action carried out by the EU.

G-1

14

Arithmetic Logic Unit (ALU)

An arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers.

G-1

15

Flags
The 16-bit flag register of the 8086 processors stores the information about the status of the processors and the status of the instruction executed most recently. There are two types of flag Conditional flags Carry flag Parity flag Auxiliary flag Zero flag Sign flag Overflow flag Control flags Direction flag Interrupt flag Trap flag

G-1

16

General Purpose Register

These register can be used for temporary storage of 8-bit data. Certain pairs of those GPR can be used together to store 16-bit data words.

Each one of the GPR have their own special meaning:

AX (Accumulator) register BX (Base) register CX (Count) register DX (Data) register

G-1

17

Pointer Registers
The pointer registers are usually used for storing the offset address of data elements stored in stack. The 8086 processor has two 16-bit pointer register. Stack Pointer Register (SP) Base Pointer Register (BP)

G-1

18

Index Register
The 8086 processor has two 16-bit index register. The index register are used for storing index or offset of the array elements from the memory. Two 16-bit index register are Source index (SI) Destination index (DI)

G-1

19

Temporary Registers
The EU contains temporary registers for holding operands for the ALU to be processed and just the processed data.

G-1

20

Recommendation
This type chips and registers are not available also

manufacturing cost is high This section is so sensitive

G-1

21

Conclusion
Unlike microcontrollers, microprocessors do not have inbuilt memory. Finally we can say 8086 microprocessor set the stage for a computer and worldwide standard that would become the basis for the architecture of every computer made today.

G-1

22

Thanks to all
*****

G-1

23

????
G-1 24