Microprocessor programming

By PROF. Y. P. JADHAV. Physics dept. Smt. C.H.M. College, Ulhasnagar-3

INSTRUCTION SET OF 8085 MICROPROCESSOR

The 8085 microprocessor has 74 basic and 246 total instructions.
Each instruction has one byte opcode.

Instructions can be 1-byte, 2-bytes or 3-bytes

1-byte instruction has only an opcode, while 2-byte instruction has an opcode, followed by 8-bit (1-byte) data or address and 3-byte instruction has an opcode, followed by 16-bit (2-bytes) data or address. While storing 3-bytes instruction in memory, the sequence of storage is first the opcode, followed by lowbyte of data or address, and then high-byte of data or address.
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Groups of the 8085 instruction set

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Data Transfer Instructions

Copies from register toflags. memory and vice Loads the given data into register Do notdata affect Condition Copies data from register to register versa.

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Instructions
1 2

Task performed Move 8-bit immediate data to register r. Move 8-bit immediate data to memory whose address is in the HL register (Memory pointer).

MVI r, data (8-bit) MVI M, data (8bit)

MOV rd, rs
MOV M, rs

Move 8-bit data from source register (rs) to destination register (rd).
Move 8-bit data from source register (rs) to memory whose address is in the memory pointer.

MOV rd, M
LXI rp, data (16bit) STA addr LDA addr SHLD addr

Move 8-bit data from memory whose address is in the memory pointer to destination register (rd).
Load 16-bit immediate data in the specified register pair Store the content of register A at the address given in the instruction. Load data into register A directly from the address given in the instruction. Store the content of HL register in to memory (addr) (L) & (addr + 1) (H)
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6 7

10

LHLD addr

Load the content of memory into HL register (L) (addr) & (H) (addr + 1). Store the content of the register A into the memory whose location is specified by BC or DE register pair Load the content of the memory, whose location is specified by BC or DE register pair, into register A Exchange the content of HL and DE register pair

11

STAX rp

12

LDAX rp

13

XCHG

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INSTRUCTIONS SET OF 8085

MOV Rd, Rs.(Move data from Rs to Rd).

Example:
MOV C,B. Move the content of register B to C. Initially B=10H. After execution B=10H.

C=20H. C=10H. Flags Affected :No flags affected. Addressing mode: Register.

DATA TRANSFER GROUP

MOV Rd, M (Move data from Memory to Rd). Example: MOV C,M. Move the content of Memory to C. Suppose the Data at memory pointed By HL pair at C200H is 10H. Initially H=C2,L=00,C=30H After execution H=C2,L=00,C=10H.

Flags Affected :No flags affected. Addressing mode: Indirect.

DATA TRANSFER GROUP

MVI R, Data.(Move Immediate data to Register). Example: MVI B, 30H. (Move the data 30 H to Register B) Initially After execution B=40H B=30H

Flags Affected :No flags affected. Addressing mode: Immediate.

DATA TRANSFER GROUP

LXI Rp,16 bit .(Load 16 bit data to Register pair Immediate). Example: LXI SP, C200H. (Load Stack pointer with C200H). Initially SP=C800H After execution SP=C200H.

Flags Affected :No flags affected. Addressing mode: Immediate.

DATA TRANSFER GROUP

STA address.(Store Acc data to address). Example: STA C200H. (Move the data from Acc to C200H). Suppose in Acc the data is 10H. Initially A=10H, C200=20H After execution C200=10H , A=10H

Flags Affected :No flags affected. Addressing mode: Direct.

DATA TRANSFER GROUP

LHLD address.(Load HL pair with data from address). Example: LHLD C200H. (Move the data from C200 to HL pair). Suppose at C200 the data is 20H,30H . Initially H=10H,L=20H C2=20H,00=30H Flags Affected :No flags affected. Addressing mode: Direct. After execution H=20H,L=30H. C2=20H,00=30H

DATA TRANSFER GROUP

XCHG (Exchange the data from HL pair to DE pair) Example : XCHG Initially H=20H,L=30H, D=40H,E=70H. Flags Affected :No flags affected. Addressing mode: Register. After execution H=40H,L=70H. D=20H,E=30H.

DATA TRANSFER GROUP

IN 8 bit address (Move the data from address to Acc) Example: IN 80H Move the data from 80H port address to Accumulator. Suppose data at 80H is 39H. Initially A=20H. Flags Affected :No flags affected. Addressing mode: Direct. After execution A=39H

DATA TRANSFER GROUP

OUT 8 bit address (Move the data from Acc to address) Example: OUT 80H Move the data from Acc to port address 80H. Suppose data at Acc is 39H. Initially A=39H. 80=10H. Flags Affected :No flags affected. Addressing mode: Direct. After execution A=39H,80=39H.

Instructions - to add and subtract, - increment orare decrement data execution in Arithmetic Flag conditions change after of from this group. register, register pair or memory and Instructions instruction - to adjust 8-bit data for BCD arithmetic are in this group.

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Instructions

Task performed
Add register (r) to Accumulator Add data in memory to Accumulator Add immediate 8-bit data to Accumulator Add register (r) with carry to Accumulator Add data in memory to Accumulator with carry. Add immediate 8-bit data to Accumulator with carry Add (rp) to (HL) and store the result in HL pair Adjusts Accumulator to packed BCD after adding two BCD numbers. Subtract register (r) from Accumulator Subtract data in memory from Accumulator Subtract immediate 8-bit data from Accumulator Subtract register (r) with borrow from Accumulator Subtract data in memory from Accumulator with borrow. Subtract immediate 8-bit data to Accumulator with carry Increment the content of specified register Increment the content of specified memory Increment the content of specified register pair Decrement the content of specified register Decrement the content of specified memory Decrement the content of specified register pair

Addition

ADD r ADD M ADI 8-bit data ADC r ADC M ACI 8-bit data DAD rp DAA

Subtraction

SUB r SUB M SUI 8-bit data SBB r SBB M SBI 8-bit data

Increment and Decrement content of register/ register pair/ memory

INR r INR M INX rp DCR r DCR M DCX rp

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Logic Instructions
This group instructions perform logic operations such as AND, OR and XOR Compare data between registers or between register and memory Rotate and complement data in registers. Flag conditions are altered after execution of instruction of this group

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Instructions
1 2

Task performed
Logically AND (r) with (A) Logically AND (M) with (A)

ANA r ANA M

3
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

ANI 8-bit data

XRA r XRA M XRI 8-bit data ORA r ORA M ORI 8-bit data CMP r CMP M CPI 8-bit data STC CMC CMA RLC RRC RAL RAR

Logically AND immediate 8-bit data with (A)

Logically XOR (r) with (A) Logically XOR (M) with (A) Logically XOR immediate 8-bit data with (A) Logically OR (r) with (A) Logically OR (M) with (A) Logically XOR immediate 8-bit data with (A) Logically compare (r) with (A) Logically compare (M) with (A) Logically compare immediate 8-bit data with (A) Sets carry flag. Complements carry flag Complements (A) Rotate accumulator left by one bit Rotate accumulator right by one bit Rotate accumulator left through carry by one bit Rotate accumulator right through carry by one bit

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ARITHMETIC GROUP
ADD R (ADD register content with Acc and result in A ). Example: ADD C. (ADD the content of C with A). Suppose the Data at C register is 10H. Initially . C= 10H ,A=10H After execution A=20H,C=10H.

Flags Affected :All flags are modified. Addressing mode: Register

ARITHMEIC GROUP
ADD M(ADD H or L Reg content with Acc and result in A ).
Example: ADD M. (ADD the content of HL with A). Suppose the Data at memory pointed by HL register 1020H is 10H. Initially . H= 10H ,L=20H . A=20H,C=10H. After execution H=10H,L=20H. A=30H.

Flags Affected :All flags are modified. Addressing mode: Register Indirect.

ARITHMETIC GROUP
ADI Data(ADD immediate data with Acc and result in A ). Example: ADI 30H. (ADD 30H with A). Initially A=20H, After execution A=50H.

Flags Affected :All flags are modified. Addressing mode: Immediate.

ARITHMETIC GROUP
ADC R (ADD register content with Acc and carry and result in A ). Example: ADC C. (ADD the content of C with A with carry). Suppose the Data at C register is 10H and carry is 01H. Initially . C= 10H ,A=10H After execution A=21H,C=10H.

Flags Affected :All flags are modified. Addressing mode: Register

ARITHMETIC GROUP
Example: Write a program to perform 16 bit addition of 1234H& 4321H. Store answer at H & L registers. MVI B,21H B=21H MVI A,34H A=34H MVI C,43H C=43H MVI D,12H D=12H ADD B A=34+21H MOV L,A L=55H MOV A,C A=43H ADC D A=43+12H MOV H,A H=55H RST1 STOP.

ARITHMETIC GROUP
SUB R (Subtract register content from Acc and result in A ). Example: SUB B. (Subtract the content of B from A ). Suppose the Data at B register is 10H . Initially B= 10H ,A=20H After execution A=10H,B=10H.

Flags Affected :All flags are modified. Addressing mode: Register

ARITHMETIC GROUP
SBB R (Subtract register content from Acc with borrow and result in A ). Example: SBB B. (Subtract the content of B from A with borrow). Suppose the Data at B register is 10H and borrow is 01H . Initially After execution

B= 0FH ,A=20H

A=10H,B=0FH.

Flags Affected :All flags are modified. Addressing mode: Register

ARITHMETIC GROUP
SUI Data(Subtract immediate data from Acc and result in A ). Example: SUI 30H. (Subtract 30H from A). Initially A=80H, After execution A=50H.

Flags Affected :All flags are modified. Addressing mode: Immediate

ARITHMETIC GROUP
Example: Subtract data of C800 H from C200H.Store the result at C201. LDA C800H MOV B,A LDA C200H SUB B STA C201H RST1

ARITHMETIC GROUP
DAD Rp (Add specified register pair with HL pair) Example: DAD D.(Add the content of E with L and that of D with H register and result in HL pair) Suppose the content of HL pair is H=20H ,L=40H and DE pair is D=30H, E=10H. Initially H=20H ,L=40H D=30H, E=10H After execution H=50H ,L=50H D=30H, E=10H

Flags Affected :Only carry flag is modified. Addressing mode: Register.

ARITHMETIC GROUP
DAA (Decimal adjust accumulator) Example: MVI A,12H ADI 39H DAA . This instruction is used to store result in BCD form.If lower nibble is greater than 9 ,6 is added while if upper nibble is greater than 9,6 is added to it to get BCD result. Initially 12+39=4B After execution 12+39=51 in BCD form.

Flags Affected :All flags are modified. Addressing mode: Register

ARITHMETIC GROUP
INR R (Increment register content by 1 ). Example: INR C. (Increment the content of C by 1). Suppose the Data at C register is 10H. Initially C= 10H After execution C=11H.

Flags Affected :All flags are modified except carry flag. Addressing mode: Register.

ARITHMETIC GROUP
DCR R (Decrement register content by 1 ). Example: DCR C. (Decrement the content of C by 1). Suppose the Data at C register is 10H. Initially C= 10H After execution C=0FH.

Flags Affected :All flags are modified except carry flag. Addressing mode: Register.

ARITHMETIC GROUP
INX Rp (Increment register pair content by 1 ).
Example: INX SP (Increment the content of Stack pointer pair by 1). INX B. (Increment the content of BC pair by 1). Suppose the Data at BC register is 1010H and SP is C200H Initially BC= 1010H After execution BC=1011H.

SP=C200H

SP=C201H.

Flags Affected :No flags are modified. Addressing mode: Register.

LOGICAL GROUP
ANA R (Logically AND register content with Acc and result in A ). Example: ANA C (AND the content of C with A). Suppose the Data at C register is 10H. Initially C= 10H ,A=10H After execution A=10H,C=10H.

Flags Affected :S,Z,P are modified Cy=reset,AC=set. Addressing mode:Register.

LOGICAL GROUP
ANI Data (Logically AND immediate data with Acc and result in A ). Example: ANI 10H (AND 10H with A). Initially A=11H After execution A=10H

Flags Affected :S,Z,P are modified Cy = reset, AC = set. Addressing mode: Immediate.

LOGICAL GROUP
ORA R (Logically OR register content with Acc and result in A5 ). Example: ORA C (OR the content of C with A). Suppose the Data at C register is 17H. Initially C= 17H ,A=10H After execution A=17H,C=17H.

Flags Affected :S,Z,P are modified Cy=reset,AC=reset. Addressing mode:Register.

LOGICAL GROUP
ORI Data (Logically OR immediate data with Acc and result in A ). Example: ORI 10H (OR 10H with A). Initially A=30H After execution A=30H

Flags Affected :S,Z,P are modified Cy=reset,AC=set. Addressing mode: Immediate.

LOGICAL GROUP
XRA R (Logically XOR register content with Acc and result in A ). Example: XRA C (XOR the content of C with A). Suppose the Data at C register is 17H. Initially C= 17H ,A=10H After execution A=07H,C=17H.

Flags Affected :S,Z,P are modified Cy=reset,AC=reset. Addressing mode:Register.

LOGICAL GROUP
CMP R (Compare register content with Acc and result in A ).
Example: CMP C (Compare the content of C with A). Suppose the Data at C register is 17H. Initially C= 10H ,A=17H After execution A=17H,C=17H.

Flags Affected :S=0,Z=0,P=0, Cy=reset,AC=reset. Addressing mode:Register.

LOGICAL GROUP
CPI Data (Compare immediate data with Acc ). Example: CPI 10H (Compare the content of C with A). Initially A=17H After execution A=17H.

Flags Affected :S=0,Z=0,P=0, Cy=reset,AC=reset. Addressing mode:Immediate.

LOGICAL GROUP
RLC (Rotate accumulator left ). Example: MOV A,03H. RLC Initially A=03H (Rotate accumulator left). After execution A=06H.

Flags Affected :Only carry flag is affected. Addressing mode:Implied.

LOGICAL GROUP
RAL (Rotate accumulator left with carry ). Example: MOV A,03H. RAL Initially A=03H , carry =01H (Rotate accumulator left with carry). After execution A=07H.

Flags Affected :Only carry flag is affected. Addressing mode:Implied.

LOGICAL GROUP
RRC (Rotate accumulator right ). Example: MOV A,03H. RRC Initially A=03H , (Rotate accumulator right). After execution A=81H.

Flags Affected :Only carry flag is affected. Addressing mode:Implied.

LOGICAL GROUP
Write a program to reset last 4 bits of the number 32H Store result at C200H. MVI A, 32H A=32H ANI F0H 00110010 AND 1111000 =00110000=30H STA C200H. C200=30H RST1 Stop

Branch Instructions
Allows the microprocessor to change the sequence of a program execution either unconditionally or under certain test conditions. Cause the microprocessor to transfer the program control from the execution of the instruction of main program to the instructions whose address is specified in the instruction. Conditional branch instructions examine the status of the specified flag and determine if branch instruction is to be executed or not.
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This group includes: Jump instructions direct or indirect (unconditional and conditional) Call instructions (unconditional and conditional) Return instructions (unconditional and conditional) Restart instructions (unconditional)

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Instructions Unconditional JMP 16-bit addr Jump Conditional Jump Jcondition addr JC 16-bit addr JNC 16-bit addr JP 16-bit addr JM 16-bit addr JPE 16-bit addr JPO 16-bit addr JZ 16-bit addr JNZ 16-bit addr

Task performed Jump unconditionally to the address specified in the instruction Jump conditionally to the address specified in the instruction. Jump on carry (CY = 1) Jump on no carry (CY = 0) Jump on positive (S = 0) Jump on negative (S = 1) Jump on even parity (P = 1) Jump on odd parity (P = 0) Jump on zero (Z = 1) Jump on not zero (Z = 0)

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Instructions
Indirect jump

Task performed Initialize memory pointer and then Load (HL) to (PC)
Transfer the program control to the specified memory address:

Restart n

LXI H 16 bit addr and PCHL RST n (0 to 7)

RST 0 RST 1 RST 2 RST 3 RST 4 RST 5 RST 6 RST 7

0000H 0008H 0010H 0018H 0020H 0028H 0030H 0038H

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BRANCH GROUP
JMP address(Unconditional jump to address) Example: JMP C200H. After this instruction the Program Counter is loaded with this location and starts executing and the contents of PC are loaded on Stack.

Flags Affected :No Flags are affected. Addressing mode:Immediate.

CALL address(Unconditional CALL from address)

Example: CALL C200H. After this instruction the Program Counter is loaded with this location and starts executing and the contents of PC are loaded on Stack. Flags Affected :No Flags are affected. Addressing mode:Immediate

BRANCH GROUP
Conditional Jump Instructions. JC (Jump if Carry flag is set) JNC (Jump if Carry flag is reset) JZ (Jump if zero flag set) JNZ (Jump if zero flag is reset) JPE (Jump if parity flag is set) JPO (Jump if parity odd or P flag is reset ) JP (Jump if sign flag reset ) JM (Jump if sign flag is set or minus)

BRANCH GROUP
Conditional Call Instructions. CC (Call if Carry flag is set) CNC (Call if Carry flag is reset) CZ (Call if zero flag set) CNZ (Call if zero flag is reset) CPE (Call if parity flag is set) CPO (Call if parity odd or P flag is reset ) CP (Call if sign flag reset ) CM (Call if sign flag is set or minus)

BRANCH GROUP
RET (Return from subroutine) Example: MOV A,C RET After this instruction the Program Counter POPS PUSHED contents from stack and starts executing from that address .

Flags Affected :No Flags are affected. Addressing mode:Register indirect .

BRANCH GROUP
RST (Restart instruction) Example: MOV A,C RST 1. After this instruction the Program Counter goes to address 0008H and starts executing from that address .

Flags Affected :No Flags are affected. Addressing mode:Register indirect.

BRANCH GROUP
The addresses of the respective RST commands are:

Instruction RST 0 RST 1 RST 2 RST 3 RST 4 RST 5 RST 6 RST 7

Address 0000H 0008H 0010H 0018H 0020H 0028H 0030H 0038H

Call and Return Instructions

This group consists of following instructions

CALL: 1.CALL addr (unconditional Call) 2.Ccondition addr (Conditional Call) RETURN: 1.RET addr (unconditional Return) 2.Rcondition addr (Conditional Return)
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Instructions
Unconditional Call

Task performed
Call unconditionally a subroutine whose address is specified in the instruction. Call conditionally a subroutine whose address is specified in the instruction. Call a subroutine on carry (CY = 1) Call a subroutine on no carry (CY = 0) Call a subroutine on positive (S = 0) Call a subroutine on negative (S = 1) Call a subroutine on even parity (P = 1) Call a subroutine on odd parity (P = 0) Call a subroutine on zero (Z = 1) Call a subroutine on not zero (Z = 0) Return unconditionally from the subroutine. Return conditionally from the subroutine. Return from subroutine on carry (CY = 1) Return from subroutine on no carry (CY = 0) Return from subroutine on positive (S = 0) Return from subroutine on negative (S = 1) Return from subroutine on even parity (P =1) Return from subroutine on odd parity (P = 0) Return from subroutine on zero (Z = 1) Return from subroutine on not zero (Z = 0)

CALL 16-bit addr Ccondition 16-bit addr CC 16-bit addr CNC 16-bit addr CP 16-bit addr CM 16-bit addr CPE 16-bit addr CPO 16-bit addr CZ 16-bit addr CNZ 16-bit addr

Conditional Call

Unconditional Return

RET 16-bit addr Rcondition 16-bit addr RC 16-bit addr RNC 16-bit addr RP 16-bit addr RM 16-bit addr RPE 16-bit addr RPO 16-bit addr RZ 16-bit addr RNZ 16-bit addr

Conditional Return

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Stack and Machine Control Instructions

This group includes instructions related to stack, I/O port (reading and writing data), interrupt, as well as No Operation and halt program execution. Stack Operations:
o o LXI SP 16-bit addr and SPHL PUSH and POP CALL and RETURN RESTART XTHL

Input/ Output Instructions:

IN 8-bit (port addr) OUT 8-bit (port addr)

Interrupt enable / disable instructions :

EI DI

Interrupt mask set / read instructions :

SIM RIM

Machine control instructions :

NOP HLT
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STACK AND MACHINE CONTROL

PUSH Rp.(Push register pair contents on stack).
Example:LXI SP FFFFH. PUSH H. (Move the content of HL pair on Stack). Suppose at HL pair the data is H= 20H,L= 30H & SP is initialized at FFFFH Initially H=20H,L=30H SP=FFFF H After execution H=20H,L=30H. FFFD=30H,FFFE=20H

Flags Affected :No flags affected. Addressing mode: Register indirect.

STACK AND MACHINE CONTROL

POP Rp.(Pop register pair contents from stack).
Example:POP D(POP the content of DE pair from Stack). Suppose at DE pair the data is H= 20H,L= 30H SP was initialized at FFFFH Initially D=20H,E=30H FFFD=80H,FFFE=10H After execution D=10H,E=80H.

Flags Affected :No flags affected. Addressing mode: Register indirect

STACK AND MACHINE CONTROL

XTHL (Exchange HL register pair contents with top of stack). Example: XTHL(Exchange top with HL pair).
Suppose at HL pair the data is H= 20H,L= 30H & SP =FFFFH & at locations FFFF=10H and at FFFE= 80H. Initially H=20H,L=30H SP=FFFF =10H,FFFE=80H After execution H=10H,L=80H. FFFD=20H,FFFE=30H

Flags Affected :No flags affected. Addressing mode: Register indirect.

8085 INSTRUCTIONS AFFECTING THE STATUS FLAGS

Instructions
CY
ACI 8-bit ADC reg ADC M ADD reg ADD M ADI 8-bit ANA reg ANA M ANI 8-bit CMC CMP reg CMP M A A A A A A 0 0 0 A A A

Status Flags
AC
A A A A A A 1 1 1 NA A A

Z
A A A A A A A A A NA A A

S
A A A A A A A A A NA A A

P
A A A A A A A A A NA A A

CPI 8-bit
DAA DAD Rp DCR reg DCR M

A
A A NA NA

A
A NA A A

A
A NA A A

A
A NA A A

A
A NA A A

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CY
INR reg INR M ORA reg ORA M ORI 8-bit RAL RAR RLC RRC SBB reg NA NA 0 0 0 A A A A A

AC
A A 0 0 0 NA NA NA NA A

Z
A A A A A NA NA NA NA A

S
A A A A A NA NA NA NA A

P
A A A A A NA NA NA NA A

SBB M
SBI 8-bit STC SUB reg SUB M

A
A A A A

A
A NA A A

A
A NA A A

A
A NA A A

A
A NA A A

SUI 8-bit
XRA reg XRA M XRI 8-bit

A
0 0 0

A
0 0 0

A
A A A

A
A A A

A
A A AYPJ

NOTE: A : Flag affected. NA: Flag not affected. 0 : Flag always zero. 1 : Flag always one.

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DDD defines the destination register, SSS defines the source register and DD defines the register pair.

Registers

Code

Registers Pairs

Code

B
C D E H L M (Memory) A

000
001 010 011 100 101 110 111

BC
DE HL AF or SP

00
01 10 11

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Data transfer instructions

1 MVI r, 8-bit data : Move 8 bit data immediate to register r.
Operation : (r) 8 bit data (byte)

Description

: The content of byte 2 of the instruction is directly moved to specified register r. : 2 bytes First byte: Opcode of MVI r. Second byte: 8 bit data. :

No. of bytes

Instruction format

0 D D D 1 Data

Addressing mode : Immediate addressing

Flags affected

: None
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Example: MVI B, 54H ; This instruction will load 54H directly into register B.

Before execution

After execution

A B D H

F C E L

MVI B, 54H

A D H

F E L

B 54H C

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2 MVI M, 8-bit data Operation

: Move 8 bit data immediate to memory location whose address is given by memory pointer - (HL) register pair. : (M) 8 - bit data (byte)

Description No. of bytes

: The content of byte 2 of the instruction is directly moved to specified memory location. : 2 bytes First byte: Opcode of MVI M (3E). Second byte: 8- bit data.
: 0 0 1 1 0 1 1 0

Instruction format Addressing mode Flags affected

Data : Immediate/ register indirect addressing : None

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3 MOV Rd, Rs Operation Description

: Move (copy) data from source register (Rs) to destination register (Rd). : (Rd) (Rs) : This instruction copies data from source register to destination register. The Rs and Rd are general purpose registers such as A, B, C, D, E, H and L registers. : 1 byte Opcode of MOV Rd, Rs : 0 1 D D D S S S

No. of bytes Instruction format Addressing mode Flags affected

: Register addressing : None

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4 MOV M, Rs

: Move data from source register into memory location whose address is given by memory pointer - (HL) register pair. : (M) (Rs) : The content of source register is copied into specified memory location. : 1 byte Opcode of MOV M, Rs :

Operation Description No. of bytes Instruction format Addressing mode Flags affected

0 1 1 1 0 S S S

: Register indirect addressing : None

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5 MOV Rd, M Operation Description

: Move data from memory location, whose address is pointed by memory pointer, into destination register. : (Rd) (M) : The content of specified memory location is copied into destination register

No. of bytes
Instruction format Addressing mode

: 1 byte Opcode of MOV M, Rd

:

0 1 D D D 1 1 0

: Register indirect addressing

Flags affected

: None

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3.2.3 Addressing Modes

Microprocessor needs memory address to access data from the memory. Assembly language may use several addressing modes to accomplish this task.

Addressing Modes continued

Every instruction of a program has to operate on a data constants, values held in registers or values held in memory (or ports). The method of specifying the data to be operated by the instruction is called ADDRESSING.

The different ways that a microprocessor can access data are referred to as Addressing modes.
The 8085 have five Addressing modes:

1. 2. 3. 4. 5.

Immediate Addressing Register Addressing Direct Addressing Indirect Addressing Implied Addressing.
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Immediate Addressing In this mode, 8 or 16-bit data can be specified as a part of instruction. The instructions ending with letter I are generally fall under this category. Here the operand is the specified constant in the instruction itself.
Examples:

MVI A, 20H ; Move immediate 8-bit data (20H) into

; the accumulator.

LXI H, C000H ; Move immediate 16-bit data ; (C000H) into memory/ data ; pointer i.e. in HL register pair.
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Register Addressing This mode specifies the source operand or destination operand or both to be in the 8085 registers. This results in faster execution, since it is not necessary (required) to access memory location for operands. Here the operand is the contents of the named registers.
Examples: MOV A,B ; Move the content of register B into the accumulator. ADD C ; Add the content of register C into the accumulator.

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Direct Addressing
This mode specifies the 16-bit address in the instruction itself. The second and the third bytes of instruction contain 16-bit address. Here the operand is the contents of the specified memory location.
Examples:
LDA D000H ; Loads the 8 bit content of memory D000H into the ; accumulator. SHLD 3000H ; stores the content of HL register pair in to two consecutive ; memory locations, the content of register L into memory ; location 3000H and the content of register H into memory ; location 3001H.

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Indirect Addressing
In this mode the memory address, at which data is stored or to be stored, is specified by the contents of the register pair. (The specified register pair contains the address of the operand.) Examples:
LDAX D
MOV M, A

; Loads the accumulator with content of memory ; pointed by DE register pair ; Store the content of accumulator in memory ; pointed by memory (HL) pointer.

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Implied Addressing (indicated by suggestion rather than explicit reference) In implied addressing, opcode only specifies the address of the operands. The addressing mode of certain instructions is implied by the instructions function. For example, the STC (set carry flag) instruction deals only with the carry flag, the DAA (decimal adjust accumulator) instruction deals with the accumulator.
Examples: CMA RAL STC DAA ; Complements the content of accumulator. ; Rotates the content of accumulator left through ;carry. ;(set carry flag) instruction deals only with the carry flag, ;(decimal adjust accumulator) instruction deals with the ; accumulator.
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 Some instructions use a combination of addressing modes. A CALL instruction, for example, combines direct addressing and register indirect addressing. The direct address in a CALL instruction specifies the address of the desired subroutine; the register indirect address is the stack pointer. The CALL instruction pushes the current contents of the program counter into the memory location specified by the stack pointer.

Instruction Formats
The 8085 instruction set consists of one, two and three byte instructions.
The first byte of instruction is always the opcode; in two byte instruction the second byte is usually data (or port address); in the three byte instruction the second and third byte represent address or 16-bit data.
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One byte instruction: FORMAT: Opcode

1 byte Example: MOV A, B is one byte Instruction. This instruction copies the contents of register B into register A.

Two byte instruction:

FORMAT: Opcode Operand

2 byte Example: MVI C, 00H. In this instruction the first byte is the opcode for MVI C and is followed by a data byte (00H in this case). This instruction copies immediate data 00H into register C.

Three byte instruction:

FORMAT: Opcode Operand Operand

3 byte Example: JMP D050H. The opcode of this instruction is C3 first byte and is followed by 16-bit address D050H (2 bytes). This instruction transfers program control to memory location D050H, by loading this address into program counter.

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Algorithm
A problem is solved by processor in step by step method. We call each step an instruction. Thus the solution of the problem is divided in several instructions. An Algorithm is such sequence of instructions to solve a particular problem.
An algorithm has following characteristics. 1. 2. 3. 4. Input: an algorithm may or may not require input data. Output: Each algorithm is expected to have at least one result. Definiteness: each instruction must be clear and unambiguous. Finiteness: If the instructions of an algorithm are executed, the algorithm should terminate a program after finite number of steps.

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Flowchart
To develop programming logic programmer has to write down various actions, which are to be performed in proper sequence. A Flowchart is a Graphical representation of an algorithm - that illustrates the sequence of operations to be performed to arrive at the solution. - Special-purpose symbols connected by arrows (flowlines) Flowchart is very useful for clear understanding of programming logic.
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The table shows the graphic symbols used in the flowchart.

Symbol Name
Oval: Start/Stop Box Parallelogram: Input Box Rectangle: Processing Box Diamond: Decision Box Out put Box

Purpose
To begin a flowchart To end flowchart To gate input data

To do calculations

To make comparisons

To print result

Double sided rectangle: subroutine Box Arrow

To execute subroutine

To indicate flow of instruction To indicate continuation

Circle with alphabet or number A: any alphabet or number

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MVI A, 8-bit data MVI B, 8-bit data ADD B STA C200H RST 1

MVI A, 8-bit data MVI B, 8-bit data MVI C, 00H ADD B JNC : NO CARRY INR C
NO CARRY :

STA C201H MOV A,C STA C200H HLT / RST 1

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MVI C, 00H LXI H C100H MOV A, M INX H ADD M JNC : NO CARRY

INR C NO CARRY : INX H MOV M, C INX H MOV M, A HLT

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MVI C, 00H
LXI H C100H MOV A, M INX H ADD M JNC : NO CARRY INR C
NO CARRY :

; carry = 00
; initialize memory pointer ; get first number to accumulator ; increment memory pointer ; add second number ; is carry zero? ; carry = carry + 1 ; increment memory pointer ; store the sum ; increment memory pointer ; store the carry ; end program execution
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INX H MOV M, C INX H MOV M, A HLT

4 LXI H C100H MOV A, M INX H ADD M MOV L, A

MVI A, 00H ADC A MOV H, A RST 1

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5 LXI H C100H MOV A, M INX H ADD M MOV L, A MVI A, 00H ADC A MOV H, A

CALL MODIAD HLT

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8 BIT DECIMAL SUBSTRACTION if 2nd no is greater than 1st no then the answer will in 2's complement store 1st 8 bit no in the memory location C050 store 2nd 8 bit no in the memory location C051 Result is stored in C052 LXI H,C051 MVI A,99 SUB M INR A DCX H ADD M DAA STA C052 HLT

Write an assembly language program to multiply two 8-bit hexadecimal numbers, using successive addition method. Store the product in HL register pair.
XRA A/ SUB A/ MVI A, 00H MVI B, 8-bit data MVI D, 8-bit data MOV C, A AGAIN: ADD B JNC : NO CARRY INR C NO CARRY : DCR D JNZ : AGAIN MOV H,C MOV L,A RST 1

Write an assembly language program to transfer 16 bytes of data stored in locations at C150H to C15FH to the new memory location starting from C200H onward.
LXI H C150H LXI D C200H MVI C, 10H NEXT: MOV A, M STAX D INX H INX D DCR C JNZ: NEXT HLT

Fibonacci Series Generation To run the Program simply load at memory location C050=01,C051=01
MVI C,09 //Counter

NEXT:

LXI H,C050 //Memory Pointer MOV A,M INX H MOV B,M INX H ADD B DAA MOV M,A DCX H DCR C JNZ:NEXT RST 1

State the task performed, byte size and the addressing modes of the following instructions. Instruction ADI 37H STAX D Task performed Add 37H immediately to register A (accumulator) Store the content of the register A into the memory whose location (address) is specified by DE register pair Move 8-bit data from source register A to destination register B. Byte size 2 1 Addressing mode Immediate addressing Indirect addressing Register addressing

MOA B, A

Write the programming instructions to perform the following task

Sr. no Task Programming instructions

1
2 3 4 5 6

Load AAH in register A

Load 7BH in register C Copy the content of accumulator in register B Subtract the content of register C from accumulator contents Store the result at C100H Stop program execution.

MVI A, AAH
MVI C,7BH MOV B,A SUB C STA C100H HLT/ RST n

State the function performed by each of the following 8085 microprocessor instructions:
1. LXI D, C350H : Load register pair DE immediately with C350H 2. ADC H : Add content of register C to accumulator with carry (i.e. (A) = (A) +(C) +CY) This instruction modifies all flags. 3. CALL 036EH : The program control is transferred to the address specified by the operand (036EH). Before the transfer of the control the address of the next instruction to the CALL is pushed to the stack. 4. NOP : No operation or do nothing. 5. RST1 : This instruction can be used as software interrupt to transfer the program execution (program control) to address 0008H 6. LDA EO40H : The content of memory location E040H are copied to the accumulator.

The data in the accumulator, register B and register C of 8085 microprocessor is 90H, 2AH and 17H respectively, what will be the content of the accumulator, register B and register C after executing each instruction in the following program

Accumulator (A)
Initially ADD B MOV C, A MVI A, 32H RST 1 90H BAH BAH 32H 32H

(B)

(C)

2AH 2AH 2AH 2AH 2AH

17H 17H BAH BAH BAH

State the function performed by each of the following microprocessor instructions

MOV B, C
ADI 52H RAL JZ C100H

Move (copy) 8-bit data from source register C to destination register B.

Add immediate 8-bit data 52H to Accumulator. Rotate accumulator left through carry by one bit. Transfer the program control to memory location C100H when zero flag is set. Send data from Accumulator to output port# 01H. The contents of HL pair are copied into the program counter.

OUT 01H PCHL

The data in the accumulator, register C and register D of 8085 microprocessor is 00H, 0FH and 49H respectively, what will be the content of these registers after executing each instruction in the following program A C D

Initially MVI A, 68H SUB C MOV D, C

00H 68H 59H 59H

0FH 0FH 0FH 0FH

49H 49H 49H 0FH

ORA D
RST 1

5FH
5FH

0FH
0FH

0FH
0FH

1.

State how many times the following loop will be executed LXI B 0005H again: DCX B JNZ : again

Infinite number of times Give the content of the accumulator after execution of each of the instruction in the following program segment MVI A, 95H ANI 0FH CMA

A
MVI A, 95H ANI 0FH CMA 95H 05H FAH

Initially the accumulator contents 82H and carry flag is RESET. After executing following instructions in sequence, give the content of accumulator and carry flag.

A Initially ORI 07H RAL MVI A, 00H 82H 87H

CY 0 0 1 1

0EH
00H

//five consecutive numbers to be sorted in ascending order Store numbers from memory location C020 START : W: MVI D,05 LXI H,C020 //Counter

X:

MVI C,05 MOV A,M INX H MOV B,M CMP B JM Y

MOV M,A DCX H MOV M,B INX H DCR C JNZ X DCR D JNZ W HLT

//Counter

Y:

Write an assembly language program to find largest hexadecimal number out of an array of 10 numbers stored in memory with starting address C100H.

LXI H C100H MVI C,09H MOV A,M NEXT: INX H CMP M JNC : NO CARRY MOV A,M NO CARRY: DCR C JNZ : NEXT RST 1

Write an assembly language program to Add 3207H to 8051H using DAD instruction. Store the result in memory locations C150H and C151H.
LXI H 3207H LXI B 8051H DAD B SHLD C150H HLT