Flip flops and latches

Basic memory elements of a sequential circuit, stores 1-bit information Difference: Latches: Outputs are constantly affected by their inputs as long as the enable signal is asserted. Flip flops: Outputs change only either at the rising or falling edge of the enable signal. This enable signal is usually the controlling clock signal.

types of latches and flip-flops:

Set-Reset -latch and flip flop D-latch and flip flop JK-latch and flip flop T-latch and flip flop

Simple Bi-stable element

If power is turned on Assume initially , Q = 1 then Q` = 0 the circuit is locked or latched to a 1 Q = 0 then Q` = 1 the circuit is locked or latched to a 0 because it does not have any inputs, we cannot change the information bit that is stored in it.

Set-Reset latch
using NAND Using NOR Truth table

Gated S-R latch

D-Latch

Gated D-latch

Clocked SR Flip flop

Clocked D Flip flop

Edge triggered flip flops