THIN FILM DEPOSITION Chapter 9

Introduction
Many films, made of many different materials
are deposited during a standard CMOS process.
Requirements or desirable traits for deposition:
1. Desired composition, low contaminates, good
electrical and mechanical properties.
2. Uniform thickness across wafer, and
wafer-to-wafer.
3. Good step coverage (conformal coverage).
4. Good filling of spaces.
5. Planarized films .
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ


Aspect ratio = AR=
h
w
Note the aspect ratios and the need for new materials.
Note also the number of metal layers requiring more deposition steps.
Year of Production 1998 2000 2002 2004 2007 2010 2013 2016 2018
Technology N ode (half pi tch) 250 nm 180 nm 130 nm 90 nm 65 nm 45 nm 32 nm 22 nm 18 nm
MPU Printed Gate Length 100 nm 70 nm 53 nm 35 nm 25 nm 18 nm 13 nm 10 nm
Min Metal 1 Pitch (nm) 214 152 108 76 54 42
Wiring Levels - Logic 10 11 12 12 14 14
Me tal 1 Aspect Ratio (Cu) 1.7 1.7 1.8 1.9 2.0 2.0
Contact Aspect Ratio (DRAM) 15 16 >20 >20 >20 >20
STI Trench Aspect Ratio 4.8 5.9 7.9 10.3 14 16.4
Me tal Resistivi ty (ohm-cm) 3.3, 2.2 2.2 2.2 2.2 2.2 2.2 2.2 2.2 2.2
Interlevel Dielectric Constant 3.9 3.7 3.7 <2.7 <2.4 <2.1 <1.9 <1.7 <1.7
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Thin Film Deposition
Quality composition, defect density, mechanical and electrical properties
Uniformity affect performance (mechanical , electrical)
Thinning
leads to
| R
Voids: Trap chemicals lead to cracks
(dielectric) large contact resistance
and sheet resistance (metallization)
AR (aspect ratio) = h/w | with +
feature size in ICs.
Examples
Poor step coverage with increasing AR
Thinning causes
metal resistance to
increase, generates
heat and lead to
failure
Chemical Vapor Deposition
Flat on the susceptor
Cold wall reactor
Methods of Deposition:
Chemical Vapor Deposition
(CVD):APCD, LPCVD, HDPCVD
Physical Vapor Deposition (PVD:
evaporation, sputtering)
Atmospheric Pressure : APCVD
Cold wall reactors (walls not heated -
only the susceptor)
Low pressure: LPCVD batch processing.
Hot wall
reactor
Atmospheric Pressure Chemical Vapor Deposition
Transport by forced
convection
By diffusion
through boundary
layer
Diffusion through the B. L
Desorption of by products
Transport of byproducts by
forced convection
@ the surface (4): decomposition,
reaction, surface migration attachment etc.
(3) May be desorption which depends on
a sticking coefficient (4)
Growth rate for Si deposition
N=510
22
cm
-3

Mole fraction of the incorporating
species in the gas phase.
Partial pressure
Total concentration in the gas phase
CT = 1 * 10
19
cm
-3
5 * 10
22
V = 0.14 m/min
P
G
@ 1 torr
P
total
= 1 atm = 760 torr
adsorption
transport
reaction
Steady state
Steps in deposition
As in Deal-Grove
model for oxidation
Growth Kinetics
Determined by the Smaller of k
s
or h
G
Two limiting cases
1) Surface reaction k
s
<< h
G

Control: fast transport
slow reaction
Y k
N
C
v
S
T
=
2) Mass transfer or gas phase
diffusion h
G
<< k
s
Y h
N
C
v
G
T
=
Fast reaction and slow transport.
Temperature uniformity more
important than the gas flow
wafers vertically poly-Si
Put wafers
flat to ensure
flow
uniformity
@ the Si
surface.
Epitaxy
APCVD
SiO
2

(111) Si shows slower v fewer
attachment sites than in (100) Si
Ea ~ 1.6 eV for all Si sources H
desorption from the Si surface.
With H
2
as a gas carrier
Light mass
heavy
Limited by transport
Both are linear with time (t)
SiH
4
the fastest growth
k
S
limited deposition is VERY temp sensitive.
h
G
limited deposition is VERY geometry
(boundary layer) sensitive
Boundary Layer Diffusion to the Surface
Gas moves with the constant velocity U.
Boundary layer (caused by friction ) increases along
the susceptor, mass transfer coefficient h
G
decreases,
gas depletion caused by consumption of the reacting
species (concentrations decrease)
Growth rate decreases along the chamber
Use tilted susceptor
Use T gradient 5-25C
Gas injectors along the tube
Use moving belt
Deposition of alloys DIFFICULT various reactions,
kinetics (species, precursors)

Use PVD rather than CVD
B.L.
viscosity
gas density
Doping in CVD for EPITAXY
Intentional and Unintentional
Si source + Dopant
(AsH
3
, PH
3
, or
B
2
H
6
)
Autodoping: 1 - 4
outdiffusion
autodoping
The growth is faster than
the diffusion
Dt vt >>
The dopant sources at the
surface go through:
dissociation of hydride gas
lattice site incorporation
burying of dopants by other
atoms in the film
Simulation very inaccurate :
chamber design etc.
In deposition , the doping,

CP
i
for low growth rates
C
P
i
v
for high growth rates
800-1000C
outdiffusion

autodoping
T&time of CVD
Calculate all distributions
(=contributions) to get C(x,t)
Low Pressure Chemical Vapor Deposition
Operate at the surface reaction limited regime lower deposition temperatures
Larger diffusion @ lower P
s
G
G
D
h
o
=
Y
N
c
h k
h k
v
T
G s
G s
+
=
h
G
increases ~ 100 X for
760 torr 1 torr
Surface reaction controls
the growth
LPCVD reactors use
Vertical wafer stacking
P = 0.25 2.0 torr
T = 300 900 C ( + 1 C) temperature
gradient increase 5 25% to compensate
reactants depletion distributed feeding.
Less autodoping (at lower P)
Fewer particulates.
Possible disadvantages:
Deposition rates may be too low, Film quality decreases
Shadowing (less gas-phase collisions) due to directional
diffusion to the surface deterioration of the step coverage and
filling.
transport less important
low pressure
D
G
o1/P
total

Plasma Enhanced Chemical Vapor Deposition(PECVD)
Used when :
Low T required (dielectrics on Al,
metals) but CVD at decreased T gives
increased porosity, poor step coverage.
Good quality films energy supplied by
plasma increases film density,
composition, step coverage for metal
decreases but WATCH for damage and by
product incorporation.
Outgassing , peeling , cracking
stress.
P ~ 50 mtorr - 5 torr
Plasma: ionized
excited molecules,
neutrals, fragments,
ex. free radicals
very reactive
reactions @ the Si
surface enhanced
increase deposition
rates
High Density Plasma CVD dense layers ( SiO
2
) at low T (150 C) and low P ( 1- 10 m torr); T increases to 400C by
bombardment
Separate RF (gives substrate biasing bombardment) from plasma generation (Electron Cynclotron resonance ECR and
Inductively coupled Plasma ICP)
Controlled bombardment (angular -> sputtering) preferential sputtering of sloped surface improved planarization and
filling
200- 350 C
13.56 MHz
Ions, electrons,
neutrals =
bombardment
High Density Plasma (HDP) CVD
Remote high density plasma with independent RF substrate bias.
Allows simultaneous deposition and sputtering for better planarization and
void-free films (later).
Mostly used for SiO
2
deposition in backend processes.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Physical Vapor Deposition (PVD) no chemical reactions (except for reactive sputtering)
Evaporation
Advantages:
Little damage
Pure layers (high vacuum)
Disadvantages:
Not for low vapor
pressure metals
No in-situ cleaning
Poor step coverage
Very low pressure (P < 10
5
torr) - long mean free path.
purer no filaments, only surface of the
source melted
X-rays generated trapped charges in the
gate oxides anneal it !
Evaporation
k 2
cos
r N
vop Re
v u
O
=
k i 2
cos cos
r N
vop Re
v u u
t
=
Ideal cosine emission
Wafer holders to increase
uniformity of deposition
Projected
area
Knudsen cell like
behavior
The largest flux
for the
perpendicular
direction
Affected by a crucible
(melt,)
| l | r
and + cos u
k

v +
Practical cases
Use spherical
holders & rotate
them in a
planetary
configuration
Deposition rates:
nonuniform deposition
lower because of
cosu
i
emission
source here is ||
to the wafer
Emitted fluxes from crucibles
Evaporation
Partial Pressure (P
e
) of the source
(target)
e
2
1
s
2
evap
P
T
m
A 10 83 . 5 R |
.
|

\
|
=

Needed for
reasonable v ~
0.1 - 1m/min
No alloys partial pressure differences
Use separate sources and e-beam
incident
reacted
c
F
F
S =
Step Coverage Poor :
Long mean free path (arrival angle not wide = small
scattering) and low T (low energy of ad-atoms)
Sticking coefficient high (@+ T) no desorption and
readsorption poor step coverage
Heating can increase S
c
but may change film
properties (composition, structure)
Rarely used in IC fabrication
+ +
Sticking coefficient
1-10 mtorr
Deposition
Sputter Deposition
Higher pressures 1 100 mtorr ( < 10
-5
torr in evaporation) -> contaminations!
Use ultra clean gasses and ultra clean targets
Alloys (TiW, TiN etc)
good step coverage
controlled properties
DC Sputtering (for metal)
Conductive
Al, W, Ti
Ar inert gas at low
pressure.
No free radicals formed
by Ar (ex. O, H ,F as was
for PECVD)
Major Technique in Microelectronics for:
DC Sputtering
Low concentrations of electrons ->
few collisions -> large voltage here
0.1 10 mm
Ar ions (+) strike the target and sputter
ions electrons do not have high
energy yet dark glow anode
sheath.
e
-

I
+

e
-
collide with Ar atoms
excitation=glow
(Crookes dark space)
positive potential (form next to each
surface = anode)

I
+
and e
-
strike the surface:

e
larger (smaller mass than for ions)
more electrons than ions
E field due to charge imbalance V
p
(10 V
develops) to decrease e
-
accumulation
+ potential
secondary electrons!
They sustain the plasma
ions
The source of material to
be deposited
Conductive !
low e
-
-
conc.
Very small sputtering at the anode can be used for bias
sputtering and ionized sputtering
Ions get neutralized by e
-
and
diffuse to the wafer surface
Sputtering
10-20 eV
secondary electrons
electrons
sustain the
plasma -
ionization of
the gas
Bombardment by I
+
,
e
-
charges and neutrals
adsorption
migration
desorption (small)

Cathode
DC Sputtering
heating
can be
used in
hot sputter
reflow
Reactive Sputter
Deposition = add gas:
. N
2
Ti N
. O
2
Ti O
2


Can be
incorporated
in the film
CONDUCTOR
WAFERS
SPUTTERING YIELD
Effect of mass (gas) & Energy
TiW
steady state
sputtering
Effect of
mass (target)
implantation
Target
Target atom
gas
much
smaller
differences
in sputtering
yields then
in partial
pressures of
components
(target) in
evaporation
+
Neutral
RF Sputter Deposition
Dielectric
Instead of DC: 13.6 MHz RF
coupled capacitively to
plasma
several 100V
wafers
DC sputter cannot be used for dielectrics
secondary e
-

plasma extinguished (V
Z
) in 1-10s
More on the walls charge built-up
potential V
P

potential
@ the target ( area)
-
= NON-CONDUCTING
Oscillating (with RF) e
-

ionization yield pressure
+
magnet e
-
trajectory
Magnetron Sputter Deposition
have better ionization yields

deposition rates (10-100X)
better film quality (Ar needed)
use in DC & RF ( heating of the
target since I
+
)
large A
1
area
A
2

A
2

A
1
e
-
charge on
electrode (e
-

are fast so
they keep up
with RF)
e
-

tenths of volts
faster, smaller
can be used
V
1
/V
2
=(A
2
/A
1
)
m

m=1-2
For A
1
=A
2
Ions would
bombard the target and the
deposited layer
BIAS SPUTTERING - Small (-) Bias @ the Wafer Chuck
50 300V on wafers 700 2000V on target
For :
precleaning
= sputter etch
better planarity
step coverage
properties
(stress, compos.)
Not used much particulates from flaking

Use High Density Plasma CVD
instead or
Collimated Sputtering and Ionized Sputtering
small

Wider arrival
in
extended
sources = not
point sources
evap;
in point sources
Collimate the beam by using holes to direct the ions to the wafers : that u
Ionized Sputter Deposition or HDP Sputtering
In some systems the depositing
atoms themselves are ionized.
An RF coil around the plasma
induces collisions in the plasma
creating the ions (50-85% ionized).
This provides a narrow
distribution of arrival angles
which may be useful when filling
or coating the bottom of deep
contact hole.
a) b)
Highly
directional flux
Better solution
than a collimator
(holes)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
VARIOUS DEPOSITION TECHNIQUES
3 3 2 6
AsH , PH , B H
give better step coverage
than sputtering
0.5 2 torr
80 200 torr
Barrier
plugs
400 700
0
C
VLSI
!
mass transfer regime
T oxide evaporation
Cl- cleaning (HCL etc)
& better doping control
Selectivity with Cl, poor
for SiHCL

porous
BPSG 4-8% B, P)
reflow for
planarization, steam, N
2

! Al TIBA or DMAH Al-H
C - better
Cu or Al-Cu sputtered on
CVD Al diffusion @
400
0
C
= salicide
Low T: o-Si instead of poly_Si
Conditions: density of SiO
2
,
step coverage, contaminations
(C, H, N) all that determines
T, pressure and gas used.
TEOS
LPCVD (conformal, 650-800C)
Polysilicon
@ low T amorphous Si
columnar
structure
As & P deposition rate of poly Si use doping
after poly deposition
B V
poly - Si

As
,
P segregate @ the grain boundaries
( B does not ! )
625 C
Models and Simulation
Ar
+
Direct flux,
neutrals
Al
Resputtered flux
Desorbed
(emitted)
flux
Redeposited fluxes
Al
Al
Surface diffusion flux
Al
Al
+
Direct flux, ions


F
net
i
= F
direct (neutrals )
i
+ F
direct (ions )
i
+ F
redep
i
+ F
diff .in
i
F
emitted
i
F
sputtered
i
F
diff .out
i
Within the past decade, a number of
simulation tools have been developed
for topography simulation.
Generalized picture of fluxes
involved in deposition. (No gas
phase boundary layer is included, so
this picture doesn't fully model
APCVD.)
Essentially the same picture will be
used for etching simulation (in
Chapter 10).
(14)
To simulate these processes, we need mathematical descriptions of the various
fluxes.
Modeling specific systems involves figuring out which of these fluxes needs
to be included.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Finally, ions striking the surface can sometime enhance the deposition rate (by
supplying the energy to drive chemical reactions for example), so that


F
ion induced
i
= K
i
- F
ions
i
(22)
LPCVD Deposition Systems


F
direct( neutrals)
i
Yes
F
direct( ions )
i
No
F
diff ( net )
i
= F
diff ( in )
i
F
diff (out )
i
No
F
emitted
i
Yes
F
redep(emitted)
i
Yes
F
sputtered
i
No
F
redep(sputtered )
i
No
F
ion induced
i
No
Furnace - with resistance heaters
Standup wafe rs
Direct
flux, neutrals
De sorbed
(e mitted)
flux
Re deposited fluxes In these systems there are no ions involved and
hence no sputtering. Surface diffusion also is
usually not important.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
PECVD Deposition Systems
RF power input
Electrode
Wafers
Plasma
Gas outlet, pump
Heater
Gas inlet
( SiH
4
, O
2
)
Direct flux,
neutrals
De sorbed
(e mitted)
flux
Re deposited fluxes
+
Direct flux, ions


F
direct( neutrals)
i
Yes
F
direct( ions )
i
No
F
diff ( net )
i
= F
diff ( in )
i
F
diff (out )
i
No
F
emitted
i
Yes
F
redep(emitted )
i
Yes
F
sputtered
i
No
F
redep(sputtered )
i
No
F
ion induced
i
Yes
In these systems an ion flux can enhance the deposition
rate by changing the surface reactions. Sputtering is
usually not significant because the ion energy is low,
nor is direct deposition of ions significant.


rate =
S
c
K
d
F
d
( )
+ K
i
F
i
( )
N
Thus
(25)
where K
d
and K
I
are relative rate constants for the
neutral and ion-enhanced components respectively.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Ionized PVD Deposition Systems
+
Direct flux,
neutrals
Re sputtered flux
De sorbed
(e mitted)
flux
Re deposited fluxes
Direct flux, ions
+
DC targe t bias
RF substrate bias
Al
Al
+
+ e-
Al target


F
direct( neutrals)
i
Yes
F
direct( ions )
i
Yes
F
diff ( net )
i
= F
diff ( in )
i
F
diff (out )
i
No
F
emitted
i
Yes
F
redep(emitted )
i
Yes
F
sputtered
i
Yes
F
redep(sputtered )
i
Yes
F
ion induced
i
Yes
These systems are complex to model because both
ions and neutrals play a role.
They are often used for metal deposition so that Ar
+

ions in addition to Al
+
or Ti
+
ions may be present.
Thus almost all the possible terms are included


rate =
S
c
F
d
( )
+ F
i
K
sp
YF
i
( )
+ K
rd
F
rd
( )
N
where F
d
includes the direct and redeposited (emitted)
neutral fluxes, F
i
includes the direct and ion-induced
fluxes associated with the ions, and F
rd
models
redeposition due to sputtering.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
High Density Plasma CVD Deposition Systems
gas i nl et
pl asma
magneti c coil
RF
bi as suppl y
(13.56 MHz)
wafer
gas outl et,
pump
Mi crowave
supply
(2.45 GHz)
Resputtered fl ux
Redeposited fl uxes
Direct fl ux, ions
+
+
Very similar to IPVD (except neutral direct flux not as important):

rate =
K
i
F
i
( )
K
sp
YF
i
( )
+ K
rd
F
rd
( )
N
(29)
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Models in SPEEDIE
LPCVD:
PECVD:
Standard PVD:
High T PVD:
Ionized PVD:
HDP CVD:


rate =
S
c
F
d
density

F
d
= F
direct(neutrals)
i
+ F
redep(emit)
i
( )


rate =
S
c
K
d
F
d
( )
+ K
i
F
i
( )
density


F
i
= F
ions
( )


rate =
S
c
F
d
density


rate =
S
c
F
d
+
D
s
kT

s
Ou
c
2
K
cs
2
density


rate =
S
c
F
d
( )
+ F
i
K
sp
YF
i
( )
+ K
rd
F
rd
( )
density


rate =
S
c
K
i
F
i
( )
K
sp
YF
i
( )
+ K
rd
F
rd
( )
density
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
DIRECT DEPOSITION
SURFACE DIFFUSION
DEPOSITION PRECURSORS
POLY-Si OVERHANG
SILICON SUBSTRATE
OXIDE
16 m
1-4 m
RE-EMISSION
OVERHANG TEST STRUCTURE
INDIRECT
DEPOSITION
BY OBSERVING DEPOSITION PROFILES IN THE CAVITY CONCLUSIONS CAN BE
DRAWN ABOUT THE DEPOSITION MECHANISMS
* TAPERING OF THICKNESS ON TOP SURFACE
* INFLUENCE OF CAVITY HIGHT ON DEPOSITION ON THE UNDERSIDE
J.P. McVittie, J.C. Rey, L.Y. Cheng, and K.C. Saraswat, "LPCVD Profile Simulation Using a Re-Emmission Model", IEDM Tech. Digest, 917-919 (1990).

L-Y. Cheng, J. P. McVittie and K. C. Saraswat, " Role of Sticking Coefficient on the Deposition Profiles of CVD Oxide, "Appl. Phys. Lett., 58(19),
2147-2149 (1991).
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
PECVD LPCVD
J.P. McVittie, Test Structure and Modeling Studies of Deposition and Etch Mechanisms, Talk TC1-WeM6, AVS mtg in Orlando, Florida, 1993
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Parameter Values for Specific Systems
n
(exponent in cosine
arrival angle
distribution)
S
C
(sticking
coefficient)
Sputter deposition
-standard ~ 1 - 4 ~1
-ionized or
collima ted
8 - 80 ~1
Evaporation 3 - 80 ~1
LPCVD silicon dioxide
- silane 1 0.2 - 0.4
-TEOS 1 0.05 - 0.1
LPCVD tungsten 1 0.01 or less
LPCVD polysilicon 1 0.001 or less
PVD systems - more vertical arrival angle distribution (low pressure line of sight
or field driven ions). n > 1 typically.
CVD systems provide isotropic arrival angle distributions (higher pressure,
gas phase collisions, mostly neutral molecules). n 1 typically.
PVD systems usually provide S
c
of 1. Little surface chemistry involved. Atoms
arrive and stick.
CVD systems involve surface chemistry and S
c
<<1. Molecules often reemit and
redeposit elsewhere before reacting.
CVD systems provide more conformal deposition.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Topography Simulation (Using SPEEDIE)
SPEEDIE simulations for LPCVD deposition of SiO
2

with S
c
= 1 (which is more typical of PVD than LPCVD)
and varying values of n, the arrival angle distribution
factor: (a) n=1; (c) n=10.
Worse step coverage results as n increases (the arrival
angle distribution narrows).
Even for n = 1, conformal coverage is not achieved.

-1.00 1.00 0.0

-0.5
0.0
0.5
1.0
1.5
2.0
microns
microns
a)
SPEEDIE simulations for LPCVD
deposition of SiO
2
in a narrow
trench with the same isotropic
arrival angle distribution (n=1) but
different values of S
c
: (a) S
c
= 1;
(b) S
c
= 0.1; and (c) S
c
= 0.01.
Reducing S
c
is much more effective
than changing n if conformal
deposition is desired.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Simulations
90 85 80
Results of SPEEDIE LPCVD simulations with
the sidewall angle changed. S
c
= 0.2 and n = 1.
Note the improved trench filling.
SPEEDIE simulations comparing LPCVD and
HDPCVD depositions. (a) LPCVD deposition
of SiO
2
over rectangular line. S
c
= 0.1 and n = 1.
(b) HDPCVD deposition, with directed ionic
flux and angle-dependent sputtering, over
rectangular line showing much more planar
topography.
CMP might still be required in the HDPCVD
case to fully planarize the surface.
Simulations - CVD
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
SPEEDIE simulations comparing LPCVD
and HDPCVD depositions. (c) LPCVD
deposition in trench, showing void formation.
S
c
= 0.2 and n = 1. (d) HDPCVD deposition in
trench, showing much better filling.
HDPCVD has a strong directed ion
component and any overhangs that form are
sputtered away.
Actual SEM images of HDP
oxide deposition.
Simulations - CVD
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ
Summary of Key Ideas
Thin film deposition is a key technology in modern IC fabrication.
Topography coverage issues and filling issues are very important, especially as
geometries continue to decrease.
CVD and PVD are the two principal deposition techniques.
CVD systems generally operate at elevated temperatures and depend on chemical
reactions.
In general either mass transport of reactants to the surface or surface reactions can
limit the deposition rate in CVD systems.
In low pressure CVD systems, mass transport is usually not rate limiting.
However even in low pressure systems, shadowing by surface topography can be
important.
In PVD systems arrival angle distribution is very important in determining surface
coverage. Shadowing can be very important.
A wide variety of systems are used in manufacturing for depositing specific
thin films.
Advanced simulation tools are becoming available, which are very useful in
predicting topographic issues.
Generally these simulators are based on physical models of mass transport and
surface reactions and utilize parameters like arrival angle and sticking coefficients
from direct and indirect fluxes to model local deposition rates.
SILICON VLSI TECHNOLOGY
Fundamentals, Practice and Modeling
By Plummer, Deal & Griffin
2000 by Prentice Hall
Upper Saddle River NJ