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Automating P1500 Wrapper Creation for


System-on-Chip (SoC).

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Abstract
One of the major efforts of System on Chip (SoC) design is
integrating the Intellectual Property (IP) and verifying the
correctness of the design.
The purpose of this project is to create IEEE P1500 standard
wrappers for any given Intellectual Property (IP) and
automating the wrapper creation .
Wrappers are the circuitry added around an embedded core
to facilitate test reuse and to interface between a test access
mechanism (TAM) and the embedded core.




Phases Of Project
Understanding Boundary Scan architecture
Developing a dummy module with Boundary Scan
architecture
Understanding P1500 architecture
Learning Perl Scripting language
Automation of P1500 Wrapper Creation
SoC Test Problems
Mixing technology
Hierarchical cores
Different core providers
IP protection/Test reuse
Expensive and inefficient external ATE(Automatic Test
Equipment)
Long test application time

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P1500 System Architecture
Standardizes the integration of IPs into SoC environment.
Mechanism for testing of core designs within SoC.
Provision of a wrapper on the boundary (I/O terminals) of each core.
A system chip complying with 1500 should contain the following hardware
components
One standard test wrapper for each core
Signal sources and sinks for test pattern provision and reception
On-chip TAM (Test Access Mechanism) to connect the wrapper to the
source/sinks
*(In addition to H/W component 1500 architecture uses a test-specific
language called Core Test Language(CTL) to communicate between
core providers and core users.)
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User-Defined Parallel TAM
TAM source
1500 Wrapper

Core 1
WIR
TAM-in
TAM-out
1500 Wrapper

Core N
WIR
TAM-in
TAM-out
TAM sink
Chip I/O Chip I/O
.
WSO1 WSIN
.
Wrapper Serial Controls (WSC)
Wrapper Serial Port
(WSP)
WSI1
WSON
System Chip
P1500 System Architecture
CORE
WBY
INPUTS OUTPUTS
WSI
WSO
WRCK
WRSTN WRAPPER CONTROLSIGNALS
(ShiftWR,
UpdateWR,
CaptureWR)
WRAPPER
BOUNDARY
REGISTER(WBR)
WRAPPER
BOUNDARY
CELL(WBC)
(WRAPPER SERIAL INPUT)
(WRAPPER SERIAL OUTPUT)
WIR
SelectWIR
P1500 Wrapper
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Wrapper Components
Chip
Core
WSI
CaptureWR
WRCK
WSO
ShiftWR
I
O
UpdateWR
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Wrapper Cell
Operational events supported by wrapper cell(Type1)
CaptureWR
ShiftWR
UpdateWR
*(Type 2 wrapper cell will not have update register)
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CaptureWR
Chip
Core
WSI
CaptureWR
WRCK
WSO
ShiftWR= 0
UpdateWR
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ShiftWR
Chip
Core
WSI
CaptureWR
WRCK
WSO
ShiftWR= 1
DATA

0
1 0 1
1 0 1 0
0 1 0 1
1
0
0
0 1 0 1
1
0
1
0
0
1
1
UpdateWR
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UpdateWR
Chip
Core
WSI
CaptureWR
WRCK
WSO
ShiftWR
DATA

0 0 0 0
0 0 0 0
0
0
0
MuxSelect=1
UpdateWR
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Mandatory Instruction
WS_BYPASS: when no operation of that core is required,
1 bit shift path between WSI and WSO,
WS_EXTEST: To test the interconnections between
cores,
Wx_INTEST: To test the correctness of core module,
Proposed Work
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Core
Core with wrapper
Boundary Cell
Core With P1500 Wrapper
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P1500 Wrapper Module
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Need of automation
Practical cores being used in an SoC will have many
numbers of pins. So to create a wrapper around a real
core will be tiring, cumbersome and time consuming
Since there may be any number of cores present in SoC,
again creating wrappers for each core separately will be
time consuming and complex. And it will be difficult to meet
the time-to-market requirement .
With automation we can meet time to market demands.
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Project Work
Automation is being done with help of Perl scripting.
Input files to the Perl script
Core module.v (Which will give information about input and output ports
of core)
Exclude(list of exclude pins)
Output files of script
Wrap.v(Wrapper module)
Top.v(Top module of core with wrapper )
Perl <perlscript.pl> <coremodule.v> -<exclude>-<type1/type2>
Working of wrapper is being tested through simulation. All mandatory
operations( Capture, Shift and Update) were happening properly
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Test case 1
############# io.v ########
module io(a,b,c,d,e,m,n);
input [1:0]a,b;
input c;
output e;
output [1:0]d;
output m,n;
endmodule
############ exclude #########
m;
n;
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RTL Schematic for Test case1
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Simulation Output for Test case 1
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Result
Automation of wrapper creation is being tested for many
test cases for both the types of Wrapper boundary cell
types.
As we know that P1500 architecture supports different
types of wrapper cell types. This wrapper generation
supports two types of wrapper boundary cells.

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Limitations and Future enhancements
Does not support bidirectional pins.
Current script supports two types of wrapper cells
As part of future enhancement, the same script can be
modified so that it can be used for other types of cells to
create wrapper around the core.
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Thank you

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