Introduction to SystemVerilog

and verification
Presented by :
Ritesh Desai
1
Agenda
ASIC Flow
Where verification fits into ASIC flow?
Why verification?
HVLs
Why SystemVerilog?
SystemVerilog Features What SV has to offer?

Primary objective is to get familiar with SV.
2
ASIC Flow
Requirements
Arch Definition
Micro-Arch Definition
Design Entry
Design Verification Physical Design
IC Fabrication
IC Testing
3
Verification Flow
Specification
Spec Understanding
Test Plan Development
Defining Verif Env
VE Development Test Case Development
Simulation
Test
Pass?
Bug in
Design?
Modify Design
Cov
100%?
Find missing
scenarios
Synthesis
4
Levels Of Verification
RTL Verification : Functional
Gate level Verification : Functional
Transistor Level verification : Functional +
Timing
Layout Verification : Functional + Timing

We will talk about RTL Verification only.
5
HVLs
6
Why SV?
SystemVerilog is a hardware description and
Verification language(HDVL)
It is an extensive set of enhancements to IEEE
1364 Verilog-2001 standards
It has features inherited from Verilog
HDL,VHDL,C,C++
System verilog is the superset of verilog
additional features of system verilog will be
discussed

7
Why SV..
System Verilog
Assertions
OOP support
Constrained Randomization
New data types ie,logic
Coverage support
Easy c model integration
8
OOP???
Classes
Encapsulation
Inheritance
Polymorphism
What is virtual?
What is abstract class? Do we really need it?
9
What SV has to offer.???
Data types
Arrays
Different Processes
Constraint Randomization
Inter-process sync/communication
Program block
Interfaces/Clocking block/Mod-ports
Assertions
Coverage
DPI

10
Data types
reg r; // 4-state Verilog-2001
logic w; // 4-valued logic, see below
bit b; // 2-state bit 0 or 1
integer i; // 4-state, 32-bits, signed Verilog-2001
byte b8; // 8 bit signed integer
int i; // 2-state, 32-bit signed integer
shortint s;// 2-state, 16-bit signed integer
longint l; // 2-state, 64-bit signed integer
11
Data types..
String.its same as C data type, operating with
following operators.
-> Eqality
-> Non-Eq
-> lt/lte/gt/gte
-> Concatenation
-> Replication
-> Indexing
-> Different methods like len(), putc(..), getc(..),
toupper(), tolower(), compare(..), icompare(..),
substr(..),atoi(..), atohex(..),atooct(..), atobin(..).
12
Data types
User defined data types..
typedef enum {ethernet,ipv4,ipv6,tcp,udp} packet;

Variable declaration :
packet pkt;

Default value of first value of var is 0 if it is not specified.
Subsequent variables having incremental value if not
specified.
13
Data types..
Class bunch of native & user defined data types

Ex.
class ethPacket;
typedef enum {untagged, single_tagged, double_tagged} pktTag

pktTag tag;
bit [47:0] destAddr;
bit [47:0] srcAddr;
int length;
int data[]; // Do not bother about this.

function new();
.......
endfunction

task packPacket();

endtask
endclass
14
Data Types (class)
THIS Refer to the current class properties.
Ex.
class abc;
int x;

function new(int x);
x = x;
endfunction

task print();
$display(X = %0d,x);
endtask
endclass

module pqr;
abc a1;

initial begin
a1 = new(10);
a1.print();
end
endmodule

Q : what will be output here?
15
class abc;
int x;

function new(int x);
this.x = x;
endfunction

task print();
$display(X = %0d,x);
endtask
endclass

module pqr;
abc a1;

initial begin
a1 = new(10);
a1.print();
end
endmodule
16
Data Types (class)
Shallow Copying
Ex.
class B;
int j = 10;
endclass

B b1;
B b2;

b1 = new;
b2 = b1;

b1.j = 20;

$display(J = %0d,b2.j);

Q : what will be the answer? Why?
17

class B;
int j = 10;
endclass

B b1;
B b2;

b1 = new;

b1.j = 20;

b2.copy(b1); // Copies B1 into B2. Allocates separate memory.

$display(J= %0d,b2.j);

Q : what will be the answer? Why?
Q : what is this copy method? How it overcomes the problem?

This is called deep copy.
18
Data types (class)
Copy method This is not defined by SV. This
method is to be added by TB Developer.

task copy(B b);
if(b != null)
this.j = b.j;
else
$display(ERROR : copy method : b is null,
can not copy.);
endtask
19
Assignment :
Class A;
int i = 5;
Endclass

Class B;
int j = 10;
A a = new;
Endclass

B b1;
B b2;

b1 = new;
b2 = b1.copy();

Q : what will be value of b2.i and b2.a.j?Write down code on paper.
20
Data types (class)
Inheritance : deriving class from another class.
Ex. Class Packet;
..
endclass

class ethPacket extends Packet;
..
endclass
21
Data types (Class)
SUPER : refers to the parent class properties.
Ex.
class A;
int j = 5;
endclass

class B extends A;
task print();
$display(J = %0d,super.j);
endtask
endclass
22
Assignment :
Class A;
int j;
function init(int j = 5);
this.j = j;
endfunction

function int get();
get = this.j;
endfunction
Endclass

Class B extends A;
int j;
//Write down function to get the j of A in calculation.
Endclass

Class C extends B;
int j;
//Write down function to get the j of A in calculation.
endclass
23
Data type (class)
Polymorphism : Derived class instance can
access parent class properties.

Abstract class
24
Casting
What is casting??
- Casting is the process of converting one
data type to the other data type.

Three types of casting supported
1. Implicit casting
2. Explicit casting
3. Dynamic casting
25
Casting..
Implicit casting
int a = 27;
bit [3:0] temp = a;

Tool takes care of this conversion from int to
4 bit nibble. This is automatic conversion.
26
Casting
Explicit casting.

typedef struct {
int a;
} temp_st;

temp_st temp = {30};
logic [31:0] temp_int;

temp_int = temp_st(temp);

Q where it is useful?
It is applicable at the place where LHS and RHS, both have same width.
27
Casting
Dynamic casting using $cast()
It can be task or function.
task $cast(dest_var, src_exp)
function int $cast(dest_var, src_exp)

Ex. Typedef enum {red=0, green, blue, black} color;
color c1,c2;

$cast(c1,(2+1)); // C1 will be black

Same thing can be achieved using

c1 = color(2+1);

But explicit casting is compile time cast where as $cast is run time cast.

if(!$cast(c1,(a+b))
$display(Error in cast);

Note : It is same as dynamic_cast of C++.
28

ARRAYS
29
Agenda
Packed arrays
Un-packed arrays
Fixed size arrays
Dynamic size arrays
Associative arrays
Array manipulating methods
30
Arrays
Unpacked arrays : Each element require
dedicated amount of space.
Ex. Logic [3:0] abc [4];
-> Each element of abc occupies whole 32 bit
space to store 3:0.

Packed arrays : It is treated as vector.
Ex. Logic [3:0][3:0] abc;
-> Each element of abc occupies only 16 bits of
space as a whole.
31
Mix of packed and un-packed arrays :
logic [3:0][3:1] abc[100];

Q : What is the width of abc[55][2]?
32
Arrays
Dynamic size array : Size of the array is not known at compile time.

Ex. Int abc [];

To allocate the memory,
abc = new[100];

This allocates memory of 100 integers to abc.

Now, to copy one array to another.

Int abc[];
Int pqr[];

Abc = new[100];
Pqr = new[200] (abc);

First 100 elements of pqr is same as abc.
33
Arrays
Dynamic array methods.

-> new To allocate the memory, which is
described in previous slide.
-> size Returns size of the array.
$display(Size = %0d,abc.size());
-> Delete Delete the whole array.
abc.delete();
$display(Size = %0d,abc.size()); // Prints 0.
34
Arrays
Associative arrays : Used at the place where size of the array is not known
at run time.

data_type <array_name> [index];

data_type can be any native/user defined data type

index can be *, class name, native data type.

Ex. Int abc [string];
logic [31:0] abc [myClass]; //myClass is name of the class.
byte abc[*]; //Index can be any thing.

Ex. Int abc[*];
abc*2b3+ = 1;
abc*16hFFFF+ = 2;

Ex. Int abc [string];
abc*Hello+ = 1;
abc*World+ = 5;
35
Arrays
Associative array methods :
-> num() Returns no. of elements array holds.
-> delete(index) if index is specified then delete the specified elements otherwise deletes entire
array.
-> exists(index) Return 1 if element exist at the specified index else 0.

string index = hello;
if(abc.exists(index))
abc[index]++;

-> first(ref index) returns index of the first element of the array. 0 if array is empty else 1.
->last(ref index) returns index of the last element of the array. 0 if array is empty else 1.
-> next(ref index) returns index of the next element of the array. This is with respect to the
first() or last() used before.
-> prev(ref index) return index of the prev element of the array. This is with respect to the
first() or last() used before.
36
Arrays
Associative array example :
int asssoc_arr*string+ = ,Peter:20, Sam:30, Mary:40-;
string index,s;

$display(Num : %0d,assoc_arr.num());
index = assoc_arr.first();

for(int i=0;i<assoc_arr.num() + 1;i++) begin
if(assoc_arr.exists(index))
$display(Array element exist at index %s,index);
else
$display(Array element does not exist at index %s,index);

index = assoc_arr.next(s) ? s : Jeni;
end

Q : what will be the output displays?
37

QUEUE
38
Queue
What is Queue? - A queue is a variable-size,
ordered collection of homogeneous elements.

Ex. Int int_q[$];

Queue can be bounded as well as un-bounded.
Int_q is un-bounded.

Int int_q[$:255] is a bounded queue, which can
hold 256 integers.
39
Queue
Queue methods

-> size Returns no. of elements queue holds.
-> insert(index, item) insert item at the specified index.
-> delete(index) delete the element from the specified index. Size becomes
size-1.
-> pop_front() Fetch the element from front.
-> pop_back() Fetch the element from last.
-> push_front() Insert the element at front.
-> push_back() insert element at last.

When you PUSH, element is inserted and size is incremented by 1.
When you POP, element is removed from queue and size is decremented by
1.
40
Queue
Queue Example.

Int int_q[$];

task write(int element);
int_q.push_back(element);
Endtask

task read(output int element);
element = int_q.pop_front();
Endtask

Task delete_q();
int_q = {};
endtask

Task size_q();
$display(Size of the Queue is :%0d,int_q.size());
endtask
41
Assignment :

Create a data class which has following fields.
- typedef enum {untagged=0, singletagged, doubletagged} tagged
- typedef enum {Eth, ipv4, tcp} pkt;
- 8 bits preamble which has fixed pattern 8b10101010
- 48 bits Destination Address
- 48 bits Source Address
- tagged tag
- bit [31:0] pktTag[]
- int length
- bit [7:0] data[]

Name this file as Packet.sv.
42
Process control
fork..join
fork..join_any
fork..join_none
disable <block>
disable fork

43
Process Control
fork..join

fork
begin
write(push_data);
end
begin
read(element);
end
join
$display(Both threads finished.);
44
Process Control
fork..join_any

fork
begin
write(push_data);
end
begin
#20;
end
join_any
$display(Out of fork...join_any);
45
Process Control
fork..join_none

fork
begin
write(push_data);
end
begin
wait(flag == 1);
end
join_none
$display(Out of fork...join_none);
46
Process Control
disable <block_name>

fork
begin : write_t
write(push_data);
disable read_t;
end : write_t
begin : read_t
read(element);
disable write_t;
end : read_t
join_any

$display(Both threads finished.);
47
Process Control
disable fork

fork
begin
write(push_data);
end
begin
#20;
end
join_any
disable fork;
48

Randomization
49
Randomization
Why Randomization ?

Random generation of stimulus
Random setting of parameters
Hard-to-reach corner cases can be reached

50
Randomization

Shift from directed to random
Directed Random
Detect the expected bugs
Time consuming
Detects unexpected bugs (corner cases)
Tremendously reduce the efforts
51
Randomization
Two types of random variable.

- rand
- randc

Ex. rand logic [3:0] addr;
randc logic [3:0] vector;

What is the difference between rand and randc?
52
Randomization
Constraints.what is that?

rand logic [3:0] addr;

Do you have control over generation of addr?
53
Randomization
Class A;
rand bit [3:0] addr;

constraint addr_c {
addr <= 12;
}
endclass
54
Setting membership. what if you want addr value to
be any of either 3 or 5 or 7 or between 10 to 12.

Class A;
rand bit [3:0] addr;

constraint addr_c {
addr inside {3,5,7,[10:12]};
}
endclass
55
Distribution constraint what if user wants to give higher
weight to particular value?

class A;
rand bit [3:0] addr;

constraint addr_c {
addr dist {3 := 1, 5 := 2, 7:= 5};
}
endclass

What does this mean?
56
Implication Constraints

class A;
rand bit [3:0] addr;
rand bit flag;

constraint addr_c {
(flag == 1) -> addr inside {[1:5],[10:12]};
}
endclass

Note : It is bi-directional constraint.
57
If.else constraint

class A;
rand bit [3:0] addr;
rand bit flag;

constraint addr_c {
if(flag == 1)
addr == 5;
else
addr == 14;
}
endclass

Note : It is bi-directional constraint.
58
Iterative constraint

class A;
rand bit [3:0] addr[5];
constraint addr_c {
foreach(addr[i])
addr[i] dist {1 := 1, 2 := 1, 3 := 1};
}
endclass

Multi-dimention arrays can be constrained like this.
59
Variable ordering

class A;
rand bit [3:0] addr;
rand bit flag;

constraint addr_c {
(flag == 1) -> (addr == 14);
solve flag before addr;
}
endclass
60
Guard Constraint

class A;
rand bit flagA, flagB;
rand bit [3:0] addr;

constraint addr_c {
((flagA == 1) && (flagB == 0)) -> addr = 10;
}

endclass
61
Q : How to generate constraint random value?

Using randomize method.

class A;
rand bit [3:0] addr;
constraint addr_c {
addr inside {2,3,4};
}
endclass

A a = new;
a.randomize();

$display(addr = %h,a.addr);
62
pre_randomize/post_randomize
When you call randomize, pre_randomize is
called before it and post_randomize is called
after it.
pre_randomize is used for pre-processing
purpose.
post_randomize is used for post_processing of
the variables.
63
Enabling/Disabling randomness of the random variable using rand_mode.

class A;
rand bit [3:0] addr;
rand bit flag;

constraint addr_c {

}
endclass

A a = new;

// Turning off random mode of all variables of A.
a.rand_mode(0);

// Turning on rand_mode.
a.rand_mode(1);

// Turning off random mode of particular random variable.
a.addr.rand_mode(0);

By default all variables random mode is ON.
64
Enabling/Disabling constraint mode.

class A;
rand bit [3:0] addr

constraint addr_c {
..
}
endclass

A a = new;

a.addr_c.constraint_mode(0);
a.randomize();
a.addr_c.constraint_mode(1);

By default all constraint blocks are enabled.
65
$urandom returns 32 bit unsigned number.
$urandom_range(maxval, minval) returns
any value between [minval, maxval].

bit [63:0] addr = {$urandom,$urandom};
int addr = $urandom_range(0,23);
66
Assignment :

Create a data class which has following random fields.
- typedef enum {untagged=0, singletagged, doubletagged} tagged
- typedef enum {Eth, ipv4, tcp} pkt;
- 8 bits preamble which has fixed pattern 8b10101010
- 48 bits Destination Address : Any random value
- 48 bits Source Address : Any random value
- rand tagged tag
- bit [31:0] pktTag[] Its size specified by tag
- int length
- bit [7:0] data[] : Its size specified by length.

Name this file as Packet.sv.
67
Packet structure is as below.

Preamble -> destAddr -> srcAddr -> No. of tags
-> Length -> Data

Pack the packet in data in Packet.sv inside
post_randomize().
Define one more function [not task] as
unpack() in Packet.sv to unpack the packet
into fields, whose input is dynamic array and it
returns instance of Packet.
68
Class A;
rand logic [3:0] addr;

constraint addr_c {
addr <= 12;
}
Endclass

Class B extends A;
constraint addr_c {
addr > 12;
}
Endclass

B b1;
b1 = new;

b1.randomize();

Q : What will be value of b1.addr?

69

MAILBOX
70
Mailbox
A mailbox is a communication mechanism that allows messages to be exchanged
between processes. Data can be sent to a mailbox by one process and retrieved by
another.

mailbox mbxTx;

Supports following methods :
new(int bound = 0) creating unbounded mailbox.
num returns no. of elements hold.
put(msg) put msg into mailbox.
try_put(msg) used for bounded mailboxes. Rturns 1 if msg is put successfully else 0.
get(ref msg) fetch msg from mailbox. Remove the msg.
try_get(ref msg) returns 1 if there is a msg else 0. Remove the msg.
peek(ref msg) get the element without removing the msg.
try_peek(ref msg) returns 1 if the if the msg available else 0. Do not remove the
msg.


71
Fifo with flow control
passes data between two processes
put() stimgen calls put() to pass data to bfm
get() bfm calls get() to retrieve data from stimgen.
Get is the blocking statement. Put is the blocking statement too for the
bounded mailboxes.
mailbox
stimgen bfm
put() get()
72
Class stimgen;
Packet pkt;
mailbox mbxGen;

function new();
pkt = new;
mbxGen = new;
endfunction

task run;
pkt.randomize();
mbxGen.put(pkt);
endtask
Endclass

Class bfm;
Packet pktbfm;
mailbox mbxBfm;

function new();
mbxBfm = new;
endfunction

task run;
mbxBfm.get(pktbfm);
endtask
Endclass
73
Parameterized Mailbox

mailbox #(Packet) mbxGen;
mailbox #(Packet) mbxBfm;

This mailbox will hold only msgs of data type
Packet.
74

SEMAPHORE
75
Semaphore
A semaphore is a bucket. When a semaphore is allocated, a bucket that
contains a fixed number of keys is created. Processes using semaphores
must first procure a key from the bucket before they can continue to
execute.

semaphore smTx;

Following methods are supported.

new(int keyCount = 0) create a semaphore. Provide integral no. of
keyCount.
put(int keyCount = 1) returns keyCount to semaphore.
get(int keyCount = 1) get keyCount from semaphore. Blocking statement.
try_get(int keyCount = 1) get the keyCount without blocking. Return 1 if
successful else 0.
76
Used for Synchronization
Variable number of keys can be put and removed
controlled access to a shared object
think of two people wanting to drive the same car the key is a semaphore
77
class A;
semaphore smDrv;

function new(1); // creating semaphore with 1 key.

task write(logic [31:0] addr, logic [31:0] data);
smDrv.get(1);
// Driving signals to DUT
smDrv.put(1);
endtask

task read(logic [31:0] addr, output logic [31:0] data);
smDrv.get(1);
// Driving signals to DUT.
smdrv.put(1);
endtask
endclass
78
Event
Event is mainly used for the synchronization purpose.

event ev;

fork
begin
#10;
-> ev;
$display(Event triggered);
end
begin
@(ev); // Blocking statement. Keeps waiting here..
$display(Event triggered received at %t,$time);
end
join
79

INTERFACE
80
Interface is bunch of signals. Used to connect RTL and Testbench.

interface bus_A (input bit clk);
logic [31:0] addr;
logic [31:0] data;
logic wr_rd_n;
logic enable;
endinterface

module mod_Bus( bit clk, logic [31:0] addr, logic [31:0] data, logic wr_rd_n, logic enable);
.
endmodule

module TOP;
bus_A busA(clk);
bit clk = 0;

// Clock generation logic.

mod_bus(.clk (clk),
.addr (busA.addr),
.data (busA.data),
.wr_rd_n (busA.wr_rd_n),
.enable (busA.enable)); // interface connected to RTL.
endmodule
81
Modport
interface i2;
wire a, b, c, d;
modport master (input a, b, output c, d);
modport slave (output a, b, input c, d);
endinterface

module m (i2.master i);
...
endmodule
module s (i2.slave i);
...
endmodule
module top;
i2 i();
m u1(.i(i));
s u2(.i(i));
endmodule
82
Clocking block
Used to define synchronous signals with their direction of drive.
Input/Output skew can also be defined.

Clocking wr_ck1 @(posedge clk);
output addr;
output data;
output wr_rd_n;
output enable;
Endclocking

Q : Are these signals driven on posedge of clock???
Is input also sample on posedge of the clock???
83

interface bus_A (input bit clk);
logic [31:0] addr;
logic [31:0] data;
logic wr_rd_n;
logic enable;

clocking wr_cb @(posedge clk);
default output #1ns;
output addr;
output data;
output wr_rd_n;
output enable;
endclocking

clocking rd_cb @(posedge clk);
default input #1ns output #1ns;
output addr;
input data;
output wr_rd_n;
output enable;
endclocking
endinterface
84
Separate skews for input and output signals.

clocking rd_cb @(posedge clk);
output #2ns addr;
input #1ns data;
.
endclocking

Q : what if user dont specify the skew?
85
Sampling and driving a signal using interface/clocking block.

-> Sync signals drive are processed as non-blocking
assignment.
busA.wr_cb.addr <= 32hABCD;
-> Sampling a sync signals value depends upon the clock and
skew.
addr = busA.addr; gives you a value at the time of
sampling where as

data = busA.rd_cb.dat will give you sync value of data.
86
Virtual Interface
Virtual interface is pointer to the interface defined in the top module.

module top;
bus_A busA;
..
endmodule

class Driver;
virtual interface bus_A busA;


endclass

All signal drive/sampling should happen through virtual interface.
87
Program Block

program test(interface bus_A);

PktEnv env; //PktEnv is a class.

initial begin
env = new(bus_A);
env.build();
env.connect();
env.driver.no_of_pkts = 1; // driver is instance of the class Driver inside PktEnv.

fork
begin
env.start();
end
begin
#100us;
$display(ERROR : Timeout occurs);
$finish;
end
join_any

disable fork;

env.report();
$display(Test Finished);
$finish;
end
endprogram
88
Assignment
Draw verification env.
Develop a class driver.sv and receiver.sv, Packet_intf.sv.
Driver.sv randomizes packet and drives out via
interface also send randomized packet to scoreboard.
Receiver.sv receives the packet driven by Driver via
interface. Display the received packet.
Packet_intf.sv define the interface signals, clocking
block.
Scoreboard.sv which does the data comparison. [Will
you guys be able to do this????]
89

COVERAGE
90
When you are done with the Verification?

Types of coverage
-> Functional coverage
-> Code Coverage

SystemVerilog talks about Funcational
Coverage.
91
Coverpoint

logic [3:0] addr;

cover_addr : coverpoint addr;

This covers all 16 cases.

Covergroup

covergroup g1 @(posedge clk);
cover_addr : coverpoint addr;
endgroup
92
Covergroup inside classes.

class A;
logic [3:0] addr;

covergroup g1 @(posedge clk);
cover_addr : coverpoint addr;
endgroup

function new ();
g1 = new;
endfunction
endclass

Q : What if I want to cover specific values of addr?
93
Defining bins of coverpoint.

bit [9:0] v_a;
covergroup cg @(posedge clk);
coverpoint v_a
{
bins a = { [0:63],65 };
bins b[] = { [127:150],[148:191] }; // note overlapping values
bins c[] = { 200,201,202 };
bins d = { [1000:$] };
bins others[] = default;
}
endgroup
94
Transition coverage

bit [4:1] v_a;
covergroup cg @(posedge clk);
coverpoint v_a
{
bins sa = (4 => 5 => 6);
bins allother = default sequence ;
}
endgroup
95
bit [4:1] v_a;
covergroup cg @(posedge clk);
coverpoint v_a
{
bins sa = (4 => 5 => 6), ([7:9],10=>11,12);
bins sb[] = (4=> 5 => 6), ([7:9],10=>11,12);
bins allother = default sequence ;
}
endgroup

96
Wildcard bins

wildcard bins g12_16 = { 4b11?? };

Wildcard transition bins

wildcard bins T0_3 = (2b0x => 2b1x);
97
Ignore bins

covergroup cg23;
coverpoint a
{
ignore_bins ignore_vals = {7,8};
ignore_bins ignore_trans = (1=>3=>5);
}
endgroup
98
Illegal bins

covergroup cg3;
coverpoint b
{
illegal_bins bad_vals = {1,2,3};
illegal_bins bad_trans = (4=>5=>6);
}
endgroup

Whenever illegal values are encountered run time then
ERROR will be flagged by Simulator.
99
Cross Coverage

logic rd_wr;
logic[3:0] addr;

covergroup g1 @(ev);
cov_ad_wr : coverpoint rd_wr; // 2 possible cases
cov_addr : coverpoint addr; // 16 possible cases
cross_cov : cross rd_wr, addr; // 16*2 possible cases.
endgroup
100
Example :

bit [31:0] a_var;
bit [3:0] b_var;
covergroup cov3 @(posedge clk);
A: coverpoint a_var { bins yy[] = { [0:9] }; }
CC: cross b_var, A;
endgroup

Q : How many possible cases for a_var, b_var and CC?
101

bit [7:0] v_a, v_b;

covergroup cg @(posedge clk);
a: coverpoint v_a
{
bins a1 = { [0:63] };
bins a2 = { [64:127] };
bins a3 = { [128:191] };
bins a4 = { [192:255] };
}

b: coverpoint v_b
{
bins b1 = {0};
bins b2 = { [1:84] };
bins b3 = { [85:169] };
bins b4 = { [170:255] };
}

c : cross v_a, v_b
{
bins c1 = ! binsof(a) intersect {[100:200]};
bins c2 = binsof(a.a2) || binsof(b.b2);
bins c3 = binsof(a.a1) && binsof(b.b4);
}
endgroup
102
Ignore Cross Product
covergroup yy;
cross a, b
{
ignore_bins foo = binsof(a) intersect { 5, [1:3] };
}
endgroup

Illegal Cross Product

covergroup zz(int bad);
cross x, y
{
illegal_bins foo = binsof(y) intersect {bad};
}
endgroup
103
Assignment
Develop PktCov.sv for Ethernet packet frame. List
down all the required coverage points, bins.

Trigger them from monitor/receiver to sample
the coverage using an event(s).

Take instance of PktCov inside Monitor/Receiver,
pass values to PktCov and trigger an event to
sample the value.
104


PUTTING ALL TOGETHER
105
1. Now, we have Packet.sv, Driver.sv, Monitor.sv [Receiver.sv],
Scoreboard.sv, PktCov.sv.
2. Develop PktEnv class into PktEnv.sv. Take instance of Driver, Monitor,
Scoreboard, PktCov. Also take instance of Mailbox which is of type
Packet.
3. Define following methods into Env. New, Build, connect, start, report.
4. Inside new, assign interface to the local virtual interface instance, which
is passed from testcase.
5. Inside Build, create all the instances.
6. Inside connect, pass scoreboard to Driver, PktCov to Monitor/Receiver,
Mailbox between Driver and Scoreboard.
7. In Start, call run of Driver, Monitor, Scoreboard.
8. Develop a test case using program block. Pass instance of interface in
argument. Call all the env threads from testcase [Only Me and Rutul will
Develop this].
106

RTL Driver
Data
Class
Seqcr Receiver
Scoreboard Model