Built-In Self Test

(BIST)
Built-In Self Test (BIST)
1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
Outline
Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)
1. Introduction
General Structure
Built-In Self Test (BIST)
General Structure
Unit
Under
Test
Data
Compressor
Data
Generator
Comparator
Display
Reference
BIST Controller
Start/Stop Ready
Electronic System
1. Introduction
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)
1. Introduction
Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
A fixed set of optimal test patterns, usually derived from
fault simulation, is used.
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
2. Pattern Generation
Built-In Self Test (BIST)
Pseudo-Random Generation using LFSR
2. Pattern Generation
Built-In Self Test (BIST)
Example of a 4-bit LFSR as a Pattern Generator.
Pseudorandom states generated by the LFSR.
Pseudo-Random Generation using LFSR
2. Pattern Generation
Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
3. Signature Analysis
Built-In Self Test (BIST)
3. Signature Analysis
Built-In Self Test (BIST)
Methods for Response
Evaluation
Steps for Response Evaluation:
1
2
3


r-Bit (Internal XOR) Signature Generator.
The content of the LFSR is the remainder of the division operation.
3. Signature Analysis

Serial
Built-In Self Test (BIST)
Built-In Self Test (BIST)

r-Bit (External XOR) Signature Generator.
The content of the LFSR is not the remainder of the division operation.

Serial
3. Signature Analysis

Serial
Example of a 4-bit (External) Signature Generator.
Built-In Self Test (BIST)
3. Signature Analysis

r-Bit (Internal XOR)
Parallel Signature Generator.

r-Bit (External XOR)
Parallel Signature Generator.

Parallel
Built-In Self Test (BIST)
3. Signature Analysis
Problem:
When compacting results, there is a probability of fault masking !
Probability of failing to detect an error in the response sequence:

Serial input

Parallel input
Where:
K: length of the sequence (#of bits)
r: length of the LFRS (#of bits)
2
mL- r
1
2
mL
1
2
k-r
1
2
k
1
Where:
L: length of the sequence (#of test vectors)
m: length of a vector (#of bits)
r: length of the LFRS (#of bits)
Built-In Self Test (BIST)
3. Signature Analysis
Built-In Self Test (BIST)
3. Signature Analysis
Modular LFSR Serial Compacter Example
Built-In Self Test (BIST)
3. Signature Analysis
Modular LFSR Parallel Compacter Example
Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
Built-In Self Test (BIST)
4. BIST Architectures
Built-In Logic Block Observer (BILBO)
4. BIST Architectures
Built-In Self Test (BIST)
Modular Bus-Oriented Design with BILBO.
Built-In Self Test (BIST)
4. BIST Architectures
Built-In Logic Block Observer (BILBO)
4. BIST Architectures
Built-In Self Test (BIST)
Built-In Self Test (BIST)
4. BIST Architectures
General Form of a BILBO
Example: 8-bit-Length Datapath
Built-In Self Test (BIST)
4. BIST Architectures
Built-In Self Test (BIST)
Example: 8-bit-Length Datapath
4. BIST Architectures
Built-In Self Test (BIST)
Example: 8-bit-Length Datapath
4. BIST Architectures
Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary
Built-In Self Test (BIST)