TEACHING CMOS CIRCUIT DESIGN IN NANOSCALE

TECHNOLOGIES USING MICROWIND

Etienne Sicard
Sonia Ben Dhia
Department of Electrical & Computer
Engineering
INSA University of Toulouse
France
e-mail:
etienne.sicard@insa-toulouse.fr
sonia.bendhia@insa-toulouse.fr

Syed Mahfuzul Aziz

School of Electrical &
Information Engineering
University of South Australia
Australia
e-mail:
mahfuz.aziz@unisa.edu.au

SUMMARY

1. CONTEXT
2. EDUCATIONAL NEEDS
3. MICROWIND

4. EVALUATION
5. PRESPECTIVES
7. CONCLUSION

CONTEXT

NANO-CMOS MORE AND MORE COMPLEX

2000

0.18 m

2005

90 nm

2010

32 nm

Devices

3 nMOS, 3 pMOS

6 nMOS, 6 pMOS

2V

1V

12 nMOS, 12 pMOS

Interconnects

Frequency

500 MHz

1V
1.5 GHz

5 GHz

CONTEXT

NANO-CMOS TEACHING CHALLENGE

Low K

Drain current (A/m)

Ion current
increase

Poly - SiO2

Double
patterning

10-3
10-4

Ideal
device

10-5

nMOS Strain
Metal gate
High K oxide
Pocket
implant
pMOS Strain

High-

10-6
10-7

Ioff current
decrease

10-8
10-9
10-10
0.0

0.5

1.0

Gate voltage (V)

The quest for the

perfect switch

CONTEXT

NANO-CMOS TEACHING CHALLENGE

Ioff (nA/m)
Parasitic
consumption
Networking
High
- end
servers1000
Computing
Servers

High (x 10)

Consumer
Mobile
Computing

Moderate
(x 1)
Digital camera 3G phone
s

Low
(x 0.1)

MP3

100

High
speed

General
Purpose

2G phones

Super low
leakage

10

Super
high
speed

Personal org.
Low leakage
1

Low
(-50%)

Moderate
(0%)

Speed

Fast
(+50%)

500

1000

1500

Ion (A/m)
5

CONTEXT

NANO-CMOS COMPLEXITY CHALLENGE

Teaching cell design still necessary ?
Complexity
(Millions transistors)

Technology
always ahead

RF
RS

1000

Host
Interface

System design

IP design

100

Code
ManagerLink
Controller

Logic design
10
1

Layout design

0.1

1995

1998

2001

2004

2007

2010

2013
Microwind
6

EDUCATIONAL NEEDS

TEACHING NANO-CMOS TRENDS

The commercial chip design tools
available today are very powerful
However, these tools are highly complex
and need long time to learn.
Teaching hours in Nano-CMOS are
decreased
Physics of semiconductors are
exploding in complexity (100-1000
parameters in MOS models)
Student and engineer diversity must be
considered. Gaps in the background
knowledge must be addressed

Teaching
hours
Physics
CMOS design

Embedded
software
System
integration
Years

EDUCATIONAL NEEDS

TEACHING NANO-CMOS NEEDS

Tools should be used by large number
of students at undergraduate level
Design tools should provide intuitive
design, simulation and visualization
environments

Reduced number of
students
Educational
tools

Ambitious designs

Graduates

Design tools should be easily

accessible. Most of the work is done out
of regular teaching hours (e-learning,
project-based..)
Target course and practical training
duration: 15 H

Long practical
sessions
:

PhDs

Professional
tools

Short
sessions
:
Simple design
Concepts

Undergraduates

Large number of students

Learning curve
Educationoriented tools

Rapid
progress

Industryoriented
tools
Slow
progress

10

15

Hours

20

MICROWIND

COURSE CONTENTS (1-2 days)

Equivalent Gate
Dielectric Thickness
(nm)

Technology scale down, where we come from,

where we are (45 nm), where we go..

10nm

High voltage
MOS (double
gate oxide)

0.25m
0.18m
0.13m
90nm

A tutorial on MOS devices, based on problembased learning

Technology
addressed in
2010

65nm 45nm

1nm
Low voltage
MOS (minimum
gate oxide)

32nm
22nm 18nm
11nm
HighK (r=7-20)

SiON (r=4.2-6.5)

0.1nm

The design of inverters, and a simple ring

oscillator, and a small student contest.

SiO2 (r=3.9)
1995

2000

Year
2005

2010

2015

The design of basic logic gates introducing

interconnect design, compact design strategies,
and impact on switching speed and power
consumption.
The design of analog blocs introducing
amplification, voltage reference, addition of analog
signals, and mixed-signal blocs

A design project, e.g. converter, processing unit,

OpAmp, radio-frequency block, etc..

MICROWIND

INTRODUCTION THE TOOL

User-friendly and intuitive
design tool for educational use.
The student draws the masks of
the circuit layout and performs
analog simulation

Editing icons

Layout
library
2D, 3D views

One dot on the

grid is 5
lambda, or
0.175 m

Access to
simulation

Simulation
properties

The tool displays the layout in

2D, static 3D and animated 3D
Editing window
Palette of layers

Active technology
Ion current

List of model
parameters
for BSIM4

Threshold voltage effect

Voltage
cursors

Memory effect due to

source capacitance

10

MICROWIND

1.

MOS DEVICE

2.

Traditional teaching : in-depth

explanation of the
potentials, fields, threshold
voltage, and eventually the
expression of the current
Ids
Our approach : step-by-step
illustration of the most
important relationships
between layout and
performance.
1.

Design of the MOS

2.

I/V Simulation

3.

2D view

4.

Time domain analysis

4.
3.

11

MICROWIND

BASIC GATE DESIGN

Illustration of the most important
relationships between layout
and performance.
1.

Design of pMOS

2.

Design of inverters

3.

Design of a VCO

4.

Try to optimize the VCO for

highest possible speed

5.

Improve MOS size

6.

Change MOS options

7.

Make the layout more

compact

8.

Keep an eye on power

consumption

2.

1.

3.
4.

12

MICROWIND

PROJECT EXAMPLES
engage students in a stimulating
learning experience using
latest CMOS technologies
1.

Circuit analysis and

optimization using WinSpice

2.

Combinational and
sequential circuit layouts

3.

ALU Design

4.

Power amplifier Bluetooth

1.

3.

2.

4.
13

EVALUATION

AUDIENCE
The VLSI course was evaluated
anonymously by the students
UNISA course evaluation
questionnaire containing ten core
questions and open text
response.
The students rated the course
very highly in all the evaluation
items.
The course in the in the top-5
courses offered in engineering in
UniSA.
(off-line: Dr. Aziz won the top
teacher of the year in Australia
2009)

Question

I have a clear idea of what is expected of me in this

course.

The ways in which I was taught provided me with

opportunities to pursue my own learning.

The course enabled me to develop and/or strengthen a

number of the qualities of a [University of South
Australia,INSA] graduate.

I felt there was a genuine interest in my learning needs

and progress.

The course developed my understanding of concepts and

principles

The workload for this course was reasonable given my

other study commitments

I have received feedback that is constructive and helpful.

The assessment tasks were related to the qualities of a

[University of South Australia, INSA] graduate.

The staff teaching in this course showed a genuine

interest in their teaching.

10 Overall I was satisfied with the quality of this course

14

EVALUATION

RESULTS
Answers to questionnaire
INSA

90%
80%
70%
60%
50%
40%
30%
20%
10%
0%

% response

% response

UNISA

10

80%
70%
60%
50%
40%
30%
20%
10%
0%
1

Evaluation item #
Strongly agree

Agree

Neutral

Disagree

Evaluation item #
Strongly disagree

Strongly agree

Agree

Neutral

Disagree

Strongly disagree

5. The course developed

my understanding of
concepts and principles

15

10

EVALUATION

COMMENTS
Students
From just a few logic gates, we have created
a 4-stage binary counter and compiled it into
layout. It also gave us the basic concepts to
understand the operation of the transistors in
order to extract their models.
The 24-hours clock project was a good
exercise which permitted us to see how it is
inside a semiconductor and how it works.

We learned a lot about designing integrated

circuit. We faced some practical problems,
and tried to solve them or to understand
them.
This study allows us to understand the DAC
running. In spite of some design problems,
we managed to make the DAC work well.
Before doing this project, we hadnt thought
that there are as many ways to realize an
amplifier. Its an area not easy to understand.
Each technique has its limit. We tried to
optimize our operational amplifier design to
maximize the gain.

Teachers
The tools along with the project-based
course resources have assisted us to
develop an educational program in our
Bachelor of Engineering Program. The tools
offer easy to use menus for design and
simulation, and the choice of a range of
technology models to enable students to
develop critical design and analysis skills
using the latest technologies. (Malaysia).
Microwind and Dsch tools are used for VLSI
teaching programs at both postgraduate and
undergraduate levels. The project-based
methodology supported by a variety of
learning resources has made the learning
of VLSI Design very stimulating.
(Bangladesh).

Exploring the tools is a lot of fun. The

interface is very friendly, and the program is
both educational and useful for designing
CMOS chips. (USA)
16

PERSPECTIVES

Application note on 32 nm
& 22 nm technologies

Application note on
process variability and
Monte-Carlo simulation

3D views of packages
based on IBIS

3D views of carbon-nano
tubes

17

CONCLUSION

Intuitive and user friendly design tools enabled students to develop circuit
design skills using nano-CMOS technologies

Illustrations (2D, 3D, I/V) help to handle increased process complexity and
refinements

Effective project-based learning methodologies, helping to understand the

impacts of technology scale down on factors such as speed, power and
noise.

Digital and analog basic bloc design with high levels of student satisfaction.

Projects stimulate student curiosity and thinking.

Software to be tuned to 22, 17 and 11 nm technologies

Novel devices to be introduced when appropriate

18

REFERENCES

[1] E. Sicard and S. Ben Dhia Basic CMOS Cell

Design McGraw Hill professional series, 2006.
[2] E. Sicard and S. Ben Dhia Advanced CMOS
Cell Design McGraw-Hill professional series, 2007.
[3] E. Sicard, Microwind & Dsch User's Manual,
Version 3.5, June 2009. Online at
www.microwind.org.
[4] S. M. Aziz, E. Sicard, S. Ben Dhia Effective
Teaching in Physical Design of Integrated Circuits
using Educational Tools to appear IEEE Trans
Education, 2010

The tool, manual and course

slides are online at
www.microwind.org
19

REFERENCES
MICROWIND DOWNLOADS www.microwind.net

20

THANK YOU FOR YOUR ATTENTION

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