Phase-Locked Loop

Phase-Locked Loop in RF Receiver

Antenna

BPF1

LNA

BPF2

Mixer BPF3 IF Amp

Demodulator

RF front end
LO
Ref.

VCO

PD

Loop
Filter
1/N

PhaseLocked
Loop
2

Functional Blocks in PLL

Ref

VCO

PD

Loop
Filter
1/N

LO
PhaseLocked
Loop

Phase detector (PD): find difference between

phases of two signals
Loop filter: provide appropriate control voltage
for the voltage-controlled oscillator (VCO)
VCO: generate signals with phase determined
by the control voltage
Divide-by-N: LO phase changes N times faster
than Ref phase
3

Design Issues
Tracking behavior
Noise performance
Jitter characteristics
Jitter tolerance
Jitter transfer
Jitter generation

Power consumption

System Modeling
vRef

PD

vd

F(s)

vC

VCO
vLO

vRef: input reference signal

vLO: local oscillator (LO) output signal
vd: detector output
F(s): transfer function of loop filter
vC: control voltage for VCO
5

System Modeling
vRef

qRef
PD

Kdqe

VCO
F(s)

vLO

qLO

Phase signals contain information

qRef: phase of reference signal
qLO: phase of local oscillator (LO) signal
qe: phase difference between qRef and qLO

Jump in Phase

dq LO
0 5(q REF q LO )
dt

Ramp in Phase

dq LO
0 5(q REF q LO )
dt

Ramp in Phase

t
dq LO
0 5(q REF q LO ) 5 (q REF q LO )d
dt
0

Phase Detector
qREF

qe

Kd

vd

qLO

Vd=Kdqe=Kd(qREF qLO)
Kd: gain of phase detector

10

Loop Filter
vd

F(s)

vC

VC(s) = F(s) Vd(s)

Low-pass filter
Extract phase error
Remove high frequency noises

Passive filter for integrated PLL

Active filter for discrete component PLL
11

Passive Lag Filter

R1

+
vd

R2

1 s 2
1 s ( 1 2 )

F (s)

vC

1 R1C
2 R2C

2
1 2
1
1 2

Lag filter: pole magnitude smaller than zero

Passive components: high linearity, gain < 1

12

Active Lag Filter

R1

C1

R2

+
vd

C2

F (s) K a

Ka

1 s 2
1 s 1

1 R1C1
vC R C
2
2 2

K a C1 / C2

Ka

1
1

C1
C2

2 R2

1 R1

Can adjust pole and zero locations

Can have gain
Op amp limitations
13

Active Proportional-Integral (PI) Filter

R1

R2

+
vd

F (s)

vC

1 R1C
2 R2C

1 s 2
s 1
R2
R1
1

Large open loop gain at low frequency

Op amp limitations
Linearity
Noise
Open loop gain
14

Voltage-Controlled Oscillator
vC

KVCO

1/s

qLO

qLO 0 KVCO vC

KVCO: gain of VCO

15

Transfer Function of PLL

0
qREF

qe

Kd

vd

F(s)

vC

KVCO

1/s

qLO

qLO

Open-loop transfer function from qe to qLO

K d KVCO F ( s)
A( s)
s
16

Transfer Function of PLL

0
qREF

qe

Kd

vd

F(s)

vC

KVCO

1/s

qLO

qLO

Closed-loop transfer function from qREF

to qLO
LO ( s )
A( s )
K d KVCO F ( s )
H (s)

REF ( s ) 1 A( s ) s K d KVCO F ( s )
17

Transfer Function from qREF to qe

0
qREF

qe

Kd

vd

F(s)

vC

KVCO

1/s

qLO

qLO

Closed-loop transfer function

e ( s) REF ( s) LO ( s) REF ( s) H ( s) REF ( s)
e ( s)
s
H e ( s)
1 H ( s)
REF ( s)
s K d KVCO F ( s)
18

Other TF of Interest
vCn
qREF

qe

Kd

vd

F(s)

vC +

KVCO

1/s

qLO

qLO

Noise in control voltage

[VCn ( s) K d F ( s) LO ( s)]KVCO / s LO ( s)
LO ( s)
KVCO

VCn ( s) s K d KVCO F ( s)
19

Other TF of Interest
qn
qREF

qe

Kd

vd

F(s)

vC

KVCO

1/s

qLO

qLO

Phase noise of VCO

n ( s) K d KVCO F ( s) LO ( s) / s LO ( s)
LO ( s)
s

n ( s) s K d KVCO F ( s)
20

Transfer Functions for Different Loop

Filters
Passive lag filter
1 s 2
F (s)
1 s ( 1 2 )

Active lag filter

1 s 2
F (s) K a
1 s 1

K d KVCO
(1 s 2 )
1 2
H (s)
1 K d KVCO 2
K K
s2
s d VCO
1 2
1 2
K d KVCO K a
H (s)
s
2

Active PI filter
1 s 2
F (s)
s 1

1 K d KVCO K a 2

K d KVCO

H (s)
s
2

(1 s 2 )

(1 s 2 )

K d KVCO 2

K d KVCO K a

K d KVCO

21

Normalizing Transfer Function

Normalized denominator
D( s ) s 2 2 n s n2 ,

n : natural frequency; : damping ratio

Passive lag filter

n

K d KVCO
1 2

1
( 2
)
2
K d KVCO

Active lag filter

n

K d KVCO K a

( 2

1
K d KVCO K a

Active PI Filter
n

K d KVCO

2
22

Normalized Transfer Function

Passive lag filter
H ( s)

(2 n

) s n2

K d KVCO
s 2 2 n s n2

Active lag filter

H ( s)

n2

(2 n

n2

) s n2

K d KVCO K a
s 2 2 n s n2

Active PI Filter
2 n s n2
H ( s) 2
s 2 n s n2
23

Normalized Transfer Function

2 n s
H ( s) 2
s 2 n s n2
2
n

H e ( s)

s 2 2 n s n2

Passive lag filter

K d KVCO

Active lag filter

K d KVCO K a

2
24

Frequency Response of H(s)

2 n s n2
H ( s) 2
2
s 2 n s n

25

Frequency Response of He(s)

H e ( s)

s2
s 2 n s
2

2
n

26

Step Response of PLL

Phase step
q REF (t ) q u(t ) REF (s) q / s

Phase Error
e ( s ) H e ( s )q / s

q s
s 2 2 n s n2

nt
2
2

q
[cos(
1

t
)

sin(
1

t
)]
e
, 1;
n
n

2
1

qe (t ) q (1 nt ) exp( nt ), 1;

q [cosh( 2 1nt )
sinh( 2 1nt )]e nt , 1.

2 1

Steady state error (final value theorem)

q s 2
qe () lim s e (s) lim 2
0
s0
s0 s 2 s 2
n
n
27

Step Response

H e ( s)

s 2 2 n s n2

28

Ramp Response of PLL

Phase ramp
q REF (t ) tu(t ) REF ( s) / s 2

Phase Error
e ( s ) H e ( s ) / s 2

s 2 2 n s n2

1

nt
2
sin(
1

t
)
e
, 1;
n

2
n 1

q e (t ) t exp( nt ), 1;

1

sinh( 2 1nt )e nt , 1.
n 2 1

Steady state error (final value theorem)

q e () lim s e ( s ) lim
s 0

s 0

s
0
2
2
s 2 n s n
29

Ramp Response

H e ( s)

s2
s 2 n s
2

2
n

30

General Steady State Error in Ramp Response

s
H e (s) 1 H (s)
s K d KVCO F ( s )

e ( s ) H e ( s ) / s 2

/ s
s K d KVCO F ( s )

High loop gain

F (0) q e () lim s e ( s ) lim

0
s 0
s 0 s K K
d VCO F ( s )

Low loop gain

qe () lim s e ( s) lim
s 0

s 0

s K d KVCO F ( s ) K d KVCO F (0)

31

Stability of PLL
Criterion for stability
Closed-loop pole at left half plane
Sufficient phase margin

Control of pole location

Open loop gain
Open loop zero

Check root locus

A( s )
K d KVCO F ( s ) / s
H (s)

1 A( s ) 1 K d KVCO F ( s ) / s
32

Root Locus Method

Closed-loop TF
K d KVCO F ( s ) / s
K n( s )
H (s)

1 K d KVCO F ( s) / s d ( s) K n( s )
where
K K d KVCO and F ( s ) / s n( s ) / d ( s ).

Closed-loop poles make

d (s) K n(s) 0

K=0, open-loop poles

K infinity, open-loop zeros or infinity
33

Root Locus for Passive Lag Filter

F ( s ) 1 1 s 2

s
s 1 s ( 1 2 )

34

Root Locus for Active Lag Filter

F ( s ) 1 1 s 2

s
s 1 s 1

35

Root Locus for Active PI Filter

F ( s ) 1 1 s 2

s
s s 1

36

Root Locus for 1st-Order LP Filter

F ( s) 1 1

s
s 1 s 1

37

Effects of Parasitics
F ( s) 1 1
1

s
s 1 s 1 1 0.1s 1

38

Effects of Zero
F ( s ) 1 1 1 2 s 2

s
s 1 s 1 1 0.1s 1

39

Phase Noise and Jitter

Phase noise
Fluctuation in phase
Frequency domain
Discussed in RF circuits

Jitter
Error in clock edge (period)
Time domain
Significant in communications circuits

Two concepts
Related to each other
Exact relationship not clear

40

Jitter Measurements

Agilent, Understanding Jitter and Wander Measurements and Standards.

41

Jitter Tolerance
Ability of a PLL to operate with jitter
Applied to its reference
Various magnitudes
Different frequencies

Usually specified using an input jitter mask

Jitter magnitude and corner frequencies
BER requirement
Various for standards

42

PLL in Clock and Data Recovery

0

Ideal
signal
Distorted
signal
Ideal
clock

0
Recovered
clock

43

Jitter Tolerance Mask

44

Jitter Tolerance Measurement

45

Jitter Tolerance Measurement

46

Jitter Tolerance Measurement

Error at corner frequency

Insufficient clock recovery bandwidth
Incorrect mask used
47

Jitter Tolerance Measurement

Tolerance margin

Excessive jitter tolerance margin

48

Jitter Tolerance Measurement

Occasional fail at specific frequencies

Need extra settling time after jitter amplitude change

Repeating with additional settling time

Spot measurement
49

Jitter Tolerance Measurement

Limited clock recovery bandwidth

Eye-width alignment noise
50

Jitter Tolerance Measurement

Limited buffer store

51

Jitter Transfer
Jitter transfer or jitter attenuation
Output jitter vs. input jitter
Input jitter with various amplitudes and frequencies
Output jitter measured with various bandwidths

Intrinsic jitter
Typically specified using a bandwidth plot
Amplitude
Roll off speed
Corner Frequency

52

Jitter Transfer Mask

53

Jitter Transfer Measurement

Jitter tolerance mask used to set input jitter level

Sinusoidal jitter at magnitudes and frequencies
Narrow-band measurement
54

Jitter Transfer Measurement

Different test masks

SONET mask: additional amplitude at lower band
55

Jitter Transfer Measurement

Measurement set-up noise

-40 dB sufficient
56

Jitter Transfer Measurement

Low-frequency phase noise

Power-line crosstalk
Short measurement time
57

Jitter Transfer Measurement

Incorrect filter characteristic

Excessive peaking
58

Jitter Transfer Plot

E. Barari, Jitter Analysis / Specification, May 2002.

59

Measured Jitter Transfer Characteristic

E. Barari, Jitter Analysis / Specification, May 2002.

60

Measured Jitter Transfer Characteristic

E. Barari, Jitter Analysis / Specification, May 2002.

61

Measured Jitter Transfer Characteristic

E. Barari, Jitter Analysis / Specification, May 2002.

62

Measured Jitter Transfer Characteristic

E. Barari, Jitter Analysis / Specification, May 2002.

63

Jitter Generation
Intrinsic jitter produced by the PLL
Thermal noise
Drift in VCO

Measured at its output

Applying a clear reference signal to PLL
Measuring its output jitter.

Usually specified as a peak-to-peak period

jitter value

64

Jitter Generation Standard

65

Jitter Generation Measurement

Direct measurement of p-p jitter
Phase noise measurement
Eye diagram and histogram

66

Jitter Generation Measurement

67

Measurement Considerations

Calibration
Measurement range
Measurement time
Power
Frequency offset

68

TF from Noise in VCO Control Voltage

vCn
-1

Kd

F(s)

KVCO/s

qLO

LO ( s )
KVCO
KVCO s
H C ( s)

2
VCn ( s ) s K d KVCO F ( s ) s 2 n s n2

Can be viewed as low-pass filter

69

TF from Noise in VCO Control Voltage

H C (s)

s
s 2 2 n s n2

70

TF from Phase Noise in VCO

qn
-1

Kd

F(s)

KVCO/s

qLO

LO ( s)
s
s2
Hq ( s)

2
n ( s) s Kd KVCO F (s) s 2 n s n2

High-pass filter
The same as He(s)
71

Phase Error in VCO

vCn
HC(s)
qREF

qe

Kd

F(s)

KVCO/s

qn
Hq(s)
qLO

qLO

vCn dominate at low frequencies

qn dominate at high frequencies
72