Вы находитесь на странице: 1из 120

ETR 271 Microcomputer

Electronics I

September 2014
Johnny Cornett

Homework
Chapter 3
3.1, 3.2, 3.5, 3.6, 3.8, 3.15, 3.33,

3.36, 3.39, 3.44


Due 10 September
Chapter 4
4.4, 4.5, 4.9, 4.12, 4.14, 4.20, 4.22,

4.31
Due 17 September
ETR 271 Digital Circuits Fall 2014

Objectives
Logic Functions and Circuits
Boolean Algebra
Logic Gates
Analysis Process
Synthesis Process

ETR 271 Digital Circuits Fall 2014

Binary Switches
Discreet

switches are a good analogy to digital


(binary) switches. Transistors operate in a similar
manner to switches
closed

open

Two states of a switch (open/closed)


open

ETR 271 Digital Circuits Fall 2014

closed

of

on

false

true

1
4

Binary Switches
Light

switches are a good analogy to digital


(binary) switches

Switch

Battery

Light

Status of switch (x) determines if Light is ON or OFF


If x = 0, switch is OPEN, Light is OFF (0)
If x = 1, switch is CLOSED, Light is ON (1)
L(x) = x
ETR 271 Digital Circuits Fall 2014

Series Connection (AND)


Two

switches are placed in series, so BOTH


must be closed for light to turn on
S

Battery

x1

S
x2

Light

Status of 2 switches (x1, x2) determines if Light is ON of


OFF
If x = 1 AND x = 1 switches are both CLOSED, Light is
1

ON
Otherwise, Light is OFF (if either switch is 0)

ETR 271 Digital Circuits Fall 2014

L(x1,x2) = x1
x2

Parallel Connection (OR)


Two switches are placed in parallel, so if EITHER is
closed the light will turn on
S
x1

Power
supply

Light

x2

Status of 2 switches (x1, x2) determines if Light is ON of


OFF
If x = 1 OR x = 1 switches are CLOSED, Light is ON
1

Light is OFF only if BOTH switches are open

ETR 271 Digital Circuits Fall 2014

L(x1,x2) = x1
+ x2

Combination of Connections
Three switches are placed in series and parallel

S
X

Power
supply

S
X

Light

X
2

When will the light turn on? L (x1, x2, x3) = ?


L(x1,x2) = (x1 + x2) x3
ETR 271 Digital Circuits Fall 2014

Inversion/Complement
What

if we want the light ON when x = 0?

What will the circuit look like?


R
Power
supply

Light

L(x) = x
L(x) = x = !x = ~x = NOT x
ETR 271 Digital Circuits Fall 2014

The Inverter

The inverter performs the Boolean NOT


operation. When the input is LOW, the output
is HIGH; when the input is HIGH, the output is
LOW.
Input

Output

LOW (0)
HIGH
(1) (1)
(0)

HIGH
LOW

The NOT operation (complement) is shown


with an overbar. Thus, the Boolean expression
for an inverter is X = A.
ETR 271 Digital Circuits Fall
2014

The Inverter
Example
waveforms:
A
X

A group of inverters can be used to form the


1s complement of a binary
number:
Binary
number
1
0

ETR 271 Digital Circuits Fall


2014

0
1

1
1
0
01s complement

The AND

A
Gate
B

A
B

&

The AND gate produces a HIGH output


when all inputs are HIGH; otherwise, the
output is LOW. For
a 2-input
gate, the truth
Inputs
Output
table is
A B
X
0
0
1

0
1

0
0
0
1

The AND operation0is usually shown with a


1
dot between the variables
but it may be
1
implied (no dot). Thus,
the AND operation is
written as X = A .B or X = AB.
ETR 271 Digital Circuits Fall
2014

The AND

A
Gate
B

A
B

&

Example
waveforms:
A
B
X

The AND operation is used in computer


programming as a selective mask. If you want
to retain certain bits of a binary number but
reset the other bits to 0, you could set a mask
with 1s Ifinthe
thebinary
position
of the 10100011
retained bits.
number
is
ANDed with the mask 00001111,
00000011
what is the result?
ETR 271 Digital Circuits Fall
2014

1
A
X
A
X
The OR Gate
B
B
The OR gate produces a HIGH output if any
input is HIGH; if all inputs are LOW, the output
is LOW. For a 2-input
Inputs gate,
Output the truth table is

0
0
1

0
1

0
1
1
1

The OR operation is0 shown with a plus sign


1
(+) between the variables.
Thus, the OR
1
operation is written as X = A + B.
ETR 271 Digital Circuits Fall
2014

A
B

The OR Gate

A
B

Example
waveforms:
A
B
X

The OR operation can be used in computer


programming to set certain bits of a binary
numberASCII
to 1.letters have a 1 in the bit 5
position for lower case letters and a 0 in
this position for capitals. (Bit positions
are numbered from right to left starting
with 0.) What will be the result if you OR
an
letterletter
with will
the be
8-bit
mask
TheASCII
resulting
lower
case.
ETR 271 Digital Circuits Fall
00100000?
2014

A
The NAND Gate
B

A
B

&

The NAND gate produces a LOW output


when all inputs are HIGH; otherwise, the
output is HIGH. ForInputs
a 2-input
Output gate, the truth
table is
A B
X
0
0
1
1

0
1
0
1

1
1
1
0

The NAND operation is shown with a dot


between the variables and an overbar
covering them. Thus, the NAND operation is
.
written
as
X
=
A
B (Alternatively, X = AB.)
ETR 271 Digital Circuits Fall
2014

A
The NAND Gate
B
Example
waveforms:
A

A
B

&

B
X

The NAND gate is particularly useful because


it is a universal gate all other basic gates
can be constructed from NAND gates.
How would you connect a 2-input
NAND gate to form a basic inverter?
ETR 271 Digital Circuits Fall
2014

1
A
X
A
X
The NOR Gate
B
B
The NOR gate produces a LOW output if
any input is HIGH; if all inputs are HIGH,
the output is LOW. For a 2-input gate, the
truth table is
Inputs Output

A B

1
0
0
0
0
1
0
1 is shown with a plus sign
The NOR operation
0
(+) between the variables
and an overbar
1
covering them. Thus,
the NOR operation is
written as X = A + 1B.

ETR 271 Digital Circuits Fall


2014

The NOR

A
Gate
B

A
B

Example
waveforms:
A
B
X

The NOR operation will produce a LOW if any


input is HIGH.
+5.0 V

When is the LED is ON for the


circuit shown?
A
B
The LED will be on
C
D
when any of the four
inputs are HIGH.
ETR 271 Digital Circuits Fall
2014

330
X

=1
A
X
A
X
The XOR Gate
B
B
The XOR gate produces a HIGH output only
when both inputs are at opposite logic levels.
The truth table is

Inputs
A

0
0

0
1

Output
X

0
1
1
0

1 is written as X = AB +
The XOR operation
0
AB. Alternatively, it can be written with a
1
circled plus sign between
the variables as
1
X = A + B.
ETR 271 Digital Circuits Fall
2014

The XOR

A
Gate
B

A
B

=1

Example
waveforms:
A
B
X

Notice that the XOR gate will produce a HIGH


only when exactly one input is HIGH.
If the A and B waveforms are both
inverted for the above waveforms, how
is
the output
afected?
There
is no change
in the output.
ETR 271 Digital Circuits Fall
2014

Complement
What if we have more than one variable?

What is the complement of: L(x1, x2) = x1 +


x2?
L(x1,x2) = (x1 +
x2)

ETR 271 Digital Circuits Fall 2014

22

Truth Tables
Create a table to determine what the outcome
is for a variety of input values
1. First columns are input variables (x1, x2, etc.)
2. Next columns are outcomes/outputs

x x
0
0
1
1
1

0
1
0
1
2

ETR 271 Digital Circuits Fall 2014

x1
x0
2

x1+
x02

0
0
1

1
1
1

AND

OR

NOT (x1 + x2)


1
0
0
0
NOT

23

Truth Tables
Practice
Create truth tables for the following functions:
F(x1, x2) = x1 + x2
G(x1, x2, x3) = (x1 +
x2) x3
H(x, y) = (x y)
J(x, y) = x + y
K(x) = x + 1
ETR 271 Digital Circuits Fall 2014

24

Selected Key Terms


Inverter A logic circuit that inverts or
complements its inputs.
Truth table A table showing the inputs and
corresponding output(s) of a logic
circuit.
Timing A diagram of waveforms showing the
diagram proper time relationship of all of the
waveforms.
A logic gate that produces a HIGH
AND gate output only when all of its inputs are
HIGH.
OR gate A logic gate that produces a HIGH output
when one or more inputs are HIGH.

ETR 271 Digital Circuits Fall 2014

25

Selected Key Terms


A logic gate that produces a LOW output
NAND gate only when all of its inputs are HIGH.
A logic gate that produces a LOW output
NOR gate when one or more inputs are HIGH.
A logic gate that produces a HIGH output
Exclusive- only when its two inputs are at opposite
OR gate levels.

Exclusive- A logic gate that produces a LOW output


NOR gate only when its two inputs are at opposite
levels.

ETR 271 Digital Circuits Fall 2014

26

Quiz
1.The truth table for a 2-input AND gate is
Inputs
a.

0
0
1
1

0
1
0
1

0
1
1
0

Inputs

c.

Output

Inputs
b.

Output

Output

0
0
1
1

0
1
0
1

1
0
0
0

Inputs

Output

0
0
1
1

0
1
0
1

0
0
0
1

0
0
1
1

0
1
0
1

0
1
1
1

ETR 271 Digital Circuits Fall 2014

d.

27

Quiz
2.The truth table for a 2-input NOR gate is
Inputs
a.

0
0
1
1

0
1
0
1

0
1
1
0

Inputs

c.

Output

Inputs
b.

Output

Output

0
0
1
1

0
1
0
1

1
0
0
0

Inputs

Output

0
0
1
1

0
1
0
1

0
0
0
1

0
0
1
1

0
1
0
1

0
1
1
1

ETR 271 Digital Circuits Fall 2014

d.

28

Quiz
3.The truth table for a 2-input XOR gate is
Inputs
a.

0
0
1
1

0
1
0
1

0
1
1
0

Inputs

c.

Output

Inputs
b.

Output

Output

0
0
1
1

0
1
0
1

1
0
0
0

Inputs

Output

0
0
1
1

0
1
0
1

0
0
0
1

0
0
1
1

0
1
0
1

0
1
1
1

ETR 271 Digital Circuits Fall 2014

d.

29

Quiz
6. A logic gate that produces a HIGH output
only when all of its inputs are HIGH is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate

ETR 271 Digital Circuits Fall 2014

30

Quiz
8. A 2-input gate produces the output shown.
(X represents the output.) This is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate
A
B
X
ETR 271 Digital Circuits Fall 2014

31

Quiz
9. A 2-input gate produces a HIGH output
only when the inputs agree. This type of gate
is a(n)
a. OR gate
b. AND gate
c. NOR gate
d. XNOR gate

ETR 271 Digital Circuits Fall 2014

32

Logic Symbols
When drawing a circuit, it is helpful to have
symbols to describe the logical functions (AND,
OR, NOT)

x1
x2

x1x2

AND
gate

ETR 271 Digital Circuits Fall 2014

x1
x2

x1+x2

OR
gate

NOT
gate

33

Analysis of Logic Network


A logic network can be analyzed by truth
table
f (x1,x2) = x1 + (x1
x2)
1. Create the truth table for f
2.

Draw the network, using logic symbols

ETR 271 Digital Circuits Fall 2014

34

Analysis of Logic Network


f (x1,x2) = x1 + (x1 x2)
x1

x2
A

A
B

x1 x2 f(x1,x2)
0 0
1
0 1
1
1 0
0
1 1
1

A
1
1

B
0
0

and B are intermediate points in the network 0


0
helps us understand (and verify) what is happening
1
within the network
ETR 271 Digital Circuits Fall 2014

35

Equivalent Networks

Is there another network that will output the sam


result?
x x
f (x , x )
A
1 2
1 2
g (x1,x2) = ?
B
0
0
1
1

x
1
x
2

0 0 1 1

1 1 0 0

0 1 0 1

0
1
0
1

1
1
0
1

1
1
0

1 1 0 1

g 0

0
0
0
1

Which network is better? Why?

ETR 271 Digital Circuits Fall 2014

37

Boolean Algebra

ETR 271 Digital Circuits Fall 2014

38

Boolean Addition
In Boolean algebra, a variable is a symbol
used to represent an action, a condition, or
data. A single variable can only have a value
of
1 or
0.
The
complement
represents the inverse of a
variable and is indicated with an overbar.
Thus,
the is
complement
of its
A is
A.
A literal
a variable or
complement.
Addition is equivalent to the OR operation.
The sum term is 1 if one or more if the literals
are 1. The sum term is zero only if each literal
is 0.
Determine the values of A, B, and C that
make the sum term of the expression A +
B
+ Cliteral
= 0? must = 0; therefore A = 1, B
Each
= 0 and C = 1.

ETR 271 Digital Circuits Fall


2014

Boolean Multiplication
In Boolean algebra, multiplication is
equivalent to the AND operation. The product
of literals forms a product term. The product
term will be 1 only if all of the literals are 1.
What are the values of the A, B and
C if the product term of A.B.C = 1?
Each literal must = 1; therefore A =
1, B = 0 and C = 0.

ETR 271 Digital Circuits Fall


2014

Commutative Laws
The commutative laws are applied to
addition and multiplication. For addition, the
commutative law states
In terms of the result, the order in
which variables are ORed makes no
difference.
A+B=B
+A
For multiplication, the commutative law
states
In terms of the result, the order in
which variables are ANDed makes no
difference.
AB =
BA
ETR 271 Digital Circuits Fall
2014

Associative Laws
The associative laws are also applied to
addition and multiplication. For addition, the
associative law states
When ORing more than two
variables, the result is the same
regardless of the grouping of the
variables.
A + (B +C) = (A + B) +
C

For multiplication, the associative law states


When ANDing more than two
variables, the result is the same
regardless of the grouping of the
variables.A(BC) = (AB)C
ETR 271 Digital Circuits Fall
2014

Distributive Law
The distributive law is the factoring law. A
common variable can be factored from an
expression just as in ordinary algebra. That is
AB + AC =
A(B+ C)
The distributive law can be illustrated with
equivalent circuits:
B
C

B+ C

A(B+ C)

AB
X

ETR 271 Digital Circuits Fall


2014

A
B
A
C

AC

AB + AC

Boolean Algebra
Axioms (Basic Assumptions)
1a. 0 0 = 0
1b. 1 + 1 = 1
2a. 1 1 = 1
2b. 0 + 0 = 0
3a. 0 1 = 1 0 = 0
3b. 1 + 0 = 0 + 1 = 1
4a. if x = 0, then NOT x = 1
4b. if x = 1, then NOT x = 0
ETR 271 Digital Circuits Fall 2014

44

Boolean Algebra
Single Variable Theorems
5a. x 0 = 0
5b. x + 1 = 1
6a. x 1 = x
6b. x + 0 = x
7a. x x = x
7b. x + x = x
8a. x NOT x = 0
8b. x + NOT x = 1
9. NOT (NOT x) = x
ETR 271 Digital Circuits Fall 2014

45

Boolean Algebra
Multi-Variable Theorems
10a. x y = y x
10b. x + y = y + x
11a. x (y z) = (x y) z
11b. x + (y + z) = (x + y) +
z
12a. x (y + z) = (x y) +
(x z)
12b. x + (y z) = (x + y)
(x + z)
13a. x + (x y) = x
13b. x (x + y) = x

14a. (x y) + (x NOT y) =
x
14b. (x + y) (x + NOT y) =
x
15a. NOT (x y) = NOT x +
NOT y
15b. NOT (x + y) = NOT x
NOT y
16a. x + (NOT x y) = x + y
16b. x (NOT x + y) = x y

17a. (x y) + (y z) + (NOT x z) = (x y) + (NOT x


17b.
z) (x + y) (y + z) (NOT x + z) = (x + y) (NOT
46
ETR 271 Digital
Circuits
x+
z) Fall 2014

Boolean Algebra
Practice
Reduce the following expressions to simplest
form, using Boolean algebra
(x NOT z) + (NOT y NOT z) + (x z) + (NOT y
z)
(NOT x NOT y) + (x y) + (x NOT y)

ETR 271 Digital Circuits Fall 2014

47

Venn Diagrams
What does the light blue area represent in the
diagrams below?
x

x
x

y
z

ETR 271 Digital Circuits Fall 2014

48

Terminology
Logical Sum
- another term for OR operations
Logical Product
- another term for AND operations
(x y) + (y z) + (NOT x z) is the sum of three
products (SOP)
(x + y) (y + z) (NOT x + z) is the product of
three sums (POS)
ETR 271 Digital Circuits Fall 2014

49

Precedence/Appearance
Parentheses will always determine precedence (like
arithmetic)
- too many parentheses can cause confusion
Without parentheses, order is: NOT, AND, OR
x y + y z 1st generate products, then
sum of products
Can also simplify appearance, by removing
(if obvious)
x y + y z xy
+ yz
ETR 271 Digital Circuits Fall 2014

50

Synthesis of Logic Network


Synthesize an arbitrary function using AND, OR,
NOT gates
x1

x2

ETR 271 Digital Circuits Fall 2014

f(x1, x2)

51

Synthesis of Logic Network


Option 1 Find Sum of Products (AB + CD + DE
+ etc.)
x1 x2
0
0
1
1

0
1
0
1

f(x1, x2)
1
1
0
1

Only use terms where f(x1, x2) = 1


f(x1, x2) = x1x2 +
x1x2 + x1x2
ETR 271 Digital Circuits Fall 2014

52

Synthesis of Logic Network


f(x1, x2) = x1x2 + x1x2 + x1x2

x1

x2

Draw the circuit, using AND, OR, NOT gates!


x1
x2

ETR 271 Digital Circuits Fall 2014

53

Synthesis of Logic Network


x1

x2

f(x1, x2) = x1x2 + x1x2 + x1x2

Is this the simplest circuit? Can it be reduced?


How?

ETR 271 Digital Circuits Fall 2014

54

Synthesis of Logic Network


Using Boolean algebra, reduce this function
f(x1, x2) = x1x2 +
x1x2 + x1x2
f(x1, x2) = x1x2 + x1x2 +
x1x2f(x
+x1,xx2 ) = x x + x x + x x +
1
2
1 2
1
2
1
2
x1xf(x
2
, x ) = x (x + x ) + x (x
+ x2)

f(x1, x2) = x2(1) + x1 (1)


f(x1, x2) = x2 + x1

Draw the circuit,

using AND, OR, NOT gates!

ETR 271 Digital Circuits Fall 2014

55

Synthesis of Logic Network


Using Boolean algebra, reduce this function

x1 x2

f(x1, x2) = x1x2 + x1x2 +


f(x1, x2) = x2 + x1

Draw the circuit, using AND, OR, NOT gates!


x
1

x2

ETR 271 Digital Circuits Fall 2014

56

Synthesis of Logic Network


Practice
x1 x2
0
0
1
1

0
1
0
1

f(x1, x2)
1
0
1
1

Draw the minimum circuit, using AND, OR, NOT


gates!
ETR 271 Digital Circuits Fall 2014

57

Synthesis of Logic Network


Practice
x x x
0
0
0
0
1
1
1
1
1

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2)
0
1
0
0
1
1
1
0

Draw the minimum circuit, using AND, OR, NOT


gates!
ETR 271 Digital Circuits Fall 2014

58

Standard Forms
There are two standard forms in which all
Boolean expressions can be written:
1. Sum of Products (SOP)
2. Product of Sums (POS)

ETR 271 Digital Circuits Fall 2014

59

Sum of Products (SOP)

The distributive laws are used to multiply


out a general Boolean expression to obtain
the sum of products (SOP) form
The distributive laws are also used to
convert a Boolean expression in POS form
to one in SOP form
A SOP expression is realized using a set of
AND gates (one for each product term)
driving a single OR gate (for the sum)

ETR 271 Digital Circuits Fall 2014

60

Sum of Products (SOP)

Product Term

Logical product = AND operation


A product term is the ANDing of literals
Examples: AB, A'BC, AC', BC'D',
ABCD

Sum of

Logical sum = OR operation


The sum of products is the ORing of
product terms.

ETR 271 Digital Circuits Fall 2014

61

Minterms (SOP)
More systematic method Minterms

ETR 271 Digital Circuits Fall 2014

62

Minterm

In general, a minterm of n variables is a product


(ANDing) of n literals in which each variable
appears exactly once in either true or
complemented form, but not both

A literal is a variable or its complement

For a given row in the truth table, the


corresponding minterm is formed by

Including the true form a variable if its value


is 1.
Including the complemented form of a
variable if its value is 0.

ETR 271 Digital Circuits Fall 2014

6
3

Product of Sums (POS)

The distributive laws are used to factor a


general Boolean expression to obtain the
product of sums (POS) form
The distributive laws are also used to
convert a Boolean expression in SOP form
to one in POS form
A POS expression is realized using a set of
OR gates (one for each sum term) driving a
single AND gate (for the product)

ETR 271 Digital Circuits Fall 2014

64

Product of Sums (POS)

Sum Term

Logical sum = OR operation


A sum term is the ORing of literals
Examples: A+B, A'+B+C, A+C', B+C'+D'

Product of

Logical product = AND operation


The product of sums is the ANDing of
sum terms.

ETR 271 Digital Circuits Fall 2014

65

Maxterms (POS)
Minterms are where f = 1, Maxterms are where f =
0

ETR 271 Digital Circuits Fall 2014

66

Maxterm

In general, a maxterm of n variables is a sum


(ORing) of n literals in which each variable
appears exactly once in either true or
complemented form, but not both

A literal is a variable or its complement.

For a given row in the truth table, the


corresponding maxterm is formed by

Including the true form a variable if its value


is 0.
Including the complemented form of a
variable if its value is 1.

ETR 271 Digital Circuits Fall 2014

6
7

Synthesis of Logic Network


Three-variable function
x x x
0
0
0
0
1
1
1
1
1

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2, x3)


0
1
0
0
1
1
1
0

Write the Canonical sum-ofproducts


ETR 271 Digital Circuits Fall 2014

68

Synthesis of Logic Network


Three-variable function
x x x
0
0
0
0
1
1
1
1
1

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2, x3)


0
1
0
0
1
1
1
0

f (x1, x2, x3) = S (m1, m4, m5, m6) = S


m(1, 4, 5, 6)
ETR 271 Digital Circuits Fall 2014

69

Canonical Product-of-Sums
AND each minterm with the value of f for that
minterm
x x
0
0
1
1
1

0
1
0
1
2

f(x1,
x2)1
1
0
1

f = m0 0 + m1 0 + m2
1 + m3 0
f = m2 = x1x2
f = f = (x1x2)
ETR 271 Digital Circuits Fall 2014

70

Canonical Product-of-Sums
AND each minterm with the value of f for that
minterm
x x
0
0
1
1
1

0
1
0
1
2

f(x1,
x2)1
1
0
1

f = f = (x1x2)
DeMorgans theorem
f = (x1x2) = x1 + x2
SOP solution
ETR 271 Digital Circuits Fall 2014

- same as
71

Synthesis of Logic Network


Using Boolean algebra, reduce this function
f(x1,
x1x2 + x1x2
f(x1,
x1x2 +x1x2
f(x1,
+ x2) f(x ,
1

x2) = x1x2 +
x2) = x1x2 + x1x2 +
x2) = x2(x1 + x1) + x1 (x2
x2) = x2(1) + x1 (1)

f(x1, x2) = x2 + x1
x1
x2
ETR 271 Digital Circuits Fall 2014

f
72

Canonical Product-of-Sums
AND each minterm with the value of f for that
minterm
x x
f(x1,
x2)1
1
0 20
1
0
1

0 1
1 0
1 1

f = (x1x2) = x1 + x2 - same as
SOP solution
f = (x x ) = m = M
1

ETR 271 Digital Circuits Fall 2014

73

Synthesis of Logic Network


Practice
x x x
0
0
0
0
1
1
1
1
1

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2, x3)


0
1
0
0
1
1
1
0

Write the Canonical Product-OfSums


ETR 271 Digital Circuits Fall 2014

74

Synthesis of Logic Network


x x x
0
0
0
0
1
1
1
1
1

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2, x3)


0
1
0
0
1
1
1
0

f = M0 M2 M3 M7 = P (M0, M2, M3, M7 ) = P


M(0, 2, 3, 7)
f = (x1 + x2 + x3) (x1 + x2 + x3) (x1 + x2 + x3)
(x1 + x2 + x3)
Reduce to minimum cost
ETR 271 Digital Circuits Fall 2014
Product-of-Sums

75

Minimum Cost POS


x x x

f(x1, x2, x3)

0
0 20 30
1
0 0 1
0
0 1 0
0
0 1 1
1 0 0
1
1 0 1
1
1 1 0
1
1 1 1
0
f = M0 M2 M3

M7(x + x + x ) (x + x + x ) (x + x + x )
f=
1
2
3
1
2
3
1
2
3
(x1 + x2 + x3)
f = (x1 + x3) (x2 + x3)
1

ETR 271 Digital Circuits Fall 2014

76

SOP and POS


Draw the minimum cost realization of the
SOP and POS for:
x x x
0
0
0
0
1
1
1
1
1

ETR 271 Digital Circuits Fall 2014

0
0
1
1
0
0
1
1
2

0
1
0
1
0
1
0
1

f(x1, x2, x3)


0
1
0
0
1
1
1
0
77

Duality

The dual of a Boolean expression can be


written by

Replacing AND with OR, and OR with AND


Replacing 0 with 1, and 1 with 0
Leaving literals unchanged
(X + Y) = XY

See the Boolean laws and theorems,


previously discussed, for examples of Boolean
expressions and their duals.

ETR 271 Digital Circuits Fall 2014

78

DeMorgan's Law
Graphical representation of DeMorgan's Law
x

x
y

x
y

(XY)'

X' + Y'
x

x
y

(X+Y)'

ETR 271 Digital Circuits Fall 2014

x
y

X'Y'

79

For each of the following Boolean expressions,


SOP
and
POS:
Examples
identify whether it is in SOP or POS form:
1. F(A,B,C) = (A+B).(A'+B'+C').
(B+C')
2. F(A,B,C) = A.B.C + B'.C' + A.C' +
A'.B.C'
3. F(A,B,C) = A + B.C + B'.C' +
A'.B'.C
4. F(A,B,C) = (A'+B'+C).(B+C').
(A+C').(B')
5. F(A,B,C) = A.B.C + A'.(B+C) +
(A+C').B

ETR 271 Digital Circuits Fall 2014

80

SOP & POS


Sum of products equations written for

when the output is a 1 - minterms


Product of sums equations written for
when the output is a 0 maxterms
These are complements of each other
Which form is used may depend on
which has the greatest quantity of 1s
or 0s in the output. Generally the
smaller number gives the better solution
ETR 271 Digital Circuits Fall 2014

81

Simplifying Boolean
Expressions

Boolean algebra can be used in several


ways to simplify a Boolean expression:

Combine terms
Eliminate redundant or consensus terms
Eliminate redundant literals
Add redundant terms to be combined
with or allow the elimination of other
terms

ETR 271 Digital Circuits Fall 2014

82

Equivalency of Boolean
Expressions

Two Boolean expressions are equivalent if both


expressions evaluate to the same value for all
combinations of the variables in the expressions
The equivalency can be proven using

A Truth table
Boolean algebra theorems to manipulate one
expression until it is identical to the other.
Boolean algebra theorems to reduce both
expressions independently to the same
expression.

ETR 271 Digital Circuits Fall 2014

83

Importance of Boolean Algebra

Boolean algebra is used to simplify Boolean


expressions
Simpler expressions leads to simpler logic
circuits

Reduces cost
Reduces area requirements
Reduces power consumption

The objective of the digital circuit designer is to


design and realize optimal digital circuits

Thus, Boolean algebra is an important tool to


the digital circuit designer.

ETR 271 Digital Circuits Fall 2014

84

Problem with Boolean Algebra

In general, there is no easy way to


determine when a Boolean expression has
been simplified to a minimum number of
terms or a minimum number of literals.
Karnaugh Maps will provide a better
mechanism for the simplification of
Boolean expressions.

ETR 271 Digital Circuits Fall 2014

85

Logic Circuits

A function f can be represented by either a


minterm expansion or a maxterm expansion.
Both forms of the function can be realized using
logic gates that implement the basic logic
operations.
Minterm Expansion (Standard SOP)

Consists of the sum (OR) of product (AND) terms.


Realized using an AND-OR circuit.

Maxterm Expansion (Standard POS)

Consists of the product (AND) of sum (OR) terms.


Realized using an OR-AND circuit.

ETR 271 Digital Circuits Fall 2014

86

Incompletely Specified
Functions

A function f is completely specified when its


output is defined (i.e. either 0 or 1) for all
combinations of its inputs.
However, if the output of a function f is not
defined for all combinations of its inputs,
then it is said to be incompletely specified.

Those combinations of the inputs for which


the output of function f is not defined are
referred to as don't care outputs.

ETR 271 Digital Circuits Fall 2014

87

Incompletely Specified
Functions

The truth table representing an incompletely


specified function includes an x (or a d) in
each row corresponding to an input
combination for which the output is not
defined.A
B
C
F
0

ETR 271 Digital Circuits Fall 2014

don't care for ABC = 001


don't care for ABC = 011

don't care for ABC = 110

88

Incompletely Specified
Functions

A B C
F
The minterm expansion is:
0 0 0
0
F(A,B,C) = m(2,4,7) + d(1,3,6)
0 0 1
X
don't care minterms
0 1 0
1
The maxterm expansion is:
0 1 1
X
F(A,B,C) = M(0,5) . D(1,3,6)
1 0 0
1
don't care maxterms
1 0 1
0
1 1 0
X
1 1 1
1
A don't care can be either a 0 or 1. Select a

value for each don't care that will help simplify the
89
ETR 271 Digital
Circuits Fall 2 014
function.

Incompletely Specified
Functions
A B
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1

C
0
1
0
1
0
1
0
1

F
0
X1
1
X2
1
0
X3
1

ETR 271 Digital Circuits Fall 2014

Assume X1 = 0, X2 = 0, X3 = 0:
F(A,B,C) = A'BC' + AB'C' + ABC
Assume X1 = 1, X2 = 1, X3 = 1:
F(A,B,C) = (A+B+C)(A'+B+C')
F(A,B,C) = AA'+AB+AC'+A'B+
BB+BC'+A'C+BC+CC'
F(A,B,C) = B + AC' + A'C
Assume X1 = 0, X2 = 1, X3 = 1:
F(A,B,C) = B + AC'
90

Conversion of Requirements to
Steps for designing single output combinational circuit
Equations
Define switching function that specifies desired behavior

Define simplified algebraic expression for the function


Realize function using available logic elements

Example
To start the car you must have the transmission in Neutral or

Park, have your foot on the brake or the parking brake engaged
and turn the key to ignition.
Define F (U,V,W,X,Y,Z)= Start Car
U = Transmission in Neutral
V= Transmission in Park
W= Foot Brake Engaged
X= Parking Brake Engaged
Y= Key Inserted (note the words didnt indicate this, it was assumed )
Z = Ignition Position Selected

91

Conversion of Sentences to
Equations
F (V,W,X,Y,Z) = (U+V) (W+X)YZ
transmission and brake and key
and ignition
(park or neutral) (foot or hand)
Note: Y could be a dont care if you cant put
the switch in the ignition position without a key
being inserted. However dont care positions
can be a problem under some circumstances that
perhaps are not normal (what if the ignition
lock doesnt work properly). You have to be
careful regarding dont care definitions.
Sometimes you need to be on the safe side.

ETR 271 Digital Circuits Fall 2014

92

Questions?

ETR 271 Digital Circuits Fall 2014

93

Simplification of Logic
Functions

Logic functions can generally be simplified


using Boolean algebra.
However, two problems arise:

It is difficult to apply to Boolean algebra


laws and theorems in a systematic way.
It is difficult to determine when a
minimum solution has been achieved.

Using a Karnaugh map is generally faster


and easier than using Boolean algebra.

ETR 271 Digital Circuits Fall 2014

94

Simplification using Boolean


Given: F(A,B,C) = m(0, 1, 2, 5, 6, 7)
Algebra
Find: minimum SOP expression
Combining terms in one way:

Combining terms in a diferent way:

ETR 271 Digital Circuits Fall 2014

95

Karnaugh Maps

Like a truth table, a Karnaugh map


specifies the value of a function for all
combinations of the input variables.

ETR 271 Digital Circuits Fall 2014

96

Two-Variable K-map

row
B
#
0

A
0

B
0
1

m1

m2

m3

ETR 271 Digital Circuits Fall 2014

minter
0
m
m
0
m0
1

1
m

97

Two-Variable K-map: Example


row
#
0
1
2
3

0
0
1
1

0
1
0
1

F
0
1

1
1
0
0

2
3

Minterm expansion: F(A,B) = m(0, 1) = A'B' + A'B


= A'
numeric

algebraic

Maxterm expansion: F(A,B) = (2, 3) = (A'+B)(A'+B')


= A'A'+A'B'+
BA'+BB'
ETR 271 Digital Circuits Fall 2014
= A'

98

Karnaugh Maps
A B

0
0
1
1

1
1
0
0

0
1
0
1

A
B
0 1
0 1 0
1 1 0

Group minterms
Only include cells where f = 1
Group must be 2n cells (1,2,4,8, etc)
A = 0, B =
0/1
A'
ETR 271 Digital Circuits Fall 2014

F = A'

99

Three-Variable K-map
row
#
0

minter
m
m0

m1

A
0

00

m0

m4

m2

01

m1

m5

m3

11

m4

m3

m7

m5

10

m2

m6

m6

m7

BC

Gray Code

Important to set up the K-map so that adjacent cells change


ETR 271 Digital Circuits Fall 2014

100

Three-variable K-map:
row
Example
A
B
C
F
#
0
0
0
0
1
0
0
1
2
0
1
0
3
0
1
1
4
1
0
0
5
1
0
1
6
1
1
0
7
1
1
1
Minterm expansion:
Maxterm expansion:

ETR 271 Digital Circuits Fall 2014

0
0
4
0
5
11
13
7
1
2
6
0
1
0
F(A,B,C) = S m(2, 3, 4, 6)
F(A,B,C) = P M(0, 1, 5, 7)
101

Minimization using K-maps

K-maps can be used to derive the

Minimum Sum of Products (SOP) expression


Minimum Product of Sums (POS) expression

Procedure:

Enter functional values in the K-map


Identify adjacent cells with same logical value

Adjacent cells difer in only one bit

Use adjacency to minimize logic function

Horizontal and Vertical adjacency


K-map wraps from top to bottom and left to right

ETR 271 Digital Circuits Fall 2014

102

Minimization using K-maps

Logical Adjacency is used to

The adjacent cells

Reduce the number of literals in a term


Reduce the number of terms in a Boolean
expression.
Form a rectangle
Must be a power of 2 (e.g. 1, 2, 4, 8, )

The greater the number of adjacent cells that


can be grouped together (i.e. the larger the
rectangle), the more the function can be
reduced.

ETR 271 Digital Circuits Fall 2014

103

K-maps Logical Adjacency


Gray code

ETR 271 Digital Circuits Fall 2014

104

Minimization: Example #1
Minimize the following logic function using a
Karnaugh map:
F(A,B,C) = m(2, 6, 7)
Specify the equivalent maxterm expansion.

ETR 271 Digital Circuits Fall 2014

105

Minimization: Example #2
Minimize the following logic function using a
Karnaugh map:
F(A,B,C) = M(1, 3, 5, 6, 7)
Specify the equivalent minterm expansion.

ETR 271 Digital Circuits Fall 2014

106

Minimization: Example #3
Use a Karnaugh map to determine the
1. minimum SOP expression
2. minimum POS expression

For the following logic function:


F(A,B,C) = m(0, 1, 5, 7)
Specify the equivalent maxterm expansion.

ETR 271 Digital Circuits Fall 2014

107

Minimization: Example #4
Use a Karnaugh map to determine the
1. minimum SOP expression
2. minimum POS expression

For the following logic function:


F(A,B,C) = M(0, 1, 5, 7)
Specify the equivalent minterm expansion.

ETR 271 Digital Circuits Fall 2014

108

Minimization: Example #5
For the following truth table:
#

ETR 271 Digital Circuits Fall 2014

109

Example #5
Specify the:
1. minterm expansion
2. maxterm expansion

Use a K-map to determine the:


1. minimum SOP expression
2. minimum POS expression
ETR 271 Digital Circuits Fall 2014

110

Minimization: Example #6
For the following truth table:
#

ETR 271 Digital Circuits Fall 2014

111

Example #6
Specify the:
1. minterm expansion
2. maxterm expansion

Use a K-map to determine the:


1. minimum SOP expression
2. minimum POS expression
ETR 271 Digital Circuits Fall 2014

112

Minimal Forms

Can a logic function have more than one


minimum SOP expression?
Can a logic function have more than one
minimum POS expression?

ETR 271 Digital Circuits Fall 2014

113

K-maps Two minimal forms


F(A,B,C) = m(0,1,2,5,6,7) = M(3,4)

ETR 271 Digital Circuits Fall 2014

11
4

Questions?

ETR 271 Digital Circuits Fall 2014

11

References
The slides included herein some were taken from the materials accompanying Digital
Fundamentals by Thomas Floyd; Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,
and Dr. Craig Lorie Department of Electrical and Computer Engineering at George Mason
University.

ETR 271 Digital Circuits Fall 2014

116

Canonical Sum-Of-Products
AND each minterm with the value of f for that
minterm
x x
0
0
1
1
1

f(x1,
x2)1

0
1
0
1
2

1
0
1

f = m 0 1 + m 1 1 + m2
0 + mf3
= 1m + m + m
0

f(x1, x2) = x1x2 +


x1xCanonical
sum-of-products
2 + x1x2
ETR 271 Digital Circuits
Fall 2014
format

117

Combinational Logic Circuits


In Sum-of-Products (SOP) form, basic
combinational circuits can be directly
implemented with AND-OR combinations if
the necessary complement terms are
available.
Productterms

A
B
C

AB
CD
...
AB+CD++JK

D
J
K

ETR 271 Digital Circuits Fall


2014

Sumofproducts
JK

Productterm

Combinational Logic Circuits


An example of an SOP implementation is
shown. The SOP expression is an AND-OR
combination of the input variables and the
appropriate complements.
A
B
C
D
E

ETR 271 Digital Circuits Fall


2014

ABC
X = ABC+ DE
DE

SOP

Combinational Logic Circuits


When the output of a SOP form is inverted,
the circuit is called an AND-OR-Invert circuit.
The AOI configuration lends itself to productof-sums (POS) implementation.
An example of an AOI implementation is
shown. The output expression can be
changed to a POS expression by applying
DeMorgans
theorem twice.
A
B
C

ABC

X = ABC+ DE

D
E

ETR 271 Digital Circuits Fall


2014

DE

X = ABC+ DE AOI
DeMorga
X = (ABC)
n
(DE)
X = (A + B + C)(D +POS
E)

Implementing Combinational
Logic
Implementing a SOP
expression is done by
first forming the AND terms; then the terms
are ORd together.

Show the circuit that will implement the


Boolean expression X = ABC + ABD + BDE.
(Assume that the variables and their
complements
arethe
available.)
Start by forming
terms using three 3-input
AND gates.
Then combine the three terms using a 3-input OR
A gate.
B
C

A
B
D
B
D
E
ETR 271 Digital Circuits Fall
2014

X = ABC + ABD +
BDE

Вам также может понравиться