Virtual Memory

MODERN OPERATING SYSTEMS
Third Edition
ANDREW S. TANENBAUM
Chapter 3
Memory Management
Tanenbaum, Modern Operating Systems 3 e, (c) 2008 Prentice-Hall, Inc. All rights reserved. 0-13-6006639
No Memory Abstraction
Figure 3-1. Three simple ways of organizing memory with an

operating system and one user process.
Multiple Programs Without Memory
Abstraction
Figure 3-2. Illustration of the relocation problem.
Base and Limit Registers
Figure 3-3. Base and limit registers can be used to give each
process a separate address space.
Swapping (1)
Figure 3-4. Memory allocation changes as processes come into

memory and leave it. The shaded regions are unused memory.
Swapping (2)
Figure 3-5. (a) Allocating space for growing data segment. (b)
Allocating space for growing stack, growing data segment.
Memory Management with Bitmaps
Figure 3-6. (a) A part of memory with five processes and three
holes. The tick marks show the memory allocation units. The
shaded regions (0 in the bitmap) are free. (b) The
corresponding bitmap. (c) The same information as a list.
Memory Management with Linked Lists
Figure 3-7. Four neighbor combinations

for the terminating process, X.
Buddy System
• Blocks of memory allocated in sizes at are 2x
• Determine the largest size block 2u that fits in available
memory
• Fix a smallest size to be allocated 2l
• When y memory is need determine smallest k suck that
2k ≥ y
• Find free block of that size
• If none exists, find smallest one large enough
– Devide it in half repeatedly until small enough
– Allocate in first pice, marking all others as free
Buddy System - Deallocating
• Each block has a “buddy” to its left or right
• When block is released, its buddy is checked
• When two buddies are free, they are merged
• Minimizes external fragmentation - gaps in
allocated memory
• May still have much internal fragmentation -
gaps between allocation and actual use
Buddy System
• System Initialization
• u= 10; 2uk = 1024k = 1m
• l = 2; 22 = 4k
• Initialize search tree
1024k Free
Buddy System
A • A needs 100k
128k
• Divide memory into two 512K blocks
128k • Divide first into two 256k blocks
• Divide first into two 128k blocks
• Assign A first of these
256k
Part
Part Free
512k
Part Free
Full Free
Buddy System
A • B needs 300k
128k
• Search left
128k • Stop at second branch because it is not free
• Search right
• Assign B 512K block
256k
Part
B
Part Full
512k
Part Free
Full Free
Buddy System
A
128k • C needs 200k
• Find leftmost block that fits
128k • Assign C 256K block
C
256k
Part
B
Part Full
512k
Part Full
Full Free
Buddy System
A
128k • D needs 50k
D 64k • Split 128K block
64K • Assign C first 64K block
C
256k Part
Part Full
B
Part Full
512k
Full Part
Full Free
Buddy System
128k • Deallocate A
D 64k • Buddy is part full; just free A
64K
C
256k Part
Part Full
B
Part Full
512k
Free Part
Full Free
Buddy System
• Deallocate D
256k • Immediate buddy is free; merge
• One level up, buddy is free; merge
C • Mark 256K free
256k Part
Part Full
B
Free Full
512k
Buddy System
• Deallocate B
256k • Immediate buddy is not free
• Just free 512K
C
256k Part
Part Free
Free Full
512k
Buddy System
• Deallocate C
• Immediate buddy is free; merge
• Next buddy is free; merge
• Mark all 1024k free
1024k Free
Virtual Memory – Paging (1)
Figure 3-8. The position and function of the MMU – shown as

being a part of the CPU chip (it commonly is nowadays).
Logically it could be a separate chip, was in years gone by.
Paging (2)
Figure 3-9. Relation between virtual addresses and

physical memory addresses given by page table.
Paging (3)
Figure 3-10. The internal operation of the MMU with

16 4-KB pages.
Structure of Page Table Entry
Figure 3-11. A typical page table entry.
Speeding Up Paging
Paging implementation issues:
• The mapping from virtual address to physical

address must be fast.
• If the virtual address space is large, the page table
will be large.
Translation Lookaside Buffers
Figure 3-12. A TLB to speed up paging.
Multilevel Page Tables
Figure 3-13. (a) A 32-bit address with two page table fields.
(b) Two-level page tables.
Inverted Page Tables
Figure 3-14. Comparison of a traditional page table

with an inverted page table.
Page Replacement Algorithms
• Optimal page replacement algorithm

• Not recently used page replacement
• First-In, First-Out page replacement
• Second chance page replacement
• Clock page replacement
• Least recently used page replacement
• Working set page replacement
• WSClock page replacement
Second Chance Algorithm
Figure 3-15. Operation of second chance.

(a) Pages sorted in FIFO order.
(b) Page list if a page fault occurs at time 20 and A has its R
bit set. The numbers above the pages are their load times.
The Clock Page Replacement
Algorithm
Figure 3-16. The clock page replacement algorithm.
LRU Page Replacement Algorithm
Figure 3-17. LRU using a matrix when pages are referenced in the
order 0, 1, 2, 3, 2, 1, 0, 3, 2, 3.
Simulating LRU in Software
Figure 3-18. The aging algorithm simulates LRU in software.

Shown are six pages for five clock ticks. The five clock ticks
are represented by (a) to (e).

Virtual Memory

Загружено:

Сведения о документе

Авторское право

Доступные форматы

Поделиться этим документом

Поделиться или встроить документ

Параметры публикации

Этот документ был вам полезен?

Это неприемлемый материал?

Авторское право:

Доступные форматы

Virtual Memory

Загружено:

Авторское право:

Доступные форматы

MODERN OPERATING SYSTEMS

Figure 3-1. Three simple ways of organizing memory with an

Figure 3-2. Illustration of the relocation problem.

Figure 3-4. Memory allocation changes as processes come into

Figure 3-7. Four neighbor combinations

Figure 3-8. The position and function of the MMU – shown as

Figure 3-9. Relation between virtual addresses and

Figure 3-10. The internal operation of the MMU with

Figure 3-11. A typical page table entry.

Paging implementation issues:

• The mapping from virtual address to physical

Figure 3-12. A TLB to speed up paging.

Figure 3-14. Comparison of a traditional page table

• Optimal page replacement algorithm

Figure 3-15. Operation of second chance.

Figure 3-16. The clock page replacement algorithm.

Figure 3-18. The aging algorithm simulates LRU in software.

Вам также может понравиться