Sampling, Reconstruction, and

Elementary Digital Filters

R.C. Maher
ECEN4002/5002 DSP Laboratory
Spring 2003

Sampling and Reconstruction

Need to understand relationship between a
continuous-time signal f(t) and a discretetime (sampled) signal f(kT), where T is the
time between samples (T=1/fs)

1
f (kT )
2
ECEN4002

F ( j ) e

jkT

Delay Lines and Simple Filters

Sampling (cont.)
After some manipulation, can show:

T
f ( kT )
2

1
2 n jkT
F j

e d

T n
T

2 n
1 1
DTFT F j

T
T n

ECEN4002

Delay Lines and Simple Filters

Sampling Effects: Frequency Domain

Xc(j)

-N

S > 2 N

Fourier Transform of
continuous function

Fourier Transform of
sampled function

XS(j)

-2S

-S

-N

S < 2 N (aliasing)

2S

XS(j)

-2S -S

ECEN4002

2S

Delay Lines and Simple Filters

Reconstruction
Since spectrum of sampled signal consists of
baseband spectrum and spectral images shifted at
multiples of 2/T, reconstruction means isolating
the baseband image
Concept: lowpass filter to pass baseband while
removing images
XS(j)

-2S

ECEN4002

-S

-N

2S

Delay Lines and Simple Filters

Reconstruction (cont.)
Multiplication by rectangular pulse in
frequency domain (LPF) corresponds to
convolution by sinc( ) function in time
domain
Because sinc( ) is non-causal and of infinite
extent, practical reconstruction requires an
approximation to the ideal case
ECEN4002

Delay Lines and Simple Filters

Delay Lines
In order to create a frequency-selective
function, there must be a delay memory so
that the function is able to observe and
resolve the frequencies present in the signal
Digital filters used tapped delay lines to
create the z-1 (delay) terms in the ztransform
ECEN4002

Delay Lines and Simple Filters

Delay Lines (cont.)

x[n]
Z-1

h0

x[n1]

Z-1

h1

x[n2]

Z-1

h2

x[n-3]

y[n]

h3
3

H ( z ) hn z n
n0

ECEN4002

Delay Lines and Simple Filters

Delay Lines (cont.)

Delay lines can be implemented easily as a
one dimensional array or FIFO in DSP
memory
Typically use an address register to point to
array, then just increment pointer instead of
copying data to achieve the delay

ECEN4002

Delay Lines and Simple Filters

Modulo Buffers
DSP supports modulo arithmetic in the
address generation unit
With modulo buffer, incrementing or
decrementing address register rolls over
automatically at beginning and ending of
buffer memory range
Modulo buffers are useful for delay stages
in filters and other FIFO queue structures
ECEN4002

Delay Lines and Simple Filters

10

Modulo Buffers (cont.)

Modulo calculations keep address pointer
within a fixed range of memory locations
N memory
locations

Base Address + N -1
Modulo N
Buffer
Memory
Base Address

ECEN4002

Delay Lines and Simple Filters

11

56300 Modulo Buffers

The M registers in the AGU select the
modulo size of the buffer
M = $FFFFFF implies no modulo (regular
linear addressing)
M = 0 implies bit-reversed addressing (useful in
FFT algorithms)
M = modulo-1 implies address range
including modulo memory locations
(2modulo $7FFF)
ECEN4002

Delay Lines and Simple Filters

12

56300 Modulo (cont.)

The base address of the modulo buffer must
be a power of 2
The base address must either be zero, or a
power of 2 that is greater than or equal to
the modulo
In other words, the base address must be 2 k,
where 2kmodulo, which implies k least
significant bits must be zero
ECEN4002

Delay Lines and Simple Filters

13

FIR Filter
FIR filter coefficients are equal to the unit
sample response of the filter
Given filter specifications, we need to
choose a unit sample response that is
close to the desired response, yet within
the implementation constraints (memory,
computational complexity, etc.)
ECEN4002

Delay Lines and Simple Filters

14

FIR Filter Design

Several FIR design techniques are available
Consider the Window method:
Determine ideal response function
If length of ideal function is too long, multiply
ideal response by a finite length window
function
Note that multiplication by window in time
domain means convolution (and smearing) in
the frequency domain
ECEN4002

Delay Lines and Simple Filters

15

FIR Window Design Concept

Lowpass filter: cutoff at 0.2 fs .
Amplitude (linear scale)

1.2
1
0.8
0.6
0.4
0.2
0

ECEN4002

0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Frequency (fraction of fs)

Delay Lines and Simple Filters

16

FIR Design Concept (cont.)

Time domain response (Inverse DTFT)
0.4
0.35
0.3
Amplitude

0.25
0.2
0.15
0.1
0.05
0
-0.05
-0.1

-60

ECEN4002

-40

-20

0
20
Sample Index

40

60

Delay Lines and Simple Filters

17

FIR Design Concept

Window function to limit response length
1.2
1

Amplitude

0.8

Hamming
window

0.6
0.4
0.2
0

-0.2
-60

ECEN4002

-40

-20

0
20
Sample Index

40

60

Delay Lines and Simple Filters

18

FIR Design Concept (cont.)

Windowed and shifted (causal) result
0.4
0.35
0.3
Amplitude

0.25
0.2

0.15
0.1

0.05
0
-0.05
-0.1

ECEN4002

10

15

20
25
Sample Index

30

35

40

Delay Lines and Simple Filters

19

FIR Design Concept

Resulting frequency response of filter
10
0
Magnitude (dB)

-10
-20
-30
-40
-50
-60

ECEN4002

0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Frequency (fraction of fs)

Delay Lines and Simple Filters

20

Lab Assignment #2
Due at START of class in two weeks
Topics:

Sampling and reconstruction (MATLAB)

Program #1: Cycle counting
Program #2: Simple delay line
Program #3: File I/O via Debugger
Program #4: FIR filter, non-real time
Program #5: FIR filter, real time

ECEN4002

Delay Lines and Simple Filters

21