ELE1110C Tutorial 11

Outline:
JFET and MOSFET

Luk Chun Pong

29-11-2006

BJT, JFET and MOSFET

BJT

JFET

MOSFET
Drain

Drain

Collector
Gate

Base

Gate

Body
Base

Emitter

Source
Gate

Base
Emitter

Source

Collector

Gate
Drain

Source

Source
Body

Drain

BJT, JFET and MOSFET

BJT

JFET

MOSJET

Function

Voltage
Controlled
Current source

Voltage controlled
Resistor, Voltage
controlled current
source

Voltage controlled
Resistor, Voltage
controlled current
source

Operation

VBE controls IC

VGS controls ID
for Large VDS

VGS controls ID
for Large VDS

Advantage

High Gain (gm)

Extremely High
Input Impedance

Extremely High
Input Impedance

Type

PNP, NPN

n-channel, pchannel

n-channel, pchannel

Part 1: JFET
Junction Field Effect Transistor
Extremely large input impedance
Very small gate current
Advantage

Smaller gain (gm) than bipolar transistor

Disadvantage

More difficult to analyze

For BJT, VBE ~ 0.6V (~0.5 0.8)
For JFET, VGS vary over a wide range

JFETs are operate at depletion-mode they'r

e "on" unless a gate voltage is applied

Two types of JFET

N-channel JFET

Difference

P-channel JFET

Operation of JFET (n-channel)

Case 1: VDS is small,
For VG = 0,
ID (drain current) is
Maximum

VG=0
VS=0
ID

VD

Reverse
biased,
VT <VG<0

For VT < VG < 0,

ID decreases

P
N

Channel not
blocked,
current is
max.

VD

VS=0

Widen the
depletion
region,
Block the
channel

VT = VP (Pinch-off Voltage)
VG< VT
For VG < VT,

VS=0

VD

ID = 0
Small VDS - linear region (voltage controlled resistor)

Completely
blocked

Operation of JFET (n-channel)

Case 2: VDS is large,
VG= -2V
VS=0

More reverse biased:

-2 5 = -7V
VD = 5V
Larger
depletion
region

-> Drain end more reverse biased

N-channel

Increase VDS => increase depletion => reduce ID

Increase VDS => increase ID
And so ID remains constant -> current source

Large VDS saturation region (constant ID, voltage controlled current source)

Linear region,

VDS increases, ID
remains constant

VDS increases, ID
increases
(Voltage controlled
current source)

Use VGS to control the

current ID (Voltage
controlled current
source

ID vs VGS (saturation region)

Saturation current
IDSS = I (drainsource saturation)

IDSS

Depends on FET

I D (VGS VT ) 2
I D k (VGS VT )

VP

dI D

2k (VGS VT ) g m
dVGS

VGS = 0, ID =
MAX

Problem Set 8

Part 2: MOSFET
Metal Oxide Semiconductor Field Effect Tr
ansistor
Two modes: enhancement mode and depl
etion mode
4 terminal devices: source, drain, gate, an
d body

Different between Enhancement an

d depletion mode
For n-channel
1. Enhancement:
increase VGS, increase the current
2. Depletion:
increase the VGS, decrease the current

Structure of MOSFET (N-channel)

gate

source

n ------ n
-----body

metal
insulator

drain

-ve charge,
conducting channel

NMOS and PMOS

Operation of MOSFET (Enhancem

ent mode)
1. Cut-off region
VGS < VTH (Threshold Voltage), No conduction

VGS VTH = VDS

2. Triode or linear region

VGS > VTH and VDS < VGS VTH
ID increase as VDS increases
or VGS increases

ID

3. Saturation region
VGS > VTH and VDS > VGS VTH
Constant ID for
wide range of VDS,
but increase VGS
increase ID

VDS

NMOS inverter and problems

large static power dissipation

Large Time
constant

Slow response!

C(Complementary)MOS Inverte
r
PMOS

Advantage:
- Zero Resistance , small RC, fast
switching
- No static power consumption
Disadvantage:
Both MOSFETs are partially
conducting during state changing

NMOS

Charging up the stray capacitor

of next stage consumes energy
Total energy dissipation per
f second
CV 2
=

Problem set 8 Q2