Arhitecturi de microcalculatoare

Von Neuman
Caracteristici:

Magistrala comuna
pentru memoria de
program si de date
Exemplu tipic:
Motorola HC11

 Arhitectura Harvard
Caracteristici:
magistrale distincte
pentru program si date
Exemplu tipic
Atmel AVR

Consecinte ale arhitecturii Harvard

Thepresenceofthesecondbusmakesthefollowingthingspossible:
While an instruction is executed, the next instruction can be fetched
from the program memory. This technique is called pipelining and
bringsasignificantincreaseofthecomputerspeed.
The program memory can be organized in words of adifferent size,
usually larger, than the data memory. Wider instructions mean a
greater data flow to the CPU, and therefore the overall speed is
higher.
Sucharchitecture,alongwithreducingandoptimizingtheinstruction
set, allow that most instructions execute in a single machine cycle.
SincetheHarvardarchitectureisoftenaccompaniedbythereduction
of the size and complexity of the instruction set, the computers with
this architecture are also called RISC. (Reduced Instruction Set
Computers) For example, some PIC microcontrollers have an
instructionsetofonly35instructions,comparedtomorethan100of
HC11.Thespeedincreaseisevenhigher.

Consecinte asupra organizarii spatiului de adrese

Harta memoriei in
cazul unui
microcontroller HC11

 Harta memoriei
pentru un
microcontroller
din seria Atmel
AVR
Se observa ca aici
exista 3 spatii de
adrese

Registrele interne ale CPU

HC11

Doi acumulatori A si B. Pot fi

concatenati pentru a forma un
registru dublu D
Doua registre index X si Y
Stack pointer
Registrul de stare CPU denumit
CCR
Numaratorul de program PC

AVR

32 acumulatori R0-R31
R26R27,R28R29,R30R31
canbeconcatenatedtoformthe
X,Y,Z,registers
StackpointerSP
registruldestareCPUdenumit
SREG
Numaratoruldeprogram

Interfetele periferice

Anyperipheral
interfacecontains
oneormore
controlandstatus
registers,andone
ormoredata
registers
Theseregistersare,
normally,located
intheaddress
spaceofthedata
memory,andare
accessedasRAM
locations

Interfete periferice uzuale

TheI/O(Input/Output)ports.
Theasynchronousserialinterface(SCI,UART)
Thesynchronousserialinterfac(SPI)
Severaltypesoftimers
TheAnalogtoDigital(A/D)converters

Sistemul de intreruperi
Definitie:

Aninterruptisamechanismthatallowsan
externaleventtotemporarilyputonholdthe
normalexecutionoftheprogram,forcingthe
executionofaspecificsubroutine.Oncethe
interruptservicesubroutinecompletes,themain
programcontinuesfromthepointwhereitwas
interrupted.

Procesul de tratare a unei intreruperi

.The identification of the interrupt source. This is automatically

donebyhardware.
.Saving the current value of the PC register, thus providing a
meanstoreturnfromtheinterruptserviceroutine.Thecontentsof
PC is saved to the stack, and the operation is also done by
hardware.
.Then, the PC is loaded either with, or from the address of a
reserved memory area, called interrupt vector. For each possible
interrupt, a unique vector is assigned. The interrupt vectors are
hardwiredandcannotbemodifiedbyuser.
.At the address of the interrupt vector, the program must contain
eithertheaddressoftheinterruptserviceroutine(HC11usesthis
technique) or an instruction for an unconditional jump to this
routine(AVRand8051workthisway).

Tratarea unei intreruperi - continuare

Thenextstepistheexecutionoftheinterruptserviceroutine(ISR).
Thisisaprogramsequencesimilartoasubroutine,butendedwitha
specialinstructioncalledReturnfromInterrupt(RTI,RETI).
Observatieimportanta:STAREAmasiniitrebuiesalvataprinsoft
inaintedeexecutiarutineideintreruperesirestauratadupaexecutia
rutineideintrerupere.
Thefinalstepinhandlinganinterruptistheactualreturntothemain
program.ThisisdonebyexecutingaRTI(RETI)instructionas
mentionedbefore.Whenthisinstructionisencountered,thecontents
ofPC,savedinstep2,isretrievedfromstackandrestored,whichis
equivalenttoajumptothepointwheretheprogramwasinterrupted.

Intreruperi - note importante

Thestackisessentialfortheinterruptsystem.BoththePCandthe
CPUstatusaresavedinthestackwhenhandlinginterrupts.
Therefore,theSPmustbeinitializedbysoftwarebeforeenabling
theinterrupts.
TheinterruptserviceroutinemustsavetheCPUstatusandrestore
itbeforereturningtothemainprogram.
Iftwoormoreinterruptrequestsoccursimultaneously,theyare
servicedinapredetermined,orderaccordingtoahardwired
priority

Controlul asupra intreruperilor

Exista o dubla conditionare a

intreruperilor
Thesoftwarecontroloverthe
interruptsystemisexerted
eitherglobally,by
enabling/disablingallthe
interruptsbymeansofspecific
instructions,orindividually,by
settingorclearingsomecontrol
bits,calledinterruptmasks,
associatedwitheachinterrupt.

Conditionarea intreruperilor

TheINTERRUPTFLAGistheactualinterruptsource,and,usually,isa
flipflopsetbytheexternalevent.Thisbitis,inmostcases,accessiblefor
the program as a distinct bit in the status register of the peripheral
interface.
TheLOCALINTERRUPTMASKSarecontrolbits,locatedinthecontrol
registers of the interface. When set to1by software, the interrupts from
thatspecificinterfaceareenabled.
The GLOBAL INTERRUPT MASK is a bit located in the CPU status
register(CCR,SREG,PSW)thatenablesordisablesallinterrupts.
Insomecases,itisrequiredthattheCPUisinformedimmediatelyabout
someimportantinternalorexternalevents,regardlessofthestatusofthe
global interrupt mask. The solution to this problem is the nonmaskable
interrupt,whichisunconditionallytransmittedtotheCPU.Aspecialcase
of nonmaskable interrupt can be considered the RESET. Basically, the
behavior of the MCU at RESET is entirely similar to the process of
identificationandexecutionofanonmaskableinterrupt.

Particularitati ale sistemului de intreruperi al HC11

Starea masinii este salvata automat in stiva la recunoasterea unei

intreruperi si este restaurata automat la revenirea din rutina de
intrerupere
Admite intreruperi nemascabile (XIRQ, SWI si TRAP)
Controlul global asupra intreruperilor se face cu ajutorul bitului I din
registrul CCR. Acesta este afectat de intructiunile specifice SEI (Set
Interrupt Mask - echivalent cu Disable Interrupts) si CLI - (Clear
Interrupt Mask - echivalent cu Enable Interrupts)
Exista un registru denumit HPRIO (Highest Priority Interrupt) cu
ajutorul caruia se poate alege intreruperea cu prioritate maxima
Zona de vectori de intrerupere este plasata la sfarsitul spatiului de
adrese ($FFC0-$FFFF)
Vectorul contine adresa rutinei de intrerupere

Particularitati ale intreruperilor la AVR

The interrupt vector does not contain the address of the
interrupt service routine, but a jump instruction to that
routine.
Thevectorareaislocatedatthebeginningoftheprogram
memoryaddressspace,betweentheaddresses$0000$0010.
TherearenononmaskableinterruptsbesidesRESET.
The I bit in SREG acts differently, compared to HC11:
whenI=1,theinterruptsareenabled.
ThereisnoequivalenttotheHPRIOregister,andnoother
meanstomodifythehardwiredrelativepriorityofinterrupts.

Exemplu de initializare a vectorilor de intrerupere la

HC11

MAIN

.......

;Program
;RESET

.......
ORG

$FFFE

DW

MAIN

entry

point

at

;store
the
value
of
the
;label MAIN at $FFFE-$FFFF

Exemplu de initializare a vectorilor de intrerupere la AVR

.......
.ORG
RJMP
.......
ANA_COMP:
.......
RETI

$000C
ANA_COMP

;unconditional jump to the

;interrupt handler