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A channel
Multiplexing
CHANNEL
BL
BH
freq
BH
Time t
v s (t ) Amp cos(t )
Multiplexing
Various multiplexing methods are possible in terms of the channel bandwidth and time,
and the signal, in particular the frequency, phase or time. The two basic methods are:
1) Frequency Division Multiplexing FDM
FDM is derived from AM techniques in which the signals occupy the same physical
line but in different frequency bands. Each signal occupies its own specific band of
frequencies all the time, i.e. the messages share the channel bandwidth.
2) Time Division Multiplexing TDM
TDM is derived from sampling techniques in which messages occupy all the channel
bandwidth but for short time intervals of time, i.e. the messages share the channel time.
FDM messages occupy narrow bandwidth all the time.
TDM messages occupy wide bandwidth for short intervals of time.
Multiplexing
These two basic methods are illustrated below.
time
time
M1
BL
M2
B
M3
BL
M4
M1
M5
M4 M5
M2 M3
t
BH
BH
freq
freq
t
BL
BH
M1
M2
M1
M3
M2
M3
M4
M5
M4
BH
M5
BL
FDM
TDM
3kHz
freq
GHz
From AM we have noted:
m(t)
m(t)
freq
DSBSC
carrier
cos( c t )
DSBSC
freq
fc
m(t)
SSBSC
carrier
cos( c t )
freq
fc
We have also noted that the message signal m(t) is usually band limited, i.e.
Speech
Band
Limiting
Filter
300Hz 3400Hz
m(t)
SSB
Filter
cos( c t )
SSBSC
f
10kHz
Speech
f
300Hz
3400Hz
m(t)
f
300Hz
3400Hz
Convention
Guard Bands
Bandlimited
Speech
4kHz
Note, the BLF does not have an ideal cut-off the guard bands allow for filter roll off
in order to reduce adjacent channel crosstalk.
9
m(t)
DSBSC
BLF
SSB
Filter
SSBSC
fc
m(t)
freq
300Hz
3400Hz
DSBSC
freq
fc
freq
fc
10
SSB
Filter
BLF
fc1
m2(t)
SSB
Filter
BLF
f
fc2
FDM
Signal
M(t)
f2
SSB
Filter
BLF
m3(t)
f1
fc3
f3
Bandlimited
FDM Transmitter
or Encoder
11
4kHz
4kHz
M(t)
4kHz
Shaded areas are to
show guard bands.
f1
fc1
f3
f2
fc2
fc3
freq
12
M(t)
FDM
Signal
LPF
fc1
SSB
Filter
f2
Band
Limited
LPF
m2(t)
Back to
baseband
fc2
SSB
Filter
f3
m1(t)
LPF
fc3
m3(t)
13
The SSB filters are the same as in the encoder, i.e. each one
centred on f1, f2 and f3 to select the appropriate sideband and reject
the others. These are then followed by a synchronous demodulator,
each fed with a synchronous LO, fc1, fc2 and fc3 respectively.
For the 3 channel system shown there is 1 design for the BLF (used
3 times), 3 designs for the SSB filters (each used twice) and 1
design for the LPF (used 3 times).
60kHz
= 15 which is reasonable.
4 kHz
10,000kHz
gives a Q = 2500 which is difficult to achieve.
Q
4 kHz
To overcome these problems, a hierarchical system for telephony used the FDM
principle to form groups, supergroups, master groups and supermaster groups.
15
Multiplexer
freq
m12(t)
12kHz
60kHz
i.e. 12 telephone channels are multiplexed in the frequency band 12kHz 60 kHz in
4kHz channels basic group.
16
4kHz
CH1
m1(t)
8.6 15.4kHz
300Hz
3400kHz
SSB Filter
12.3 15.4kHz
f1 = 12kHz
4kHz
12.6 19.4kHz
CH2
m2(t)
300Hz
16.3 19.4kHz
3400kHz
f1 = 16kHz
4kHz
52.6 59.4kHz
CH12
m12(t)
300Hz
56.3 59.4kHz
3400kHz
f12 = 56kHz
17
Super Group
These basic groups may now be multiplexed to form a super group.
12
Inputs
BASIC
GROUP
12 60kHz
SSB
FILTER
420kHz
12
Inputs
BASIC
GROUP
12 60kHz
SSB
FILTER
468kHz
12
Inputs
BASIC
GROUP
12 60kHz
SSB
FILTER
516kHz
12
Inputs
BASIC
GROUP
12 60kHz
SSB
FILTER
564kHz
12
Inputs
BASIC
GROUP
12 60kHz
SSB
FILTER
612kHz
18
Super Group
5 basic groups multiplexed to form a super group, i.e. 60 channels in one super group.
Note the channel spacing in the super group in the above is 48kHz, i.e. each carrier
frequency is separated by 48kHz. There are 12 designs (low frequency) for one basic
group and 5 designs for the super group.
612 kHz
12 - which is reasonable
The Q for the super group SSB filters is Q
48kHz
Hence, a total of 17 designs are required for 60 channels. In a similar way, super groups
may be multiplexed to form a master group, and master groups to form super master
groups
19
m1(t)
2
m2(t)
m3(t)
m4(t)
m5(t)
m1(t)
2
Tx
4
5
Rx
SW2
SW1
Transmission
Line
m2(t)
4
5
m3(t)
m4(t)
m5(t)
Switches SW1 and SW2 rotate in synchronism, and in effect sample each message
input in a sequence m1(t), m2(t), m3(t), m4(t), m5(t), m1(t), m2(t),
The sampled value (usually in digital form) is transmitted and recovered at the far end
to produce output m1(t)m5(t).
20
m1(t)
V1
t
0
m2(t)
V2
0
m3(t)
V3
0
SW1
Sample
t
Position
21
V3
V2
V1
t
m1(t)
m2(t)
m3(t)
m1(t)
m2(t)
m3(t)
m1(t)
Channel
Time
Slots
1
t
Time slot
22
In this illustration the samples are shown as levels, i.e. V1, V2 or V3.
Normally, these voltages would be converted to a binary code before
transmission as discussed below.
Note that the channel is divided into time slots and in this example, 3
messages are time-division multiplexed on to the channel. The sampling
process requires that the message signals are a sampled at a rate fs 2B,
where fs is the sample rate, samples per second, and B is the maximum
frequency in the message signal, m(t) (i.e. Sampling Theorem applies). This
sampling process effectively produces a pulse train, which requires a
bandwidth much greater than B.
Thus in TDM, the message signals occupy a wide bandwidth for short
intervals of time. In the illustration above, the signals are shown as PAM
(Pulse Amplitude Modulation) signals. In practice these are normally
converted to digital signals before time division multiplexing.
23
S/H
BLF
PAM
1
fs1
m2(t)
BLF
S/H
PAM
2
S/H
PAM
3
fs2
m3(t)
BLF
Multiplexing
Analogue
To
Digital
Convertor
Serial output
Binary digital
data d(t)
fs3
Band limiting
Filter 0 B Hz
Multiplexing ADC
Converts each input
in turn to an n bit code.
24
25
26
For an N channel system, i.e. N message signals, sampled at a rate fs samples per
second, with each sample converted to an n bit binary code, and assuming no
additional bits for synchronisation are required (in practice further bits are required) it is
easy to see that the output bit rate for the digital data sequence d(t) is
27
Lecture Notes
University of Newcastle-upon-Tyne
2005
All the forms of the base band signalling shown transfer data at the same bit rate.
In general
For
NRZ :
RZ :
Bi-Phase:
AMI:
If we pass this signal through a LPF then the maximum bandwidth would be 1/T
Hz, i.e. to just allow the fundamental (1st harmonic) to pass.
Bmin
1
1 Baud Rate
1
Bmin
2 E
Baud Rate
fU
2
If the sequence was continuous 0s, the signal would be V continuously, hence
f L ' DC '
Bi-Phase
Maximum frequency occurs when continuous
1s or 0s transmitted.
This is similar to RZ with
Baud Rate =
= 2 x Bit rate
Baud Rate
2
The minimum frequency occurs when the sequence is 10101010.
e.g.
Bmin f U
In this case
B = E
Bmin f L
Baud Rate
2
Demodulator-Detector-Decision
FOR FSK
Demodulator
Demodulator Contd)
1
V IN dt
RC
Hence design RCT
Vout
Detector-Decision
V1 - V0 is the voltage difference
between a 1 and 0.
(V REF
V1 V2
)
2
2
Detector-Decision (Contd)
ND is the noise at the Detector input.
Probability of Error,
1 erf
2
2 2 N D
Hence
v0
v1
P(v0)
vn
P0 (vn )
1 1
e
2 2
2 ND
( v0 v1 ) 2
2 2
P1 (vn )
Pe1
vn
v1
v0
v0 v1
2
2
x
( v n v0 ) 2
2 2
v n v0
2
dv n
(*)
Pe1
This becomes
x 2 dx
(**)
v1 v0
2 2
erfc ( z )
Equations (*) and (**) become
1
v1 v0
Pe1 erfc
2
2 2
e
z
x2
dx
erfc( z ) 1 erf ( z )
Pe1
Pe 0
1
v1 v0
1
erf
2
2
v0 v1
2
1
e
2
( vn v1 ) 2
2 2
dvn
It is clear from the symmetry of this problem that Pe0 is identical to Pe1 and the
probability of error Pe, irrespective of whether a one or zero was transmitted, can
be rewritten in terms of v = v1 v0
1
v
Pe 1 erf
2
2 2
for unipolar signalling (0 and v)
v
for polar signalling (symbol represented by voltage
2
Detector-Decision (Contd)
ASK
1
e 1 erf
2
S IN
4 N IN
OOK
FSK
PSK
PRK
1
e 1 erf
2
1
e 1 erf
2
S IN
2 N IN
S IN
N IN
Detector-Decision (Contd)
VIN (t ) Vc Cos IN t
Where IN is the input frequency (rad/sec) IN 2 f IN
V x V IN t V IN t
V x Vc Cos IN t .Vc Cos IN (t )
Since CosA CosB
1
Cos A B Cos A B
2
Vc2
Vx
Cos IN t IN t Cos IN t IN t
2
Vc2
Cos IN t IN IN t Cos IN t IN IN t
Vx
2
Vc2
Cos 2 IN IN t Cos IN
Vx
2
IN is constant.
The cut-off frequency for the LPF is designed so that component (1) is removed and
component (2) is passed to the output.
VOUT
Vc2
Cos IN t
2
f c Vm
ym xc
f out VIN f 0
VIN VDC m(t )
VIN VDC Vm Cos mt
i.e. f out VDC Vm Cos mt f 0
f c VDC ,
Tc
Modulation Index
1
fc
f c Vm
fm
fm
and is given by
FM Vs (t ) Vc J n ( ) Cos c n m t
n 1
Digital FSK
ym xc
f out V IN f 0
V IN V DC m(t )
V IN V DC V1
for 1' s
V IN V DC V0
for 0' s
f 1 V DC V1 f 0
for 1' s
f 0 V DC V0 f 0
for 0' s
f c V DC ,
Tc
1
fc
f1 f 0
Rb
i.e. Modulus f1 f 0
VOUT
is set to Tc
4
where Tc
2 f IN
Vc2
Cos
2
4 fc
1
fc
VOUT
and
Vc2
Cos IN
2
fc
f IN
Vc2
Cos
2
2 fc
The comparator is LIMITER which is a zero crossing detector to give a digital input to
the first gate.
This is form of delay and multiply circuit where the delay
= CR
f IN f c
VOUT
AE f IN
4 fc
f IN
(Assuming A=1)