CSE245: Computer-Aided Circuit

Simulation and Verification

Lecture 1: Introduction and Formulation

Spring 2008
Chung-Kuan Cheng

Administration
CK Cheng, CSE 2130, tel. 534-6184, ckcheng@ucsd.edu
Lectures: 12:30 ~ 1:50pm TTH WLH2205
Textbooks
Electronic Circuit and System Simulation Methods
T.L. Pillage, R.A. Rohrer, C. Visweswariah, McGraw-Hill
Interconnect Analysis and Synthesis
CK Cheng, J. Lillis, S. Lin, N. Chang, John Wiley & Sons

Grading
Homework and Projects: 60%
Project Presentation: 20%
Final Report: 20%

CSE245: Course Outline

Formulation (2-3 lectures)

RLC Linear, Nonlinear Components,Transistors, Diodes

Incident Matrix
Nodal Analysis, Modified Nodal Analysis
K Matrix

Linear System (3-4 lectures)

S domain analysis, Impulse Response

Taylors expansion
Moments, Passivity, Stability, Realizability
Symbolic analysis, Y-Delta, BDD analysis

Matrix Solver (3-4 lectures)

LU, KLU, reordering
Mutigrid, PCG, GMRES

CSE245: Course Outline (Cont)

Integration (3-4 lectures)

Forward Euler, Backward Euler, Trapezoidal Rule

Explicit and Implicit Method, Prediction and Correction
Equivalent Circuit
Errors: Local error, Local Truncation Error, Global Error
A-Stable
Alternating Direction Implicit Method

Nonlinear System (2-3 lectures)

Newton Raphson, Line Search

Transmission Line, S-Parameter (2-3 lectures)

FDTD: equivalent circuit, convolution
Frequency dependent components

Sensitivity
Mechanical, Thermal, Bio Analysis

Motivation
Why
Whole Circuit Analysis, Interconnect Dominance

What
Power, Clock, Interconnect Coupling

Where
Matrix Solvers, Integration Methods
RLC Reduction, Transmission Lines, S Parameters
Parallel Processing
Thermal, Mechanical, Biological Analysis

Circuit Simulation
Circuit

Input and setup

Simulator:
Solve

f (X ) C

dX (t )
dt

Output

numerically

dX (t )
f (X ) C
GX (t ) BU (t )
dt
Y DX (t ) FU (t )

Types of analysis:
DC Analysis
DC Transfer curves
Transient Analysis
AC Analysis, Noise, Distortions, Sensitivity

Program Structure (a closer look)

Models

Input and setup

Numerical Techniques:
Formulation of circuit equations
Solution of ordinary differential equations
Solution of nonlinear equations
Solution of linear equations

Output

Lecture 1: Formulation
Derive from KCL/KVL
Sparse Tableau Analysis (IBM)
Nodal Analysis, Modified Nodal Analysis
(SPICE)

*some slides borrowed from Berkeley EE219 Course

Conservation Laws
Determined by the topology of the circuit
Kirchhoffs Current Law (KCL): The algebraic
sum of all the currents flowing out of (or into) any circuit
node is zero.
No Current Source Cut

Kirchhoffs Voltage Law (KVL): Every circuit

node has a unique voltage with respect to the reference node.
The voltage across a branch vb is equal to the difference
between the positive and negative referenced voltages of the
nodes on which it is incident
No voltage source loop

Branch Constitutive Equations

(BCE)
Ideal elements
Element

Branch Eqn

Variable parameter

Resistor

v = Ri

Capacitor

i = Cdv/dt

Inductor

v = Ldi/dt

Voltage Source

v = vs

i=?

Current Source

i = is

v=?

VCVS

vs = AV vc

i=?

VCCS

is = GT vc

v=?

CCVS

v s = RT i c

i=?

CCCS

is = AI ic

v=?

Formulation of Circuit Equations

Unknowns
B branch currents (i)
N node voltages
(e)
B branch voltages (v)

Equations
N+B Conservation Laws
B Constitutive Equations
2B+N equations, 2B+N unknowns => unique solution

Equation Formulation - KCL

R3

R1

Is5

R4

G2v3
0

Law:

State Equation:

Ai = 0
N equations

Node 1:
Node 2:

i1
i
2

1 1 1 0 0
0

i
0 0 1 1 1 3

i 0
4
Branches
i5

Kirchhoffs Current Law (KCL)

Equation Formulation - KVL

R3

R1

Is5

R4

G2v3
0

Law:

State Equation:

v-A e=0
T

B equations

v1
v
2
v3

v4
v5

1
1
1
0
0

0
0
0
e1
1 0
e2
1
0
0
1

vi = voltage across branch i

ei = voltage at node i

Kirchhoffs Voltage Law (KVL)

Equation Formulation - BCE

R3

R1

R4

Law:

G2v3
State Equation:

Kvv + Kii = is

1
R
1

0
0

B equations

0 G2
1
0
R3

0
0

Is5

1
R4
0

v
i
0
1 1
0 v
2 i2 0
0 v3 i3 0
v4 i4 0
0 v i i
5 5 s5
0

Equation Formulation
Node-Branch Incidence Matrix A
branches
1 2 3

n
o 1
d 2
e
s i

(+1, -1, 0)

Aij =

+1 if node i is + terminal of branch j

-1 if node i is - terminal of branch j
0 if node i is not connected to branch j

Equation Assembly (Stamping

Procedures)
Different ways of combining Conservation
Laws and Branch Constitutive Equations
Sparse Table Analysis (STA)
Nodal Analysis (NA)
Modified Nodal Analysis (MNA)

Sparse Tableau Analysis (STA)

1. Write KCL:
2. Write KVL:
3. Write BCE:

A
0

0
I

K i K v
Sparse Tableau

Ai=0
v - ATe=0
Kii + Kvv=S

0
T
A

i
v

0 e

(N eqns)
(B eqns)
(B eqns)

N+2B eqns
N+2B unknowns
N = # nodes
B = # branches

Sparse Tableau Analysis (STA)

Advantages
It can be applied to any circuit
Eqns can be assembled directly from input data
Coefficient Matrix is very sparse
Disadvantages
Sophisticated programming techniques and data
structures are required for time and memory
efficiency

Nodal Analysis (NA)

1. Write KCL
Ai=0
(N equations, B unknowns)
2. Use BCE to relate branch currents to branch
voltages
i=f(v)
(B equations B unknowns)
3. Use KVL to relate branch voltages to node voltages
v=h(e)
(B equations N unknowns)

Yne=ins
Nodal Matrix

N eqns
N unknowns
N = # nodes

Nodal Analysis - Example

R3

R1
1. KCL:
2. BCE:
3. KVL:

Yne = ins
Yn = AKvAT
Ins = Ais

Is5

R4

G2v3

0
Ai=0
Kvv + i = is i = is - Kvv A Kvv = A is
v = ATe A KvATe = A is

1
1

2
R
R3
1
1

R3

1
R3

1
1

R3 R4

G2

e1 0
e i
2 s5

Nodal Analysis
Example shows how NA may be derived from
STA
Better Method: Yn may be obtained by direct
inspection (stamping procedure)
Each element has an associated stamp
Yn is the composition of all the elements stamps

Nodal Analysis Resistor

Stamp
Spice input format: Rk
N+
Rk

N-

N+

N-

N+ N-

N+

N-

1
Rk
1

Rk

1

Rk

1
Rk

Rkvalue
What if a resistor is
connected to ground?
.
Only contributes to the
diagonal

1
iothers R eN eN is
k

KCL at node N+

1
iothers R eN eN is
k

KCL at node N-

Nodal Analysis VCCS Stamp

Spice input format: Gk
NC+

NC-

i
i

others
others

Gkvalue

N+

+
vc

N+ N- NC+ NC-

NC+
N+ Gk

G
k
N-

Gkvc

Gk eNC eNC is
Gk eNC eNC is

NKCL at node N+
KCL at node N-

NC-

Gk
Gk

Nodal Analysis Current source

Stamp
Spice input format: Ik

N+ N- Ikvalue

N+
N+ NN+
Ik

N-

N-

Ik
I
k

Nodal Analysis (NA)

Advantages
Yn is often diagonally dominant and symmetric
Eqns can be assembled directly from input data
Yn has non-zero diagonal entries
Yn is sparse (not as sparse as STA) and smaller than
STA: NxN compared to (N+2B)x(N+2B)
Limitations
Conserved quantity must be a function of node variable
Cannot handle floating voltage sources, VCVS, CCCS, CCVS

Modified Nodal Analysis (MNA)

How do we deal with independent voltage sources?
+

Ekl

k
ikl

1 ek

1 el

0 ikl Ekl

ikl cannot be explicitly expressed in terms of node

voltages it has to be added as unknown (new column)
ek and el are not independent variables anymore a
constraint has to be added (new row)

MNA Voltage Source Stamp

Spice input format: Vk

Ek

N+

N-

ik

N+ N-

Ekvalue

N+ N- ik
N+ 0

0 1
N- 0 0 -1
Branch k 1 -1 0

RHS

0
0

Ek

Modified Nodal Analysis (MNA)

How do we deal with independent voltage sources?
Augmented nodal matrix

Yn
C

B e
MS

0 i

Some branch currents

In general:

Yn
C

B e
MS

D i

MNA General rules

A branch current is always introduced as an
additional variable for a voltage source or an
inductor
For current sources, resistors, conductors and
capacitors, the branch current is introduced
only if:
Any circuit element depends on that branch current
That branch current is requested as output

MNA CCCS and CCVS

Stamp

MNA An example
1

R1

+ v3 R3

Is5

R4

G2v3
0

i3 i4 i5 i6 0
i6 i8 0
i7 i8 8

(1)
(2)
(3)
(4)

+
+

E7v3

Step 1: Write KCL

i1 i2 i3 0

ES6

R8
4

MNA An example
Step 2: Use branch equations to eliminate as many branch currents
as possible
1
1
v1 G2v3 v3 0
R1
R3

(1)

1
1
v3 v4 i6 is 5
R3
R4

(2)

i6

1
v8 0
R8

(3)

i7

1
v8 0
R8

(4)

Step 3: Write down unused branch equations

v6 ES 6
v7 E7 v3 0

(b6)
(b7)

MNA An example
Step 4: Use KVL to eliminate branch voltages from previous
equations
1
1
e1 G 2 (e1 e2 )
(e1 e2 ) 0
R1
R3

1
1
(e1 e2 )
e 2 i6 i s 5
R3
R4

(1)
(2)

i6

1
( e3 e 4 ) 0
R8

(3)

i7

1
(e3 e 4 ) 0
R8

(4)

(e3 e2 ) ES 6
e4 E 7 (e1 e2 ) 0

(b6)
(b7)

MNA An example
Yn
C

B
0

e
i MS

1
1
G2

R3
R1
1

R3

G2
R3

1
1

R3 R4

0
E7

1
E7

1
R8
1

R8
1
0

R8
1
R8
0
1

e 0
1

1 0 e
i
2 s5
e 0
3
1 0

e4 0

0 1 i6 ES 6
i7 0
0 0

0 0

Modified Nodal Analysis (MNA)

Advantages
MNA can be applied to any circuit
Eqns can be assembled directly from input data
MNA matrix is close to Yn
Limitations
Sometimes we have zeros on the main diagonal