Академический Документы
Профессиональный Документы
Культура Документы
Tasting Tips
for the Connoisseur
uvm_env
uvm_scoreboard
Factory
config db
Virtual sequencer
Register Layer
uvm_agent
uvm_sequencer
uvm_agent
uvm_agent
uvm_agent
uvm_monitor
uvm_driver
DUT
3
Sequencer
Sequence
Sequence
start_item(req);
finish_item(req);
TLM
TLM export
export
TLM
TLM port
port
Driver
seq_item_port.get(req);
DUT
A Simple Sequence
class my_seq extends uvm_sequence #(my_tx);
`uvm_object_utils(my_seq)
function new(string name = "");
super.new(name);
endfunction: new
task body;
repeat(4)
begin
req = my_tx::type_id::create("req");
start_item(req);
if (!req.randomize())
`uvm_error("", "failed to randomize")
finish_item(req);
end
endtask
endclass
5
Nested Sequences
class top_seq extends uvm_sequence #(my_tx);
...
`uvm_declare_p_sequencer(my_seqr)
...
Variable that points to sequencer
if (!seq.randomize())
`uvm_error("", "failed to randomize")
seq.start(p_sequencer, this);
end
endtask
Sequencer
Parent
Sequencer
Parent sequence
sequence
...
6
Concurrent Sequences
task body;
fork
begin
seq1 = my_seq::type_id::create("seq1");
if (!seq1.randomize())
`uvm_error("", "failed to randomize")
seq1.start(p_sequencer, this);
end
begin
seq2 = my_seq::type_id::create("seq2");
if (!seq2.randomize())
...
seq2.start(p_sequencer, this);
end
begin
...
seq3.start(p_sequencer, this);
end
join
Transactions
Transactions will
will be
be strictly
strictly interleaved
interleaved
endtask
7
fork
start
body
start_item
finish_item
Sequencer
First
First in
in
priority
priority
priority
sequence
sequence
sequence
Arbitration
Driver
FIFO
FIFO
start
body
start_item
finish_item
start
body
start_item
finish_item
join
begin
seq_item_port.get(req);
seq_item_port.get(req);
seq_item_port.get(req);
end
9
Arbitration Algorithms
Arbitration mode
SEQ_ARB_FIFO
SEQ_ARB_RANDOM
Random order
SEQ_ARB_STRICT_FIFO
SEQ_ARB_STRICT_RANDOM
SEQ_ARB_WEIGHTED
Weighted by priority
SEQ_ARB_USER
User-defined
11
Could
Could access
access properties
properties of
of the
the sequence
sequence object
object
endclass
12
Virtual Sequences
seqr0
Can
Can be
be null
null
Sequencer
Virtual sequence
No transactions
fork
seq1.start(seqr1, this)
seqr3
seqr2
seqr1
Sequencer
Sequencer
Sequencer
priority
priority
seq1
seq1
body
start_item
Blocks
Blocks
...
Inherits
Inherits priority
priority
Driver
Driver
Driver
...
14
Sequencer Lock
seqr0
Sequencer
Virtual sequence
vseq.start(seqr0, null)
body
No transactions
Important!
Important!
begin
this.lock(seqr1);
seqr1
seq1.start(seqr1, this);
Sequencer
body
priority
priority
priority
start_item
seqx
seqy
seq1
finish_item
this.unlock(seqr1);
...
Driver
15
Virtual sequence
vseq1.start
Virtual sequence
vseq2.start
body
vseq3.start
body
begin
body
begin
begin
lock
lock
grab
seq1.start
seq2.start
seq3.start
unlock
unlock
ungrab
Sequencer
Head
Tail
grab req
priority
priority
priority
lock req
priority
vseq3
seqx
seqy
seq2
seq1
vseq2
seq3
Grabs
Grabs
inserted
inserted
here
here
Driver
Locks
Locks
inserted
inserted
here
here
16
Sequencer
Sequence
TLM
TLM export
export
req
finish_item(req);
get_response(rsp);
rsp
TLM
TLM port
port
Driver
DUT
seq_item_port.get(req);
seq_item_port.put(rsp);
The
The paper
paper describes
describes in
in detail
detail
how
how to
to code
code pipelined
pipelined req/rsp
req/rsp
and
and out-of-order
out-of-order responses
responses
18
Layered Sequencers
start_item(req);
Sequencer
Ptr
Ptr to
to upper
upper
sequencer
sequencer
Sequence
req
Could
Could be
be
one:one
one:one or
or
one:many
one:many or
or
many:one
many:one or
or
many:many
many:many
get_response(rsp);
rsp
seqr_upper.get(req_up);
Sequencer
start_item(req_lo);
Sequence
finish_item(req_lo);
get_response(rsp_lo);
req
req:rsp
req:rsp == 1:1
1:1
finish_item(req);
Driver
rsp
seqr_upper.put(rsp_up);
seq_item_port.get(req);
seq_item_port.put(rsp);
The
The paper
paper shows
shows more
more detail
detail
DUT
19
Sequencer
Sequence
Sequence
Communicate
Communicate or
or
synchronize?
synchronize?
Sequencer
Sequence
Analysis
Analysis ports
ports
Callbacks
Callbacks
Events
Events
Barriers
Barriers
Driver
Sequencer
Sequence
get(req)
Driver
Driven
Driven by
by the
the DUT
DUT interface
interface timing
timing
Must
Must not
not
block!
block!
DUT
21
Wiggle
Wiggle pins
pins for
for idle
idle cycle
cycle
Must
Must be
be called
called in
in same
same time
time step
step
Response
Response can
can be
be pipelined
pipelined
22