Digital Electronics and Computer

Organization
Digital
Design
Lecture 23: Registers and
Counters

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Registers
Register - A group of flip-flops, each one of which is
capable of storing one bit information
N-bit register, N- Flip-flops, capable of storing N-bits
In addition may contain additional combinational
logic gates
Flip-flops : to hold binary information
Logic gates : to determine how the information is
transferred into flip-flops
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Registers
4-bit storage register
Common clock input trigger
@posedge data at inputs transferred
in to register
Clear connected to active low Reset
(R) of flip-flops
Clear=0 flip-flops reset state

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Register with parallel load

Master clock generator

Transfer of new information - loading

If all inputs loaded simultaneouslyParallel load

Clock edge
parallel
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loads

registers

in
4

Register with parallel load

Two ways to leave register contents
unchanged
Inputs held constant
Avoid clock from reaching register
Input bus unavailable for other traffic
Clock can be avoided by controlling clock
with an enabling gate- not advisable
Inserting
gates
on
synchronization problems

clock

causes

Advisable to control D input rather than

controlling clock
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Register with parallel load

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Register with parallel load

When load = 0, no change in
outputs
When load = 1, Load new
information
Clock not altered
Load
signal
determines
whether to accept new info or
keep the same info

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Loa
d

Shift registers
A register capable of shifting the binary information
held in each cell to its neighboring cell in a selected
direction
Consists of a chain of flipflops
Output of one flip-flop input of next
flip-flop
Common clock
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Shift registers

Consists
flops

of

only

Flip-

Clock pulse shifts contents of register to one

position right
Serial input, Serial output
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Shift registers
0

Final Data to be moved 1

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10

Shift registers
1

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11

Shift registers
1

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12

Shift registers
0

0
Final Data to be moved 1011

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13

Serial Transfer
Applications of shift register serial data transfer
(e.g. USB, UART)

Serial Mode- information altered or manipulated

one bit at a time

Information transferred by shifting bits

source register in to destination register

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from

14

Serial Transfer

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15

Serial Transfer
Operation assuming 4-bit shift register

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Timing
pulse

Shift
Register A

Shift
Register B

Initial
valueT
After
1

1 0 1 1
1 1 0 1

0 0 1 0
1 0 0 1

After T2
After T3

1 1 1 0
0 1 1 1

1 1 0 0
0 1 1 0

After T4

1 0 1 1

1 0 1 1
16

Universal Shift register

Capabilities of Universal shift register
Clear signal to clear the register to 0
Clock input to synchronize
Shift-right
Shift-left

Bidirectional
Register

shift

Parallel load
Parallel out
Control state to leave information in register
unchanged
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17

Universal Shift register

Mode
control

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Register
operation

S1

S0

No change

Shift right

Shift left

Parallel load

18

Universal Shift register

0

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19

Universal Shift register

0

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20

Universal Shift register

1

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21

Universal Shift register

1

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22

Next Class
Applications of shift Registers
Counters

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23

Thank You
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24