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Software Defined Radio on

Field Programmable Gate Array


Karel L STERCKX
Shinawatra University, Thailand

What is SDR?
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SDR aims to implement as much of the electronics of a


communication system on programmable digital platforms,
preferably a single platform System On Programmable Chip
(SOPC)
Places the analogue/digital conversion as close as possible to the
antenna Ideally

ADC immediately after the Low Noise Amplifier (LNA)


DAC in front of the RF Power Amplifier (PA)

Analogue/digital conversion at RF is not yet possible


Analogue IF/RF conversion of IQ signals is necessary
Note that phase modulation (hence, also frequency modulation) is
accomplished via amplitude modulation (which is simpler) of two
orthogonal carriers, called the In-phase and Quadrature-phase carriers

Figure on the next slide illustrates the present day implementation


of SDR

SDR Illustrated
3

Advantages of SDR
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The Digital Advantage: Merits of processing signals in digital format


More robust against noise and processing errors Signal deviations, if
not too large, are still recognised as 0 or 1
Error coding can be added to enhance robustness against noise
More effective E.g. FIR filter has sharp roll-off and linear phase
Requires no tuning or tweaking

The Software Advantage


Designs can be upgraded
Multiple radio standards, existing and emerging, can be supported
Designs are portable Can run on different hardware platforms
Reconfigurable on the fly Users can operate one radio in different
countries with different communication standards
Reusability of designs or parts thereof

Advantages of SDR (2)


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Allows for Cognitive Radio (CR) CR senses and responds to RF


spectrum conditions
Ability to find unused spectrum (active spectrum utilisation typically falls
below 5%, even in dense populated areas)
Potential to seek low-cost communication channels E.g. VoIP via WiFi
instead of cellular phone links

The System-on-Chip (Soc) Advantage: Designs


Are faster
Use less power Especially important in battery-powered devices
Occupy less PCB space Especially important in hand-held devices

SDR Implementation Platform


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Most suitable platform is the Field Programmable Gate Array (FPGA)


A single programmable chip that contains all components that are
required to implement a communication system up to IF modulation

Combinational and sequential logic to implement coding


Multipliers and adders, which are essential to the implementation of
modulation/demodulation
Multipliers implement mixers
Adders combine signals
Multipliers and adders combine as a multiplier-accumulator (MAC), the building
block of digital filters

Phase Locked Loops (PLLs) to facilitate clock management


High-end FPGAs also enable the implementation of an embedded RISC
processor

Comparison of FPGA with other programmable digital chips is


provided next

FPGA vs. Processor


7

FPGA
Software configures hardware
Hardware processes data only
More effective
Allows for parallel as well as
sequential execution
About 10 cheaper

Processor
Software runs on fixed hardware
Hardware processes code as well
as data
Allows for sequential execution
only

About 10 higher clock speeds


Sequential and parallel processing are illustrated on the next two slides,
respectively
Illustrations on these two slides were taken from the Xilinx white paper
Comparing and Contrasting FPGA and Microprocessor System Design and
Development by Karen Parnell and Roger Bryner, July 21, 2004, WP213 (v1.1)

Sequential Processing
8

Limited resources are time-shared


Used in conventional DSP processors

Parallel Processing
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A large number of similar resources can be configured to execute in


parallel
Used to implement DSP functions on FPGA

FPGA vs. CPLD


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CPLD = Complex Programmable Logic


FPGA = Field Programmable Gate
Device
Array
Consist of large sum-of-product logic
Consist of small logic elements that
arrays that can be inter-connected via a
can be interconnected via
centrally located Programmable
programmable interconnects that run
interconnect Array (PIA) More
through run throughout the entire
predictable time delays
chip More flexible
Register (flip-flop) rich Suitable for Limited number of flipflops More
suited for large combinational logic and
implementation of registers and
complex FSMs
counters
No higher-level embedded functions
Higher-level embedded functions
and no embedded memories
(notably adders and multipliers) and
embedded memories, facilitating
Lookup Tables (LUTs)
Need to be removed from the circuit
In system (re)programmable
when being (re)programmed
Need to be reprogrammed after
Retain the programmed configuration
power shutdown
after power shutdown

CPLD Architecture
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Architecture of FPGA Logic


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Example of FPGA Architecture: Altera Cyclone II


13

Manufacturers
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The following companies are the market leaders in FPGA


manufacturing
Xilinx: www.xilinx.com
Altera: www.altera.com

Both are based in San Jose, CA, USA


FPGA related products of the market leaders are summarised on the
next two slides
Other manufacturers of programmable logic are

Actel (www.actel.com)
Atmel (www.atmel.com)
Lattice (www.latticesemi.com)

Xilinx and Altera FPGA related Products


15

Xilinx
FPGA

Altera
FPGA
Cyclone Series: Low Cost
Stratix Series: High Performance
Aria: Mid range

Spartan Series: Low Cost


Virtex Series: High Performance
EasyPath: Mid range

Design Software

Quartus II
DSP Builder Includes automatic
code generation from Simulink and
MATLAB

ISE
System Generator for DSP
Includes automatic code generation
from Simulink and MATLAB

Embedded processor
Name: Microblaze
Type: 32-bit RISC
Implemented in the logic and
memory blocks of the Virtex
architecture

Design Software

Embedded processor
Name: NIOS II
Type: 32-bit RISC
Implemented in the logic and
memory blocks of the Stratix
architecture

Useful SDR Links


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SDR Forum
Non-profit international industry association dedicated to promoting the
success of next generation radio technologies
Established in 1996
Website: www.sdrforum.org

GNU Radio
Open source SDR project of the Free Software Foundation (www.fsf.org)
GNU Radio applications are primarily written using the Python
programming language
Website: http://gnuradio.org/trac

Thank you for your attention!


Questions?
Karel L STERCKX
(karel@shinawatra.ac.th)

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