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z1 7 3 jj
jj 1
z2 0
i 0 N
p1 3 3 jj
p3 7
j 0 N
p2 3
p4 0 2 jj
e 10.1 i 0.4
j 10.1 j 0.4
f ( e w)
i j
[ ( e z1 w jj) ( e z2 w jj) ]
( e w jj p1) ( e w jj p2) ( p3 w jj e) ( e w jj p4)
f e j
i
Bode Plots
Example 7.2
Frequency Response
Exercise 7.1
A M FL( s ) FH( s )
A(s )
AM
A L( s )
A M FL( s )
A H( s )
A M FH( s )
L H
P1 P2
2 Z1 2 Z2
Low-Frequency Response
1
1
2
P1
1
2
P1
2
2
Z1
2
2
Z1
CiRio
i
Ci Ris
i
2 Second Quiz:
What is the value of Rin
on this circuit?
Rin
V (s )
i
Rin R
1
s C
C1
V (s )
g
Rin
V (s )
Rin R
P1
1
CC1 ( Rin R)
1
C
( Rin R)
C1
Vg ( s )
I( s )
Zs
gm
g m Vg ( s )
Id ( s )
YS
ZS
RS
YS
g m YS
s CS
s
g m Vg ( s )
Id ( s )
CS
CS RS
g 1
m R
CS
gm
1
P2
CS RS
introduces a zero at
ZS
1
RS
CS
Rs
CS
gm
RS g
m
approximation is valid
ro RD
Id ( s ) Parallel RD ro RL
s
P3
CC2 RL
R r
D o
RD ro
CC2
1
CC2
RL
RD ro
RD ro
A L( s )
AM
Vo ( s )
Vi( s )
Rin
A M
s Z
s P1 s P2 s P3
g m Parallel RD ro RL
Rin R
Example 7.6
Exercise 7.7
The frequency of the zero is given by eq. 7.37
1
CS RS
CS
The frequency of the pole is given by eq. 7.38
gm
p
gm
CS
1
RS
Exercise 7.8
Exercise 7.9
Exercise 7.9
Exercise 7.10
Exercise 7.11
A MOSFET common-source amplifier (a), and a BJT common-emitter amplifier (b). here, Vs and Rs represent the
Thvenin equivalent of the circuit at the input side, including the output circuit of the preceding amplifier stage (if
any) and the bias network of the transistor Q (if any). Similarly, RL represents the total resistance between the drain
(the collector) and signal ground. Although signal ground at the source (emitter) is shown established by a large
capacitor, this is not necessary, and the circuits can be used to represent, for instance, the differential half-circuit of a
differential pair.
Millers Theorem
An admittance Y (Y=1/Z) is connected between the two nodes and these nodes are also connected to
other nodes in the network. Millers theorem provides a way for replacing the bridging admittance
Y with two admittances Y1 and Y2 between node 1 and ground, and node 2 and ground.
The relationship between V2 and V1 is given by K=V2/V1
To find Y1 and Y2
1
I1
V1
I2
1 I1
V2
V1
I2 2
Y1
Y2
V2
I1 Y V1 V2 YV1 1 V2 V1
I 2 Y V2 V1 YV2 1 V1 V2
I1 Y1V1
I 2 Y2V2
I1 YV1 1 K
Y1 Y 1 K
I 2 YV2 1 1 K
Y2 Y 1 1 K
Rs
gmvgs
Cgd(1+gmRL')
vi
vgs
RL'
Cgs
Cgd[1+1/(gmRL')]
~= Cgd
CT
1
1
C gs C gd 1 g m RL ' Rs CT Rs
vo
Differential Pair
We have seen that a symmetric differential amplifier can be
analyzed with a differential half circuit. This still holds true for
high-frequency small-signal analysis.
RD
+vd/2
-vd/2
Rs
RD
vout
Rs
Cgd
gmvgs
Rs
vd/2
I
Cgs
Cdb
RD vout
(log scale)
|Ad| (dB)
(log scale)
-20dB/dec
CMRR (dB)
-40dB/dec
(log scale)