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  • Functions of Combinational Logic

    Загружено:

    Maxene Cruz
    8 просмотров57 страниц
    This document covers combinational logic functions including adders, comparators, decoders, encoders, code converters, multiplexers, demultiplexers, and programmable logic devices. It includes 57 figures illustrating the logic diagrams and symbols for these various functions.

    Исходное описание:

    bvhjfj

    Оригинальное название

    ch06

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    This document covers combinational logic functions including adders, comparators, decoders, encoders, code converters, multiplexers, demultiplexers, and programmable logic devices. It includes 57 figures illustrating the logic diagrams and symbols for these various functions.

    Авторское право:

    © All Rights Reserved
    Скачайте в формате PPT, PDF, TXT или читайте онлайн в Scribd
    Отметить как неприемлемый контент
    8 просмотров57 страниц

    Functions of Combinational Logic

    Загружено:

    Maxene Cruz
    This document covers combinational logic functions including adders, comparators, decoders, encoders, code converters, multiplexers, demultiplexers, and programmable logic devices. It includes 57 figures illustrating the logic diagrams and symbols for these various functions.

    Авторское право:

    © All Rights Reserved
    Скачайте в формате PPT, PDF, TXT или читайте онлайн в Scribd
    Отметить как неприемлемый контент
    из 57

    Chapter 6

    Functions of
    Combinational Logic

    Adder

    Figure61Logicsymbolforahalfadder

    Figure62Halfadderlogicdiagram.

    Figure63Logicsymbolforafulladder

    Figure64Fulladderlogic

    Figure65Fulladderimplementedwithhalfadders.

    Figure67Blockdiagramofabasic2bitparalleladderusingtwofulladders.

    Figure69A4bitparalleladder.

    10

    Figure610Fourbitparalleladders.

    11

    Figure612Examplesofadderexpansion.

    12

    Figure613Two74LS83Aaddersconnectedasan8bitparalleladder(pinnumbersareinparentheses).

    13

    Figure614Avoting
    systemusingfulladdersand
    parallelbinaryadders.

    14

    Comparators

    Figure615Basiccomparatoroperation.
    (Equality)

    15

    Figure616Logicdiagramforequalitycomparisonoftwo2bitnumbers

    16

    Figure617:Example65

    17

    Figure618Logicsymbolfora4bitcomparatorwithinequalityindication.

    18

    Figure619:Example66

    19

    Figure620Pindiagramandlogicsymbolforthe74HC854bitmagnitudecomparator(pinnumbers
    areinparentheses).

    20

    Figure621An8bitmagnitudecomparatorusingtwo74HC85s.

    21

    Decoders

    Figure622Decodinglogicforthebinarycode1001withanactiveHIGHoutput.

    22

    Figure623DecodinglogicforproducingaHIGHoutputwhen1011isontheinputs.

    23

    Figure624Logicsymbolfora4lineto16line(1of16)decoder.

    24

    25

    BCD-to-Decimal Decoder

    Figure628The74HC42BCDtodecimaldecoder.

    26

    27

    Figure629

    28

    BCD-to-7-Segment Decoder

    Figure630LogicsymbolforaBCDto7segmentdecoder/driverwithactiveLOWoutputs.

    29

    Figure631Pindiagramandlogicsymbolforthe74LS47BCDto7segmentdecoder/driver.

    30

    Figure632Examplesofzerosuppressionusingthe74LS47BCDto7segmentdecoder/driver.

    31

    Encoders

    Figure633LogicsymbolforadecimaltoBCDencoder.

    32

    Figure634BasiclogicdiagramofadecimaltoBCDencoder.A0digitinputisnotneeded
    becausetheBCDoutputsareallLOWwhentherearenoHIGHinputs.

    33

    Figure635Pindiagramandlogicsymbolforthe74HC147decimaltoBCD
    priorityencoder(HPRImeanshighestvalueinputhaspriority).

    34

    Figure636Logicsymbolforthe74F1488lineto3lineencoder.

    35

    Figure637A16lineto4lineencoderusing74F148sandexternallogic.

    36

    Figure638Asimplifiedkeyboardencoder.

    37

    Code Converter
    BCD-to-Binary Conversion

    38

    Figure639FourbitbinarytoGrayconversionlogic.

    39

    Figure640FourbitGraytobinaryconversionlogic

    40

    Figure641:Example613

    41

    Multiplexers (Data Selectors)

    Figure642Logicsymbolfora1of4dataselector/multiplexer.

    42

    43

    Figure643Logicdiagramfora4inputmultiplexer.

    44

    Figure644

    45

    Figure645Pindiagramandlogicsymbolforthe74HC157Aquadruple2inputdata
    selector/multiplexer.

    46

    Figure646Pindiagramandlogicsymbolforthe74LS1518inputdataselector/multiplexer.

    47

    Figure647A16inputmultiplexer.

    48

    Figure648Simplified7segmentdisplaymultiplexinglogic.

    49

    Demultiplexers

    Figure651A1lineto4linedemultiplexer.

    50

    Figure652

    51

    Figure653The74HC154decoderusedasademultiplexer.

    52

    Parity
    Generators/Checkers

    Figure654

    53

    Figure655The74LS2809bitparitygenerator/checker.

    54

    Programmable Logic

    Figure661TypicalconfigurationforconventionalPLDprogramming.

    55

    Figure662FlowchartofanSPLDconventionalprogrammingsequence.

    56

    Figure663TypicalconfigurationforinsystemprogrammingofaPLD.

    57

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