The Programmable keyboard

display Interface - 8279

8279 is a general purpose Keyboard

Display controller that simultaneously
drives the display of a system and
interfaces a Keyboard with the CPU
The Keyboard Display interface scans
the Keyboard to identify if any key has
been pressed and sends the code of the
pressed key to the CPU
It also transmits the data received from
the CPU,

 The Keyboard is interfaced either in the

interrupt or the polled mode
In the interrupt mode, the processor is
requested service only if any key is
pressed, otherwise the CPU can
proceed with its main task.
In the polled mode, the CPU
periodically reads an internal flag of
8279 to check for a key pressure

 The Keyboard section can interface

an array of a maximum of 64 keys
with the CPU
The Keyboard entries (key codes) are
debounced and stored in an 8-byte
FIFO RAM, that is further accessed by
the CPU to read the key codes.
If more than eight characters are
entered in the FIFO (i.e. more that
eight keys are pressed), before any
FIFO read operation, the overrun
status is set.

 If a FIFO contains a valid key entry,

the CPU is interrupted (in interrupt
mode) or the CPU checks the status
(in polling) to read the entry.
Once the CPU reads a key entry, the
FIFO is updated, i.e. the key entry is
pushed out of the FIFO to generate
space for new entries

 The 8279 normally provides a

maximum of sixteen 7-seg display
interface with CPU
It contains a 16-byte display RAM
that can be used either as an
integrated block of 16x8-bits or two
16x4-bit block of RAM
The data entry to RAM block is
controlled by CPU using the
command words of the 8279.

Architecture and Signal Descriptions of 8279

The Keyboard display controller chip

8279 provides
1.) A set of four scan lines and eight
return lines for interfacing keyboards.
2.) A set of eight output lines for
interfacing display

Pin diagram

Keyboard Section

 Consider a matrix keyboard and

recollect how a key press is identified.
0s are sent on one dimension of the
matrix and the other dimension is
read in the lines that are read in are
called return lines (RL0 to RL7 here).
However, here we have to send out a
binary sequence.
That is done by the scan lines SL0 to
SL3.

Segment Definitions for the

connection used here

 What data should be outputted from

the 8279, to display the following
characters, with reference to the
connection in figure?
i) A
ii) 5
iii) blank

Solution
For the connections in Fig, for any segment
to be lighted so, the corresponding bit is to
be 0.
i) For A, the segments to be activated by a
0 are a, b, c, e, f, g. From Fig 10.15, the
corresponding
byte is 1000 1000 i.e., 88H.
ii) For 5, the segments to be lighted up are a,
c, d, f, g. The byte is 0010 1001 i.e., 29H.
iii) For no segment to be lighted up, the byte
is 1111 1111 i.e., FFH.

8237 DMA CONTROLLER

The 8237 supplies memory & I/O with
control signals and memory address
information during the DMA transfer.
8237 is capable of DMA transfers at
rates up to 1.6M bytes per second.

 Memory-to-memory transfer is much

more powerful than the
automatically repeated MOVSB
instruction.
8237 requires only 2.0 s per byte.

8259 Programmable Interrupt

Controller
INTR was not allotted any vector
address, rather an external device
was supposed to hand over the type
of the interrupt.(Type 0 to 7 for RST0
to RST7)

 Programmable interrupt controller is

able to handle a number of interrupts
at a time.
It takes care of a number of
simultaneously appearing interrupt
requests along with their types and
priorities.

Figure 10.21 | Basic connections

between a PIC 8259 and the 8086

0808/0809 - ADC
The 8-bit A/D converter uses successive
approximation as the conversion
technique.
When an analog voltage is given as an
input to an ADC, it gets converted to a
digital number which is transferred to the
8086.
The digital value can be stored in the RAM
of the system and may be displayed or
used in further computations

Figure 9.19 | General block diagram of the

connection between an ADC, PPI and 8086

Mark distribution
(PROVISIONAL)

Module 1 - 5 marks
(no need to study 8085 programming)
Module 2 - 20 marks
(max 5 marks for simple 8086 program)
Module 3 - 10 marks
(no need to study 8237, 8259 & 0808/0809)
Module 4 - 15 marks
(max 5 marks for 8051 simple program)
After end exams try the 8051 programs
with Keil Assembler