8255 Programmable

Peripheral Interface

PERIPHERAL INTERFACING PPI INTERFACING

Peripheral Interfacing is considered to be a main part of

Microprocessor, as it is the only way to interact with the external
world.
The interfacing happens with the ports of the Microprocessor.
The main IC's which are to be interfaced with 8085 are:
1. 8255 PPI
2. 8259 PIC
3. 8251 USART
4. 8279 Key board display controller
5. 8253 Timer/ Counter
6. A/D and D/A converter interfacing.

 The 8255 is a popular interfacing component, that

can interface any TTL-compatible I/O device to a
microprocessor.
It is used to interface to the keyboard and a parallel
printer port in PCs (usually as part of an integrated
chipset).
PPI has 24 pins for I/O that are programmable in
groups of 12 pins and has three distinct modes of
operation.
It has 40 pins and requires a single +5V supply.

The 8255 has three ports: Port-A, Port-B and Port-C.

Port-A can be programmed to work in any one of the three operating

modes mode-0, mode-1 and mode-2 as input or output port.

Port-B can be programmed to work either in mode-0 or mode-1 as

input or output port.

Port-C (8-pins) has different assignments depending on the mode of

port-A and port-B.

If port-A and B are programmed in mode-0, then the port-C can

perform any one of the following functions.
1. As 8-bit parallel port in mode-0 for input or output.
2. As two numbers of 4-bit parallel ports in mode-0 for input or
output.

 The individual pins of port-C can be set or reset

for various control applications.
If port-A is programmed in mode- 1/mode-2 and
port-B is programmed in mode-1 then some of
the pins of port-C are used for handshake
signals and the remaining pins can be used as
input/ output lines or individually set/reset for
control applications.

The read/write control logic

The read/write control logic requires six control signals. These

signals are given below
1. RD (low): This control signal enables the read operation. When this
signal is low, the microprocessor reads data from a selected I/O port
of the 8255A.
2. WR (low): This control signal enables the write operation. When this
signal goes low, the microprocessor writes into a selected I/O port or
the control register.
3. RESET: This is an active high signal. It clears the control register
and set all ports in the input mode.
4. CS (low), A0 and A1: These are device select signals.

8255 Programmable Peripheral Interface

Data bus
A0
A1
RD
WR
RESET

8085

A7
A6
A5
A4
A3
A2
IO/M

D[7:0]

PA[7:0]
PB[7:0]

Control port

PC[7:0]

CS

A1

A0

0
0
1
1

0
1
0
1

Port
PA
PB
PC
Control

8255 Programmable Peripheral

Interface

Programming 8255
8255 has three operation modes: mode 0, mode 1, and mode 2

MODES OF OPERATION OF 8255

All the functions of 8255 A is classified according to two modes:
1. Bit Set/Reset (BSR) mode: The BSR mode is used to set or
reset the bits in port C.
2. I/O mode. i) Mode 0,
--all ports function as simple as I/O ports.
ii)Mode 1
-- a handshake mode whereby port A and
port B use bits from port C as handshake signals. In the
handshake mode, two types of I/O data transfer can be
implemented: status checks and interrupt.
iii)Mode 2. port A can be set up for bidirectional
data transfer using handshaking signals from port C and port
B can be set up either in Mode 0 or Mode 1.

Basic Mode Definitions and Bus

Int

Mode 0
Basic I/O

Mode 1
Strobe I/O

Mode 2
Bi-Dir Bus

Mode 0 (Basic Input/Output).

This functional configuration provides

simple input and output operations for
each of the three ports.
No handshaking is required, data is
simply written to or read from a
specified port.

MODE 1 (Strobed Input/Output)

This functional configuration provides a
means for transferring I/O data to or
from a specified port in conjunction with
strobes or handshaking signals.
In mode 1, Port A and Port B use the
lines on Port C to generate or accept
these handshaking signals

Mode 1 Basic functional Definitions

Two Groups (Group A and Group B).
Each group contains one 8-bit data port
and one 4-bit control/data port.
The 8-bit data port can be either input
or output Both inputs and outputs are
latched.
The 4-bit port is used for control and
status of the 8-bit data port.

8255: Mode 2 Bi-directional Operation

This functional configuration provides a means
for communicating with a peripheral device or
structure on a single 8-bit bus for both
transmitting and receiving data (bidirectional bus
I/O).
Handshaking signals are provided to maintain
proper bus flow discipline in a similar manner to
MODE 1.
Interrupt generation and enable/disable
functions are also available.

MODE 2 Basic Functional

Definitions:
Used in Group A only.
One 8-bit, bi-directional bus port (Port A) and a
5-bit control port (Port C).
Both inputs and outputs are latched.
The 5-bit control port (Port C) is used for control
and status for the 8-bit, bi-directional bus port
(Port A).

 Mode 0 : Simple Input or Output

This is also called basic I/O mode. In this mode, ports A
and B are used as two simple 8-bit I/O ports and port C
as two 4-bit ports. Each port (or half-port in case of C)
can be programmed to function as simply an input or an
output port. The input/output features in Mode 0 as
follows:
Output is latched.
Inputs are not latched.
Ports do not have handshake or interrupt capability.
Any port can be used as input or output port.
4-bit can combined used as a third 8-bit port.

MODE 1: Input Control Signals

STB (Strobed input):

This signal is generated by a peripheral device to indicate that
it has transmitted a byte of data

IBF(input Buffer Full): This signal is an acknowledgement by

the 8255A to indicate that it the input latch has received the
data byte. This is reset when the MPU reads the data.

 INTR(Interrupt Request) :- This is an output signal

that may be used to interrupt the MPU. This signal is
generated if STB,IBF and INTE(Internal flip flop) are
all at logic 1. this is reset by the falling edge of the
RD Signal.
INTE(Interrupt Enable):
This is an internal flip
flop used to enable or disable the generation of the
INTR. The 2 flip flops INTEA and INTEB are set/reset
using the BSR mode. The INTEA is enabled or
disabled through PC4 and INTEB is enabled or
disabled through PC2.

 MODE 1: Output Control Signals:

OBF(Output Buffer Full):- This is an output signal
that goes low when the MPU writes data into the
output latch of the 8255 A. This signal indicates to an
output peripheral that new data are ready to be read.
It goes high again after the 8255A receives an ACK
from the peripheral.
ACK (Acknowledge):- This is an input signal from a
peripheral that must output a low when the
peripheral receives the data from the 8255A ports.

 INTR(Interrupt Request):- This is an output signal, and

it is set by the rising edge of the acknowledge signal.
This signal can be used to interrupt the MPU to request
the next data byte for output. The INTR is set when
OBF, ACK and INTE are all one and reset by the falling
edge of WR.
INTE(Interrupt Enable):- This is an internal flip flop to a
port and needs to be set to generate the INTR signal.
The two flip flops INTEA and INTEB are controlled by
bits PC6 and PC2 respectively, through the BSR mode.
PC4,5:- These two lines can be set up either as input or
output.

Mode 2: Bidirectional Data Transfer

also called strobe bi-directional I/O mode.
used primarily in applications such as data transfer
between two computers of floppy disk controller
interface.
In this mode, Port A can be configured as the
bidirectional port and port B either in Mode 0 or Mode 1.
Port A uses five signals from port C as handshake
signals for data transfer.
The remaining three signals from port C can be used as
simple I/O or as handshake for port B.

2. BSR MODE:
The BSR mode is concerned only with the 8 bit of port C,
which can be set or reset by writing an appropriate
control word in the control register.
A control word with bit d7=0 is recognized as a BSR
control word. It does not alter any previously transmitted
control word with bit d7=1 :
thus the I/O operations of ports A & B are not affected by
the BSR control word.
In the BSR mode individual bits of port C can be used for
applications such as an on/off switch.

Programming 8255
Mode 0:
Ports A, B, and C can be individually programmed as input or output ports
Port C is divided into two 4-bit ports which are independent from each other

Mode 1:
Ports A and B are programmed as input or output ports
Port C is used for handshaking

PC4
PC5
PC3

8255

PA[7:0]
STBA
IBFA
INTRA
PB[7:0]

PC2
PC1
PC0
PC6, 7

STBB
IBFB
INTRB

PC7
PC6
PC3

8255

PA[7:0]
OBFA
ACKA
INTRA
PB[7:0]

PC2
PC1
PC0
PC4, 5

OBFB
ACKB
INTRB

Programming 8255
Mode 2:
Port A is programmed to be bi-directional
Port C is for handshaking
Port B can be either input or output in mode 0 or mode 1
PA[7:0]

8255

PC7
PC6
PC4
PC5
PC3
PC0
PC0
PC0

OBFA
ACKA
STBA
IBFA
INTRA
In
In
In
PB[7:0]

1.
2.

Out
Out
Out

STBB
IBFB
INTRB

OBFB
ACKB
INTRB

Mode 1
Mode 0
Can you design a decoder for an 8255 chip such that its base address is 40H?
Write the instructions that set 8255 into mode 0, port A as input, port B as output,
PC0-PC3 as input, PC4-PC7 as output ?

To communication with peripherals through the 8255:

Determine the addresses of ports A,B and C and of the
control register according to the Chip Select logic and
the address lines A0 and A1.
Write a control word in the control register.
Write I/O instructions to communicate with the
peripherals through ports A, B and C.