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Picture of memory
Address
00000000
00000001
00000002
.
.
.
.
.
.
.
.
.
.
FFFFFFFD
FFFFFFFE
FFFFFFFF
Data
ADRS
DATA
CS
WR
OUT
CS
WR
0
1
1
x
0
1
Memory operation
None
Read selected word
Write selected word
Memory sizes
We refer to this as a 2k x n memory.
There are k address lines, which can specify one of 2k addresses.
Each address contains an n-bit word.
2k x n memory
k
n
For example
ADRS
DATA
CS
WR
OUT
long.
The RAM would need 24 address lines.
The total storage capacity is 224 x 16 = 228 bits.
Size matters!
K
M
G
Prefix
Base 2
Kilo
210 = 1,024
Mega
220 = 1,048,576
Giga
230 = 1,073,741,824
Base 10
103 = 1,000
106 = 1,000,000
109 = 1,000,000,000
Address
Some typical memory capacities:
00000000
PCs usually come with 128-256MB RAM.
00000001
Many operating systems implement virtual memory,
00000002
which makes the memory seem larger than it really is.
.
Most systems allow up to 32-bit addresses. This
.
works out to 232, or about four billion, different
.
possible addresses.
.
With a data size of one byte, the result is apparently
.
a 4GB memory!
.
The operating system uses hard disk space as a
.
substitute for real memory.
Data
.
.
.
FFFFFFFD
FFFFFFFE
FFFFFFFF
Reading RAM
2k x n memory
k
n
ADRS
DATA
CS
WR
OUT
Writing RAM
2k x n memory
k
n
ADRS
DATA
CS
WR
OUT
My first RAM
IN
OUT
0
1
1
x
0
1
Disconnected
0
1
10
decoder!
11
12
A 4 x 4 RAM
DATA and OUT are now each four bits long, so you can read and write
four-bit words.
13
We can use small RAMs as building blocks for making larger memories,
by following the same principles as in the previous examples.
Example
suppose we have some 64K x 8 RAMs to start with:
64K = 26 x 210 = 216 there are 16 address lines.
There are 8 data lines.
16
8
14
Example
Design a 256K x 8 memory, given that
you have 64K x 8 chips
16
Solution
15
8
16
16
Address ranges
8
16
17
You can also combine smaller chips to make wider memories, with the
same number of addresses but more bits per word.
Example
Design a 64K x 16 RAM, using two 64K x 8 chips.
The left chip contains the most significant 8 bits of the data.
The right chip contains the lower 8 bits of the data.
8
16
18
Dynamic memory
19
Synchronous DRAM
Memory chips are organized into modules that are
Memory bandwidth
100MHz
x 8 bytes/cycle
= 800MB/sec
20
21
Example
Given a DDR-RAM with bus speed of 100MHz and bus width
of 8-bytes. Find the :
A)Effective memory speed?
Since data can be transferred on positive and negative
edge then
Effective memory speed = 2 X 100MHz
B) Maximum transfer rate?
= 200MHz X 8 bytes/cycle
= 1600 MB/s
22
RDRAM
(from amazon.com)
23
24
Read-only memory
2k x n ROM
k
ADRS
CS
OUT
logarithms or divisions.
Many computers use a ROM to store important programs that should not
be modified, such as the system BIOS.
Game machines, cell phones, vending machines and other electronic
devices may also contain non-modifiable programs.
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Address
A2A1A0
000
001
010
011
100
101
110
111
Data
V2V1V0
000
100
110
100
101
000
011
011
26
Decoders
We can already convert truth tables to circuits easily, with decoders.
X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
1
1
0
1
1
0
1
0
0
1
For example, you can think of this old circuit as a memory that stores the
sum and carry outputs from the truth table on the right.
27
ROM setup
28
ROM example
A2
A1
A0
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)
29
A2
A1
A0
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)
V2
V1
V0
30
A2
A1
A0
V2
V1
V0
Address
A2A1A0
000
001
010
011
100
101
110
111
Data
V2V1V0
000
100
110
100
101
000
011
011
31
32
A blank 3 x 4 x 3 PLA
This is a 3 x 4 x 3 PLA
(3 inputs, up to 4
product terms, and 3
outputs), ready to be
programmed.
The left part of the
diagram replaces the
decoder used in a ROM.
Connections can be made
in the AND array to
produce four arbitrary
products, instead of 8
minterms as with a ROM.
Those products can then
be summed together in
the OR array.
Inputs
OR array
AND array
Outputs
33
0
1
1
0
Z
V1
Y
1 1
0 0
0
0
0
0
Z
V0
Y
0
1
1
1
0
1
0
0
Z
Y
0 0
1 1
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)
34
PLA minimization
For a PLA, we should minimize the number of product terms for all
functions together.
We could express V2, V1 and V0 with just four total products:
V2 = xyz + xz + xyz
0
1
1
0
Z
Y
1 1
0 0
V1 = xyz + xy
0
0
0
0
Z
Y
0
1
1
1
V0 = xyz + xy
0
1
0
0
Z
Y
0 0
1 1
V2 = m(1,2,3,4)
V1 = m(2,6,7)
V0 = m(4,6,7)
35
PLA example
A1
A0
xyz
xy
xz
xyz
V2 = m(1,2,3,4) = xyz + xz + xyz
V1 = m(2,6,7) = xyz + xy
V0 = m(4,6,7) = xyz + xy
V2
V1
V0
36