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Trade-off in using DSP, FPGA

and ASIC as Digital Hardware


for SDR

By: Kamran H. Pathan


Roll No: 9

Summary
Key Design Step is to select a Digital
Hardware for Software Radio.
Hardware Design is more complex as
compared to conventional radio.
4 factors affecting Hardware selection of
Software Radio

1.
2.
3.
4.

Flexibility
Modularity
Scalability
Performance

Foundational Digital Hardware


There are three main categories
1. ASIC
2. FPGA
3. DSP

Brief Description
DSP - It uses uP based architecture and
supports programming in HLL like C. Due to
which it offers maximum flexibility.
ASIC System circuitry is fixed on a silicon
chip, resulting in most optimized
performance in terms of speed and power
consumption. But lacks flexibility.
FPGA Tooling for FPGA is similar to ASIC
but it is more flexible than ASIC.
In general the above component constitute a
design space that trades-off flexibility,

Trade-off
ASIC, FPGA and DSP provide options
ranging from high speed with minimum
flexibility to maximum flexibility with
minimum hardware optimization.
DSP can solve general communication
problems.
Where as FPGA and ASIC prove to be useful
when complexity of the problem increases
or in case of bulk production.
When DSP is adequate to meet all
computational needs others are not used.

Trade-off contd..
FPGA is mostly used when several single
core DSP are used or multi core DSP are
needed.
Although FPGA are known for less
sophisticated mathematical operations, the
CORDIC algorithm over comes this
drawback.
FPGA is slower than ASIC and other Custom
solutions.
Also FPGA is not desirable when it comes to
complicated arithmetic.

Trade-off contd..
Also FPGA are less dense than ASIC
due to presence of configuration
points.
And they add to extra capacitance
and resistance to the signal line.
Programming bits are an overhead in
FPGA.
They can be reduced but not totally
removed.
But limiting the programming bits

Power Management Issues


Battery operated Hand held device
makes it important that the design is
low-power.
Heat dissipation due to power
consumption.
SDR architecture tends to be less
energy efficient than conventional
ones.
Use of FPGA increase area, power
dissipation and programming ease.

Power Management Issues


Reducing the operating voltage
reduces power consumption.
But voltage is lower bounded by
fabrication technology.
Application specific solution are very
power efficient as compared to DSP
and FPGA.
FPGA is programmable but its energy
per gate switch is 7 to 10 times
greater than that of ASIC.

Power Management Issues


Practical Radio must combine the
approaches to reduce power
consumption.
Some strategies are:
Parallelism in architecture and algorithm
Using power down mode
Optimizing the use of ASIC, FPGA and
DSP.
Selecting appropriate ADC.

Conclusion
There are various alternatives
present for digital hardware.
The decisive factors to select the
appropriate
one are : Speed, Power
Consumption, Product Cost, NRE
Cost, Degree of flexibility, and many
more.

Questions??

Thank You

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