Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya

Department of ECE
Indian Institute of Information Technology-Allahabad
Room No. 2221, CC-I
Telephone: 2131
Email: sitangshu@iiita.ac.in

Digital IC Design

Contents:
o MOS Transistor: Structure, External Bias,
Operation,
Current-Voltage
Characteristics,
Capacitances, Small Geometry Scaling
o MOS Inverters: Resistive Load Inverter, n-type
MOSFET load inverter, CMOS inverter
o Switching Characteristics and Interconnect
Effects: Delay Time and constraints, Interconnect
parasitics, Interconnect delay calculation, Switching
power dissipation of CMOS inverters
o Combinational MOS Logic Depletion Logic
Circuits with nMOS loads, CMOS logic circuits,
CMOS transmission gates
o Sequential MOS Logic Bistable elements, SR
Latch, Clocked Latch with FF circuits, CMOS Dlatch and Edge Triggered FFs

o Dynamic Logic Circuits Pass transistors, Voltage

Bootstrapping, Synchronous Dynamic Circuit
Testing, Dynamic CMOS Circuit Techniques, High
performance Dynamic CMOS circuits
o Semiconductor Memories DRAM, SRAM, Nonvolatile, Flash Memory, FRAM
o Low Power CMOS Logic Circuits Low Power
Design Switching Activity, Switched Capacitance,
Adiabatic Logic Circuits
o BiCMOS Logic Circuits BJT, Dynamic behavior,
BiCMOS static behavior Switching Delay
o Chip I/O Circuits ESD protection, Output Circuit
Noise, On Chip Clock Generation and Distribution,
Latchup and its prevention

Reading Materials:

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

1. CMOS Digital Integrated Circuits Analysis and Design By S-Mo Kang and Y Leblebici
2. Digital Integrated Circuits: Analysis and Design By John E. Ayers
3. Digital Integrated Circuits: A Design Perspective By Anantha P. Chandrakasan,
Borivoje Nikolic, and Jan M. Rabaey

Digital IC Design

Course Evaluation:
o
o
o
o
o

Mid Term Exam: 30 Marks

End Term Exam: 75 Marks
Quiz: 15 Marks
Assignments/Quiz: 15 Marks
Attendance & Allied Works: 15 Marks
Total: 150 Marks

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Modern MOSFETs: FinFETs

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

III-V FETs: HEMTs and MOSFETs

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Objectives
1. Understand the physical operation of MOSFET.
2. Relate that physical understanding to the IV
characteristics.

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Quick review of semiconductor physics

Essentials of semiconductor physics

1.
2.
3.
4.
5.
6.
7.

Energy bands
Doping
Fermi function and Fermi level
Carrier densities
Drift-diffusion equation
Energy band diagrams
Quasi-Fermi levels

uming that students are well aware of the above mentioned topics, if not then it
sed to go through the topics on Solid state Devices Ben G Streetman.
of the topics are mentioned in in this slides that I had already shared with you.
Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Si Energy levels

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Silicon Energy levels/Energy bands

Only the valence states are of interest to us.

The 8 valence states give rise to 8N atoms states
per cm3 in the solid.
But the interaction of the electron wavefunctions
alters the discrete energy levels of the isolated Si
atoms.

In a solid, energy levels become energy

bands.

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Intrinsic silicon

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Silicon Energy levels/Energy bands

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017

Digital IC Design

Energy band diagrams

Faculty-in-charge: Dr. Sitangshu Bhattacharya 2017