Overview

Introduction
Logic Gates
Flip Flops
Registers
Counters
Multiplexer/
Demultiplexer
Decoder/ Encoder

Introduction
Digital Computer
A computer that stores data in terms of digits
(numbers) and proceeds in discrete steps
fromdigits
one state to the next
Binary
The states of a digital computer typically
involve binary digits. A binary digit is called a
bit
RAM
CPU
I/P
Device

IOP

O/P
Device

Block diagram of a digital

computer

Logic Gates
Name
AND
OR

Symbol

Function

A
X
B

X =A B
or
X = AB

A
X

X = A+ B

X=A

Buffer

X=A

NAND

A
X

X = (AB)

NOR

A
X

X = (A + B)

X=A B
or
X = AB + AB

X = (A B)
or
X = AB+ AB

XOR
Exclusive OR

XNOR

Exclusive NOR
or Equivalence

A
B
A
B

Truth Table
A B
0 0
0 1
1 0
1 1
A B
0 0
0 1
1 0
1 A1
0
1
A
0
1
A B
0 0
0 1
1 0
1 1
A B
0 0
0 1
1 0
1 1
A B
0 0
0 1
1 0
1 1
A B
0 0
0 1
1 0
1 1

X
0
0
0
1
X
0
1
1
1
X
1
0
X
0
1
X
1
1
1
0
X
1
0
0
0
X
0
1
1
0
X
1
0
0
1

Boolean Algebra
Boolean variable: Takes only two values either true (1) or false (0).
They are used as basic units of formal logic.

Boolean function: Mapping from Boolean variables to a Boolean

value.
Truth table:
Represents relationship between a Boolean function and its binary
variables.
It enumerates all possible combinations of arguments and the
corresponding function values.
Boolean algebra: Deals with binary variables and logic operations
operating on those variables.
Logic diagram: Composed of graphic symbols for logic gates. A simple
circuit sketch that represents inputs and outputs of Boolean functions.

Basic Identities of Boolean Algebra

(Existence of 1 and 0 element)

Basic Identities of Boolean Algebra

K-maps: an alternate approach to representing
Boolean functions
K-map representation can be used to minimize
Boolean functions
Easy conversion from truth table to K-map to
minimized SOP representation.
Simple rules (steps) used to perform minimization
Leads to minimized SOP representation.
Much faster and more more efficient than previous
minimization techniques with Boolean algebra.

Basic Identities of Boolean Algebra

Karnaugh Maps

A Karnaugh map is a graphical tool for assisting in the general

simplification procedure.
Two variable maps.

B01
A
0 0 1 F=AB +AB
11 0

B01
A
0 0 1 F=AB +AB +AB
1 1 1 F=A+B

Three variable maps.

BC
00 01 11 10
A
00 1 0 1
1 1 1 1 1 F=A+B C +BC
F=ABC +AB C +ABC +ABC + ABC + ABC

Karnaugh
maps
Numbering scheme based on Graycode
e.g., 00, 01, 11, 10
Only a single bit changes in code for adjacent map cells
This is necessary to observe the variable transitions
C

00

G(A,B,C) = A

C 1
B

B
A
C

11

01

A
C

AB

F(A,B,C) =

m(0,4,5,7) = AC + BC

10

More Karnaugh Map

Examples
a

0 1
0 0 1
1 0 1
f=a

Examples

ab
c
00 01 11 10
0 0 0 1 0
1 0 1 1 1

0 1
0 1 1
1 0 0
g = b'

ab
c
00 01 11 10
0 0 0 1 1
1 0 0 1 1

cout = ab + bc + ac

1. Circle the largest groups possible.

2. Group dimensions must be a power of 2.
3. Remember what circling means!

f=a

exercise
F(A,B,C) = (3,4,6,7)
F(A,B,C) = (0,2,4,5,6)
F(A,B,C,D)=(0,1,2,6,8,9,10)

CIRCUITS
Combinational circuit
Circuits in which there are no feedback path from outputs to inputs
and there is no memory.
The input values explicitly determine the output

Designing
Combinational Circuits
In general we have to do following
steps:
1. Problem description
2. Input/output of the circuit
3. Define truth table
4. Simplification for each output
5. Draw the circuit

Flip Flops
Characteristics
- 2 stable states
- Memory capability
- Operation is specified by a Characteristic Table

The Storage elements employed in clocked

sequential circuits, capable of storing one bit of
information, are called Flip Flops
The most common types of flip flops are
SR (Set Reset)
D (Data)
Sequential circuit
JK
Circuits in which feedback path exists
from outputs to inputs and they have
T (Toggle)

memory.
The output is a function of the input
values and the existing state of the circuit

Clocked Flip Flops

In a large digital system with many flip flops,
operations of individual flip flops are required
to be synchronized to a clock pulse.
Otherwise, the operations of the system may
beClock
unpredictable.
pulse allows the flip flop to change state
only when there is a clock pulse appearing at the

c terminal (as shown in fig).

S

c
R

c
R

operates when
clock is high

operates when
clock is low

Edge Triggered Flip Flops

State transition occurs at the rising edge or falling
edge of the clock pulse

Flip Flops
Flip Flop
SR (Set
Reset)

GraphicalSymbol

c
R

Characteristic
Table
S
0
0
1
1

R
0
1
0
1

Q(t+1)
Q(t)
0
1
indeterminate
(forbidden)

D (Data)
D
C

Q
Q`

D
0
1

Q(t+1)
0
1

Flip Flops
Flip Flop

GraphicalSymbol

Characteristic
Table

J-K
J
J

cC
K
R

Q' Q

S
Q(t+1)
J KR Q(t+1)
0 0
Q(t)
0 1
0
1 0
1
1 1 indeterminate
Q(t)
(forbidden)

T (Toggle)
T
c

T
0
1

Q(t+1)
Q(t)
Q(t)