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ARCHITECTURE
UNIT I FUNDAMENTALS OF
COMPUTER DESIGN
The ALU contains necessary electronic circuits to perform arithmetic and logical
operations.
The Control Unit analyses each instruction in the program and sends the relevant
control Signals to all other units ALU, Memory, Input and Output Unit.
The program is fed into the computer through the input unit and stored in the
memory. In order to execute the program, the instructions have to be fetched from
memory one by one. This fetching of instruction is done by the control unit.
After an instruction is fetched, the control unit decodes the instruction. According
to the instruction, the control unit issues control signals to other units.
After an instruction is executed, the result of the instruction is stored in memory
or stored temporarily in the control unit or ALU, so that this can be used by the
next instruction.
The results of a program are taken out of the computer through the output unit.
The control unit and ALU are collectively known as Central Processing Unit (CPU).
REVIEW OF FUNDAMENTALS OF CPU
The physical units in a computer such as the CPU, Memory, Input and
Output units form the Hardware.
The Compilers as well as user programs (high level language or machine
language) form the software.
Hardware works as dictated by the software. The operating system is a
special software that manages the H/W and S/W.
Arithmetic and Logic Unit:
The ALU has hardware circuits which perform primitive arithmetic and logical
operations. The H/W sections in ALU are
1. Adder
2. Accumulator
3. General Purpose Register
4. Counters
5. Shifters
6. Complementer.
Adder: adds two numbers and gives the result.
Accumulator: Register which temporarily holds the results of a previous
operation in
the ALU.
REVIEW OF FUNDAMENTALS OF CPU
General Purpose Register (GPR): When an operand is stored in main memory,
it
Takes time to retrieve it. If it is stored within the CPU, it is immediately available
to the CPU.
The GPRs store different types of information
1. Operand
2. Operand address
3. Constant
Since they are used for multiple purposes, these registers are known as GPRs.
Scratch Pad Memory or Registers: During Complex operations like
multiplication,
division etc., it is necessary to store intermediate results temporarily. For this
purpose there are usually one or more scratch pad registers. These are purely
internal H/W resources and not addressable by program.
Shifter and Complementer: The shifter provides left and right shift required
for various operations. The complementer provides 2s complement of binary
numbers.
REVIEW OF FUNDAMENTALS OF CPU
CONTROL UNIT:
The control unit is the most complex unit in a computer. Its main functions are
1. Fetching instructions
2. Analyzing the OPCODE
3. Generating control signals for performing various operations.
H/W resources of a control unit:
Program Counter or Instruction Address Counter (IAC):
IAC contains the memory address of the next instruction to be fetched. When an instruction
is fetched, the IAC is incremented so that it points to the address of the next instruction.
Every instruction contains an opcode. In addition it may contain one or more of the
following.
1. Operand
2. Operand address
3. Register address
PSW Register : It contains various status bits describing the current condition of the CPU.
These are known as flags. Two such flags are
4. Interrupt Enable: When this bit is 1, CPU will recognize interrupt requests. When this
bit is 0, interrupt requests will be ignored by the CPU and they remain pending. The NMI
is an exception to this.
2. Overflow: When this bit is 1, it indicates there is an overflow condition in ALU in the
previous Arithmetic operation.
MEMORY AND IO
The Memory is organized in to locations. Each memory location is known as one
Memory Word.
Memory Types:
Older computers use magnetic core memory while the present day we use
Semiconductor Memory.
Core memory is non-volatile where semiconductor memory is volatile.
semiconductor memory is of two types: SRAM and DRAM.
SRAM preserves the contents of all the locations as long as the power supply is
present.
DRAM memory can retain the content of any location only for a few milliseconds.
Random Access and Sequential Access Memories:
In a RAM access time is same for all locations. (Core and Semiconductor Memories are
RAM)
In a sequential access memory, the read or write access is sequential. The time taken
for accessing the first location is the shortest and the time taken for the last location is
the Longest. (Magnetic tape)
MEMORY AND IO
Memory Organization:
The Memory unit consists of the following sections:
1. Memory Address Register (MAR)
2. Memory Data Register (MDR)
3. Memory Control Logic
4. Memory cells
For the read operation, the CPU does the following sequence:
(i) Sends the address to MAR.
(ii) Sends READ signal to memory control unit.
The Memory control unit decodes the address bits and identifies the
location
to be accessed. Then it initiates a read operation of the memory. The
memory takes some amount of time to present the contents of the
location
in MDR.
(iii) After a sufficient time interval, the CPU transfers the information
from
MDR.
MEMORY AND IO
For Write operation, the CPU does the following sequence:
(i) Sends address to MAR.
(ii) Sends data to MDR.
(iii) Sends WRITE signal to memory control unit.
The Memory control unit decodes the address bits and identifies the location
Where the write operation has to be performed. It then routes the MDR
Contents to memory and initiates the write operation.
Memory Access Time: The time taken by the memory to supply the contents
of a location , from the time it receives Read is called the Memory Access
time. Core Memory 800ns and semiconductor memory 100ns.
Memory Cycle Time: The memory access time plus the additional recovery
time (memory is busy due to internal operation) is known as Memory Cycle time.
Auxiliary Memory:
1. Floppy Disk drive
2. Hard Disk drive
3. Magnetic tape drive
4. CD-ROM.
Input / Output Units:
Common input units are Keyboard, floppy disk, hard disk, magnetic tape,
mouse, light pen, Scanner, Optical disk, etc.
Common Output units are display terminal, printer, plotter, floppy disk drive ,
Hard disk drive, magnetic tape drive and optical disk drive, etc.
CLASSES OF COMPUTERS
PERSONAL MOBILE DEVICES (PMD):
Collection of wireless devices with multimedia user
interfaces - cell phone and tablet computers.
Price of a system is $100- $1000 and price of p $10-$100.
Energy and size requirements lead to use of flash memory
for storage instead of magnetic disks.
Responsiveness and Predictability are key characteristics for
media applications.
For example playing a video on a PMD, the time to process
each video frame is limited, since the processor must
access and process the next frame shortly.
The memory can be substantial portion of the system cost
and it is important to optimize the memory.
CLASSES OF COMPUTERS
DESKTOP COMPUTING:
Spans from low end net books sell for $300 to high
end, heavily configured workstations that may sell for
$2500.
Since 2008 more than half of the desktop computers
made each year have been battery operated laptop
computers.
Combination of performance (measured in terms of
computer performance and graphics performance) and
price of a system, result in the newest high
performance p and cost reduced p often appear in
desktop systems.
Desktop computing tends to be reasonably well
characterized in terms of applications and
benchmarking.
CLASSES OF COMPUTERS
SERVERS:
Role of servers grew to provide large scale and more reliable file and
computing services.
For servers different characteristics are important. First availability is critical.
Consider the servers running at ATM machines for banks or airline
reservation systems.
Failure of such server system is more catastrophic than failure of a single
desktop. Since these servers must operate seven days a week, 24 hours a
day.
Second key feature of server system is scalability. The ability to scale up the
computing capacity, the memory, the storage and the I/O bandwidth of a
server is crucial.
Servers are designed for efficient throughput. The overall performance of the
server is in terms of transaction per minute or web pages served per second.
Overall efficiency and cost effectiveness of a server determined by how
many requests it can handle in a unit-time.
CLASSES OF COMPUTERS
CLUSTERS/WAREHOUSE SCALE COMPUTERS:
100,000,000
Pentium 4
Pentium III
10,000,000 Pentium II
Pentium Pro
Transistors
Pentium
Intel486
1,000,000
Intel386
80286
100,000
8086
10,000 8080
8008
4004
1,000
Year
TRENDS IN TECHNOLOGY
SEMICONDUCTOR DRAM:
Capacity per DRAM chip has increased by about 25% to
40% per year recently, doubling roughly every two to three
years.
Year DRAM growth Characterization of
rate impact on DRAM
capacity
1990 60% /Year Quadrupling every 3
years
1996 60% /Year Quadrupling every 3
years
2003 40% - 60% /Year Quadrupling every 3 to
4 years
2007 40% /Year Doubling every 2 years
Problem 1:
Find the number of dies per 300 mm (30 cm) wafer for a die
that is 1.5 cm on a side and for a die that is 1.0 cm on a side.
Dies per wafer 1.5 cm (Die area = 1.5 X 1.5 =2.25 cm 2) = 270
Dies per wafer 1.0 cm (Die area = 1 X 1 = 1cm 2) = 640
DEPENDABILITY
Dependability is a measure of system availability, reliability,
and its maintainability.
Infrastructure providers started offering Service Level
Agreement (SLA) to guarantee that their networking or
power service would be dependable.
For example they would pay the customer a penalty if they
didnt meet an agreement more than some hours per month.
Two main measures of dependability:
Module Reliability:
Mean Time To Failure (MTTF) reliability measure reciprocal
of MTTF is a rate of failures.
Service interruption is measured as Mean Time To Repair
(MTTR).
Mean Time Between Failures (MTBF) = MTTF + MTTR.
Module Availability = MTTF / (MTTF + MTTR)
MEASURING, REPORTING AND SUMMARIZING
PERFORMANCE
PROBLEM 2:
Suppose that we want to enhance the processor used for web serving. The
new processor is 10 times faster on computation in the web serving
application than the original processor. Assuming that the original processor
is busy with computation 40% of the time and is waiting for I/O 60% of the
time, what is the overall speedup gained by incorporating the enhancement?
Fraction enhanced = 0.4
Speedup enhanced = 10
Speedup overall = 1.56
THE PROCESSOR PERFORMANCE EQUATION