Вы находитесь на странице: 1из 11

PIPELINING

Hardware or software implementation pipelining can be implemented in

either software or hardware.

Large or Small Scale Stations in a pipeline can range from simplistic to

powerful, and a pipeline can range in length from short to long.

Synchronous or asynchronous flow A synchronous pipeline operates like

an assembly line: at a given time, each station is processing some amount

of information. A asynchronous pipeline, allow a station to forward

information at any time.

Buffered or unbuffered flow One stage of pipeline sends data directly to

another one or a buffer is place between each pairs of stages.


Finite Chunks or Continuous Bit Streams The digital information

that passes though a pipeline can consist of a sequence or small

data items or an arbitrarily long bit stream.

Automatic Data Feed Or Manual Data Feed Some

implementations of pipelines use a separate mechanism to move

information, and other implementations require each stage to

participate in moving information.


What is Pipelining
A technique used in advanced microprocessors where the
microprocessor begins executing a second instruction before the first
has been completed.

A Pipeline is a series of stages, where some work is done at each stage.


The work is not finished until it has passed through all stages.

With pipelining, the computer architecture allows the next


instructions to be fetched while the processor is performing
arithmetic operations, holding them in a buffer close to the
processor until each instruction operation can performed.
Linear pipeline processor

Linear pipeline processor is a term used for a


processing technique where multiple
processors are cascaded linearly.

Each processor in the later stage of the


cascade uses the output from the processor
in the previous stage.
A linear pipeline processor consists of a number of processing
elements, which can be represented by the letter "N."

These N processing elements are cascaded in such a manner that


the processor in the current stage uses the results produced by
the previous stage.

A task is completed when each processor has performed its


function.

After the initial delay for completing the first task, other tasks
can be completed in time equal to that of the processor that
takes the maximum time to complete its portion of the task.
Most modern processors use some type of linear synchronous
pipeline with added features such as data forwarding and
branch prediction.

A linear pipelined processor is a cascade of processing stages


that are linearly connected to perform a fixed function over a
stream of data flowing from one end to the other.

The intent is to be able to introduce a new instruction into the


pipeline at every clock cycle so that no stage in the pipeline is
every left idle.

If this is accomplished then the pipeline is considered full.

As stated previously, linear pipelined processors are constructed


with k processing stages.
Synchronous Pipeline Processor

A synchronous pipeline processor operates on a global clock.


On each clock tick, the task proceeds from one stage to another.

In other words, each processor is assumed to take the time


between two clock ticks to complete its operation.

Asynchronous Pipeline Processor

An asynchronous pipeline processor operates on individual


handshakes between adjacent processors in the cascade.

When the processor in stage P of the cascade gets the input from
stage P-1, it sends an acknowledgement, which indicates that it
has accepted the input.
External inputs (operands) are fed into the pipeline at the first
stage Si. The processed results are passed from stage Si to
stage Si+1, for all i=1,2,,k-1.

The final result emerges at the last stage, Sk. Each result is
passed to the next stage based upon the clock cycle of the
pipeline. Ideally, we expect the clock pulses to arrive at all the
stages at the same time.

However, due to a problem known as clock skewing the same


clock may arrive at different stages with a time offset.
To avoid this the clock cycle of the pipeline must be the
combined maximum of the execution time of the longest
stage of the pipeline and its clock skewed offset.

Linear pipeline processor is a series of processing stages


which are arranged linearly to perform a specific function
over a data stream. The basic usages of linear pipeline is
instruction execution, arithmetic computation and memory
access.
A non-linear pipeline (also called dynamic pipeline) can be
configured to perform various functions at different times.
In a dynamic pipeline there is also feed forward or feedback
connection.

The block diagram of a five stage pipeline.

Вам также может понравиться