Solving Op Amp Stability Issues

Part 1

(For Voltage Feedback Op Amps)

Tim Green & Collin Wells
Precision Analog Linear Applications
1
 Overview
Main Presentation Focus:
1) Op Amp Stability Basics
2) Stability Analysis Method 1 : Loaded Aol & 1/b Technique
A) Riso Compensation Technique for Output Capacitive Loads
3) Stability Analysis Method 2 : Aol & 1/b Technique
A) CF Compensation Technique for Input Capacitance
4) Stability Tricks and Rules of Thumb

Appendix:
1) Additional Useful Tools for your Analog Stability Toolbox
A) Op Amp Output Impedance
B) Pole and Zero: Magnitude and Phase on Bode Plots
C) Dual Feedback Paths and 1/b
D) Non-Loop Stability Problems
2) Nine different ways to stabilize op amps with capacitive loads
A) Definition by example using TINA-TI simulations
2
 The Culprits
Output Capacitive Loads!
Reference Buffers! Cable/Shield Drive! MOSFET Gate Drive!
Rg 1k Rf 20k Q1
VReg

+
OPA
- Vin OPA
U1 REF5025 - C_Cable 10n
ADC_VREF Shielded Cable Vout
R1 20k
VIN 5
Vin Vout + +
Cin 1u RL 250 OPA RL 200
Tem p C3 10u C4 100n Vin 10 -
C1 1u VREF
GND Trim + R2 20k
OPA
C2 1u VREF 2.5 -
VRef 2.5
+

Input Capacitance and Large Value Resistors

Large Value Resistors or Transient Suppression!
Transimpedance Amplifiers! Low-Power Circuits! V+

R4 499k R3 499k D1
Rg 4.99M Rf 49k
Photodiode Rf 1M
+

Model VG2
Vin TVS D2

+
IOP2
Rd 4.99G Cd 10p OPA
OPA -
- -
Cin 25p Vout Vout
Id Vo Cd 200p
+ + +

3
 Just Plain Trouble!
Inverting Input Filter?? Oscillator
10.00m

Rg 10k Rf 100k VG1

0.00
62.12m
+

Vfb
Vin Cin 1u OPA
- -37.08m
Vout 1.16

+ Vo

-1.00
1.95m 2.23m 2.50m
Time (s)

Output Filter?? Oscillator

10.00m

VG1

0.00
62.12m
OPA
R1 10k - Vfb
V1 5 Vout
-37.08m
+ 1.16

C1 10u C5 100n
R2 49k Vo

-1.00
1.95m 2.23m 2.50m
Time (s)

4
 But it worked fine
in the lab! Vcc

2
4
-
R1 49kOhm 1 VOUT
Transient on: 3 +
+2.5V
+
+Input or Input U1 OPA333

5
VIN
Vcc or Vee +2.5V
Vcc
CLoad 1uF
Vcc 5V
Output C1
R2 49kOhm
100nF

3.0 But Im only

using it at DC!
Check ALL Op
2.5
Amp Circuits for
VOUT Stability
regardless of
2.0
their closed loop
signal frequency
of operation!
5
1.5
0 500u 1m 2m 2m
Time (s)
Recognize Amplifier Stability Issues on the Bench
Required Tools:
Oscilloscope
Signal Generator

Other Useful Tools:

Gain / Phase Analyzer
Network / Spectrum Analyzer

6
 Recognize Amplifier Stability Issues
Oscilloscope - Transient Domain Analysis:
Oscillations or Ringing 18.53m

Overshoots
Unstable DC Voltages

Voltage (V)
High Distortion

0.00
1.75m 2.25m 2.75m
Time (s)

21.88m
15.00

Voltage (V)
Output

0.00

-14.83
0.00
1.75m 50.88m 100.00m
Time (s) 1.75m 2.25m 2.75m
Time (s)
7
Recognize Amplifier Stability Issues
Gain / Phase Analyzer - Frequency Domain:
- Peaking, Unexpected Gains, Rapid Phase Shifts
40.00

20.00
Gain (dB)

0.00

-20.00

-40.00

-60.00
0.00
Phase [deg]

-180.00

-360.00
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
Frequency (Hz)

8
Quick Op-Amp Theory
Bode Plot Review
Basic Stability Tools

9
 Poles and Bode Plots A = VOUT/VIN
G fP R
100 VOUT
0.707G = -3dB X100,000
Actual Straight-Line Approximation
Function
80
-20dB/Decade
VIN
-6dB/Octave C

60
A (dB)

1
fp
40
2RC

20 Single Pole Circuit Equivalent

Pole Location = fP
0

1 10 100 1k 10k 100k 1M 10M

Frequency (Hz)
Magnitude = -20dB/Decade Slope
+90

Slope begins at fP and continues down

+45 as frequency increases
(degrees)

0o
Actual Function = -3dB down @ fP
Frequency
0
(Hz)
10 100 1k 10k 100k 1M 10M
Phase = -45/Decade Slope through fP
+-45
-45o/Decade Decade Above fP Phase = -90 (-84.3)
-45o @ fP
-90
Decade Below fP Phase = 0 (-5.7)
-90o
10
 Zeros and Bode Plots A = VOUT/VIN
VOUT
fp L
100
159H

80 VIN
Rs x R
1Vp 100k 100k
60 +20dB/Decade
A (dB)

+6dB/Octave
1
fz
40
L
1.414G = +3dB Straight-Line Approximation Single Zero Circuit Equivalent 2 *
(1/0.707)G = +3dB Actual R
Function
20
G

1 10 100 1k 10k 100k 1M o 10M Zero Location = fZ

+90
Frequency (Hz)
+90
fZ
Magnitude = +20dB/Decade Slope

+45o/Decade
Slope begins at fZ and continues up as
+45 frequency increases
(degrees)

0o +45o @ fZ
Frequency
Actual Function = +3dB up @ fZ
0
(Hz)
10 100 1k 10k 100k 1M 10M Phase = +45/Decade Slope through fZ
+-45
Decade Above fZ Phase = +90 (+84.3)

-90
Decade Below fZ Phase = 0 (5.7)
11
Capacitor - Intuitive Model

DC XC DC < XC < Hi-f Hi-f XC

OPEN SHORT

frequency
controlled
resistor
XC = 1/(2fC)

12
Inductor - Intuitive Model

DC XL DC < XL < Hi-f Hi-f XL

SHORT OPEN

frequency
controlled
resistor
XL = 2fL

13
Capacitor and Inductor - Impedance vs Frequency
10M
Low frequency= High frequency=
High Impedance Capacitor and Inductor High Impedance
1M Impedance vs Frequency

100k
Impedance (ohms)

10k Capacitor Impedance

C = 159nF Inductor Impedance
L = 159mH
1k

100

10

1 Low frequency= High frequency=

Low Impedance Low Impedance
100m
100m 1 10 100 1k 10k 100k 1M 10M
Frequency (Hz)
14
Op Amp - Intuitive Model

IN+ Vo
x1 Ro
K(f) Vout
Rin +
Vdiff
IN- -

15
 Op-Amp Loop Gain Model
bnetwork
RF
bnetwork b=VFB/VOUT

VOUT
VFB
RI
-
Aol VOUT
+ RF

+ VFB
VIN
- RI

b
VOUT/VIN = Acl = Aol/(1+Aol)
If Aol >> 1 then Acl 1/

-
Aol: Open Loop Gain
VIN +
: Feedback Factor
Aol VOUT
Acl: Closed Loop Gain 16
b and 1/b

bnetwork
RF
bnetwork b=VFB/VOUT

VOUT
VFB
RI
-
VOUT
+ RF

+ VFB
VIN
- RI

is easy to calculate as feedback network around the Op Amp

1/ is reciprocal of
Easy Rules-Of-Thumb and Tricks to Plot 1/ on Op Amp Aol Curve
Plotting Aol Curve and 1/ Curve shows Loop Gain 17
Amplifier Stability Criteria
VOUT/VIN = Aol / (1+ Aol)
If: Aol = -1
Then: VOUT/VIN = Aol / 0

If VOUT/VIN = Unbounded Gain

Any small changes in VIN will result in large changes in VOUT which will feed
back to VIN and result in even larger changes in VOUT OSCILLATIONS
INSTABILITY !!

Aol: Loop Gain

Aol = -1 Phase shift of +180, Magnitude of 1 (0dB)
fcl: frequency where Aol = 1 (0dB)

Stability Criteria:
At fcl, where Aol = 1 (0dB), Phase Shift < +180
Desired Phase Margin (distance from +180 Phase Shift) > 45

18
 Traditional Loop Gain Test

b
Op Amp Loop Gain Model
Op Amp is Closed Loop
-

VIN +
Aol VOUT

Loop Gain Test:

b
+ (An Open Loop Test)
VTest
- Break the Closed Loop at b
-
Ground VIN
VIN +
Aol VOUT
Inject AC Source, VTest, into b
Aol = VOUT
19
 Traditional Loop Gain Test Short for AC
Open for DC

RF
bnetwork
RF bnetwork 1TF

VFB VFB +
RI RI 1TH VTest
- -
VOUT -
Aol VOUT Aol
+ +
+ +
VIN VIN
- Open for AC
-
Short for DC

Op Amp Loop Gain Model SPICE Loop Gain Test:

Op Amp is Closed Loop Op Amp Loop Gain Test is an Open Loop Test

VOUT/VIN = Aol / (1+Aolb) SPICE finds a DC Operating Point before it does an AC

Analysis so loop must be closed for DC and open
for AC.
Break the Closed Loop at VOUT
Ground VIN source impedance low for AC analysis
Inject: AC Source, VTest, into RF
(Inject: AC Source into High Impedance Node)
Read: Aol = Loop Gain = VOUT
(Read: Loop Gain from Low Impedance Node)
20
SPICE Loop Gain TestVF1 -279.24uV
DC Analysis DC Analysis
VFB -25.38uV RF 10kOhm
CT 100nF

+
V2 2.5V VG1
LT 1TH

RI 1kOhm 4
- 2 VOUT -279.24uV
DC Analysis
3 + 1
+
5
V1 2.5V Loop Gain (Aol ) = VOUT
U1 OPA2376
= VFB
1/ = 1 / VFB
Aol = VOUT / VFB
VFB RF 10kOhm CT Open RF 10kOhm
VFB
CT Short
+

+
V2 2.5V VG1 V2 2.5V VG1
LT Short
LT Open
RI 1kOhm 4 RI 1kOhm 4
- 2 VOUT - 2 VOUT
3 + 1 3 +
+ + 1
5 5
V1 2.5V V1 2.5V
U1 OPA2376 U1 OPA2376
DC Equivalent Circuit AC Equivalent Circuit
21
 Loop Gain (Aolb) from Aol and 1/b

Open Loop Response

Aol
Plot (dB) 1/ on Op Amp Aol (dB)
100
Aol = Aol(dB) 1/(dB)

80
Aol = Aol / (1/) = Aol
Note how Aol changes with frequency
60 Aol b
(Loop Gain)
Aol (dB)

40
Closed Loop Response
fcl b Acl

20

1 10 100 1k 10k 100k 1M 10M

Frequency (Hz) 22
 Rate-of-Closure Stability Criteria using 1/ & Aol
Aol
At fcl: Loop Gain (Aolb) = 1 (0dB)
100
Rate-of-Closure @ fcl =
(Aol slope 1/ slope)
*20dB/decade Rate-of-Closure @ fcl =
80 fcl1
STABLE
**40dB/decade Rate-of-Closure @ fcl =
b
** UNSTABLE
fcl2
60
b *
Aol (dB)

40

b
* fcl3
20
fcl4

0
b **
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) 23
 Aol 1/b Loop Gain
Loop Gain (Aolb) Example fp1
fp2
pole
pole
-----
-----
pole
pole
fz1 ----- zero pole

0.15 F 10k
fp1
100 Aol
Cin RF
1k
-
80 VOUT
RI
+

b +
60 Aol b VIN
A (dB)

fcl
-

40 STABLE
Rate-of-Closure @ fcl = 40dB/decade
UNSTABLE!
20
fz1
fp2

1 10 100 1k 10k 100k 1M 10M

Frequency (Hz) 24

Example 1: Note locations of poles and zeros in Aol & 1/b

 Loop Gain (Aol) Plot from Aol & 1/ Plot
Aol 1/b Loop Gain Loop Gain (Aolb) Phase at fcl:
100 fp1 pole ----- pole
fp2 pole ----- pole
180
Phase Shift = -180
fp1 fz1 ----- zero pole
80
135
fp1
Phase Margin = 0

(degrees)
60 Frequency
A (dB)

90
(Hz)
fz1 10 100 1k 10k 100k 1M 10M
40
45 fz1
fcl
STABLE
20
0
fcl

0
STABLE fp2
1 10 100 1k 10k 100k 1M 10M -45
Frequency (Hz)

To Plot Aol from Aol & 1/ Plot:

Poles in Aol curve are Poles in Aol (Loop Gain)Plot
Zeros in Aol curve are Zeros in Aol (Loop Gain) Plot
fp2

Poles in 1/ curve are Zeros in Aol (Loop Gain) Plot

Zeros in 1/ curve are Poles in Aol ( Loop Gain) Plot
[Remember: is the reciprocal of 1/]
25

Example 1: Note locations of poles and zeros in Loop Gain

 1/ Always = Closed Loop Response
VOUT/VIN = Aol/(1+Aol)
At fcl: Aol = 1 VOUT/VIN = Aol/(1+1) ~ Aol
No Loop Gain left to correct for errors
VOUT/VIN follows the Aol curve at f > fcl
Aol
100 RF
100k

RI
80 10k
-
VOUT
+ +
fcl VIN Rn
60 - 1k
A (dB)

b VNOISE
Cn
16nF
40
VOUT/VIN Note:

20 1/ is the AC, Small Signal,

SSBW Closed Loop, Noise Gain
(Small Signal BandWidth)
for the Op Amp.
0

1 10 100 1k 10k 100k 1M 10M

VOUT/VIN is often NOT the
Frequency (Hz)
same as 1/.
26
How to Modify 1/ for Stable Circuits

ZI ZF
INPUT Network FEEDBACK Network

Rn Cn Cp Rp

RI RF

-
VOUT
+

+
VIN
-

27
 Cp Rp
1/ First Order Analysis for ZF
1.59nF 10k
RI RF

1k 100k

-
VOUT
+

+
1/ Low Frequency = RF/RI = 100 40dB VIN
-
Cp = Open at Low Frequency
1/ High Frequency = (Rp//RF)/RI Rp/RI = 10 20dB
Cp = Short at High Frequency
Pole in 1/ when Magnitude of XCp = RF ZF Exact equations :
Magnitude XCp = 1/(2fCp) 1
fp
fp = 1/(2RFCp) = 1kHz 2 Cp (RF Rp)
Zero in 1/ when Magnitude of XCp = Rp 1
fz
2 Cp [Rp (RI // RF)]
fz = 1/(2RpCp) = 10kHz 28
 Cp Rp

TINA SPICE: 1/ for ZF 10k

1.59nF
RI RF
140
1k 100k

120 Aol
-
VOUT
+
100 +
VIN
-
80
Gain (dB)

60
1/ fp
40 fz
Lo f
Hi f
20
1st Order Actual
Lo f 40dB 40.086dB 1st Order Actual
0 Hi f 20dB 20.079dB fp 1kHz 917.020Hz
fz 10kHz 9.038kHz

-20 ZF Network (fp and fz)

Aol and 1/
-40
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) 29
 1/ First Order Analysis forCn ZI
Rn

1k 15.9nF
RI RF

10k 100k

-
VOUT
+

+
1/ Low Frequency = RF/RI = 10 20dB VIN
-
Cn = Open at Low Frequency
1/ High Frequency = RF/(RI//Rn) RF/Rn =100 40dB
Cn = Short at High Frequency
Zero in 1/ when Magnitude of XCn = RI
ZI Exact equations :
Magnitude XCn = 1/(2fCn) 1
fp
fz = 1/(2RICn) = 1kHz 2RnCn
1
Pole in 1/ when Magnitude of XCn = Rn fz
2Cn [Rn (RI // RF)]
fp = 1/(2RnCn) = 10kHz 30
 Rn Cn

TINA SPICE: 1/ for ZI 1k 15.9nF

RI RF

140 10k 100k

Aol -
120 VOUT
+

+
100 VIN
-

80
Gain (dB)

60
fp
Hi f
40
1/
Lo f
20
1st Order Actual fz
Lo f 20dB 20.828dB 1st Order Actual
0 fz 1kHz 999.496Hz
Hi f 40dB 40.906dB
fp 10kHz 9.935kHz
-20 ZI Network (fp and fz)
Aol and 1/
-40
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) 31
 Stability Analysis - Method 1
(Loaded Aol & 1/b Technique)

(Riso Compensation)
 Capacitive Loading on Op Amp Outputs
Unity Gain Buffer Circuits Circuits with Gain
R3 4.99k R2 100k

V- V-
Will this circuit behavior
-
get you a raise in pay? -
Vo Vo
+
+ +
+

+
U1 OPA627E

+
CLoad 1uF U1 OPA627E CLoad 1u
Vin Vin
V+ V+

80m
80.00m 40m
40.00m

50.00m

Vo (V) 20m
VF1 20.00m Vo (V)V1 20.00m
20m

-10.00m

-40m
-40.00m 0
0.00
20m
20.00m 1.00m
1m

Vin (V)
VG1
10m Vin (V)
VG1

0
0.00 0.00
0
00.00 150.00u
150u 300.00u
300u 0.00
0 150.00u
150u 300.00u
300u
Time (s) Time (s) 33
Time (seconds) Time (seconds)
 VFB 353.900776nV

Loaded Aol V+
CT 1TF LT 1TH

+
Vtest
140 V+ 15V V-
Loaded Aol due to CLoad
-
-20dB/decade VOUT 353.900776nV
120 Loaded Aol = VOUT / VFB +
+
V- 15V U1 OPA627E
For AC Test VFB = Vtest CLoad 1uF
V+
100 fp1 Loaded Aol = VOUT
V-
Aol Pole
Low Frequency
80

60 fp2
Loaded Aol
Gain (dB)

-40dB/decade
40 Additional Pole

1/ Rate-of-Closure
20 40dB/decade

-20
STABLE fcl
-40

-60

-80
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) 34
 Loaded Aol Model
CT 1T LT 1T
V+
Ro 54

+
Vtest
V+ 15 VFB V-
Aol Loaded Aol
-

VOUT
+
V- 15
+
U1 OPA627E
CLoad 1u
CLoad 1u
V+
V-
Loaded Aol = VOUT / VFB
For AC Test VFB = Vtest
Loaded Aol = VOUT

LT Open

- -
CT Short
Ro 54
+ +
Loaded Aol
+

Aol 1M
Vtest
CLoad 1u

35
 Loaded Aol Model
fp2
0
0.00

Ro 54
-20
-20.00
+

Loaded Aol

GainGain(dB)
Aol

(dB)
-40
-40.00 Loaded AOL
CLoad 1u Pole
-60
-60.00

-80
-80.00

Loaded Aol Pole Equation 0

0.00
(degrees)

1
fp 2
2 Ro CLoad
Phase [deg]

-45
-45.00
Phase

-90
-90.00
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
1 10 100 1k 10k 100k
Frequency (Hz) 1M 10M 100M
Frequency (Hz)

36
 Loaded Aol Model
fp2
120
120.00 0
0.00

100
100.00

80
80.00
fp1 Aol -20
-20.00

Aol Load
60
GainGain(dB)

60.00

GainGain(dB)
(dB)

(dB)
40
40.00 -40
-40.00

20
20.00

0
0.00 -60
-60.00

-20
-20.00

-40 -80
-80.00

+
-40.00

180
180.00
0
0.00
(degrees)

PhasePhase(degrees)
135
135.00

[deg]
Phase [deg]

90
90.00 -45
-45.00
Phase

45
45.00

0 1.00
0.00 -90
-90.00
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
1 10.00
10 100.00
100 1.00k
1k 10.00k
10k 100.00k
100k
Frequency (Hz)
1.00M
1M 10.00M
10M 100.00M
100M 1 10 100 1k 10k 100k
Frequency (Hz) 1M 10M 100M
Frequency (Hz) Frequency (Hz)

120
120

100
100

80
80
fp1 Loaded Aol
60
(dB)

60
(V)

fp2
GainVoltage

40
40

2020

=
00
-20
-20

-40
-40

180
180.00
(degrees)

135
135.00
(V)
PhaseVoltage

90
90.00

45
45.00

0
0.00
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
1 10 100 1k 10k 100k
Frequency (Hz) 1M 10M 100M
37
Frequency (Hz)

Note: Addition on Bode Plots = Linear Multiplication

 VFB

Loaded Aol
CT 1TF LT 1TH
V+

+
Loop Gain & Phase V+ 15V
Vtest
V-

VOUT
+
Loop Gain (Aol ) = VOUT +
V- 15V U1 OPA627E CLoad 1uF
V+
V-

STABLE
Phase Margin at fcl

38
Riso Compensation

Riso will add a zero in the Loaded Aol Curve

V+

V-
V+ 15V
- Riso 6Ohm
U1 OPA627E VOUT
+
+

VIN + CLoad 1uF

V- 15V V+
VOA

V-

39
 Riso Compensation V+
CT 1TF LT 1TH

+
Results V+ 15V
Vtest
V-

- Riso 6Ohm
140 U1 OPA627E VOUT
Loaded Aol with Riso Compensation +
+
-20dB/decade
120 V- 15V V+
CLoad 1uF

Loaded Aol = VOA VOA

100 fp1 V-
Aol Pole fz1
80 Low Frequency -40dB/decade Loaded Aol
Riso Compensation
60 fp2 Additional Zero
Loaded Aol
Gain (dB)

40 Additional Pole -20dB/decade

1/
20 Rate-of-Closure
20dB/decade
0

-20 STABLE fcl

-40

-60

-80
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) 40
 Riso Compensation Theory
V+

VOA
V+ 15 V-
LT 1T
-
Riso 6
VOUT
CT 1T +
Ro 54
+
V- 15 U1 OPA627E CLoad 1u

+
+

V+
Vtest Aol Loaded Aol
V-

Riso 6

LT Open CLoad 1u

Loaded Aol
- -
CT Short
Ro 54 Riso 6
+ + VOUT
+

Aol 1M
Vtest
CLoad 1u

41
 Riso Compensation Theory
0
0.00

Ro 54 fp2
fz1

GainGain(dB)
+

(dB)
Aol Loaded Aol -20
-20.00

Riso 6

-40
-40.00

CLoad 1u 0
0.00

Transfer Function Phase (degrees)

Phase [deg]
-45
-45.00

1 CLoad Riso s
Loaded Aol (s)
1 (Ro Riso) CLoad s
-90
-90.00

Pole : 1.00
1 10.00
10 100.00
100 1.00k
1k 10.00k
10k 100.00k
100k
Frequency (Hz)
1.00M
1M 10.00M
10M 100.00M
100M
Frequency (Hz)
1
fp2
2(Ro Riso) CLoad

Zero :
1
fz1
2 Riso CLoad 42
 Riso Compensation Theory
120
120.00 0
0.00

100
100.00

80 fp1 Aol
80.00

60
fp2 fz1
GainGain(dB)

60.00

GainGain(dB)
(dB)

(dB)
40
40.00 -20
-20.00

20
20.00

0
0.00

-20
-20.00
Aol Load
-40
-40.00 -40
-40.00

180
180.00
0
0.00

+
(degrees)

(degrees)
135
135.00
Phase [deg]

Phase [deg]
90
90.00
-45
-45.00
Phase

Phase
45
45.00

0 1.00
0.00
10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
-90
-90.00
1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
1 10 100 1k 10k 100k
Frequency (Hz)
1M 10M 100M 1 10 100 1k 10k
Frequency (Hz) 100k 1M 10M 100M
Frequency (Hz) Frequency (Hz)

120
120.00

100
100.00
fp1 Loaded Aol
80
80.00

60
60.00
fz1
GainGain(dB)

fp2
(dB)

40
40.00

20
20.00

0
0.00

=
-20
-20.00

-40
-40.00

180.00
180
PhasePhase(degrees)

135.00
135
[deg]

90.00
90

45.00
45

0.00
0 1.00 10.00 100.00 1.00k 10.00k 100.00k 1.00M 10.00M 100.00M
1 10 100 1k 10k
Frequency (Hz) 100k 1M 10M 100M
Frequency (Hz) 43

Note: Addition on Bode Plots = Linear Multiplication

Riso Compensation Design Steps
1) Determine fp2 in Loaded Aol due to CLoad
A) Measure in SPICE with CLoad on Op Amp Output
2) Plot fp2 on original Aol to create new Loaded Aol
3) Add Desired fz2 on to Loaded Aol Plot for Riso Compensation
A) Keep fz1 < 10*fp2 (Case A)
B) Or keep the Loaded Aol Magnitude at fz1 > 0dB (Case B)
(fz1>10dB will allow for Aol variation of Decade in Unity Gain Bandwidth)
4) Compute value for Riso based on plotted fz1
5) SPICE simulation with Riso for Loop Gain (Aolb) Magnitude and Phase
6) Adjust Riso Compensation if greater Loop Gain (Aolb) phase margin desired
7) Check closed loop AC response for VOUT/VIN
A) Look for peaking which indicates marginal stability
B) Check if closed AC response is acceptable for end application
8) Check Transient response for VOUT/VIN
A) Overshoot and ringing in the time domain indicates marginal stability
B) Determine if settling time is acceptable for end application
44
 CT 1TF LT 1TH
V+

1),2) Loaded Aol and fp2

+
V-
Vtest
V+ 15V
- Riso 0Ohm
U1 OPA627E VOUT
+
+
CLoad 2.9nF
V- 15V V+ VOA
Loaded Aol = VOA

V-

45

Case A, CLoad=1uF, fp2=2.98kHz

Case B, CLoad=2.9nF, fp2=983.37kHz
 3) Add fz1 on Loaded Aol
140

120

100 Loaded Aol

2.98kHz
Add Riso Compensation
80

60 fp2
fp2
Voltage (V)

Case B
Case A 983.37kHz
40 CLoad=2.9nF
CLoad=1uF

20 fz1
29.8kHz 4.07MHz
Case A
0 CLoad=1uF

fz1
-20 Case B
CLoad=2.9nF
-40

-60

-80
1 10 100 1k 10k 100k 1M 10M
Frequency (Hz)
46
Case A, CLoad=1uF, fz1=29.8kHz
Case B, CLoad=2.9nF, fz1=4.07MHz
4) Compute Value for Riso
Case A, CLoad=1uF, fz1=29.8kHz
Case B, CLoad=2.9nF, fz1=4.07MHz

Zero : Zero, Case A, CLoad 1F, fz1 29.8kHz :

1 1
fz1 fz1
2 Riso CLoad 2 Riso CLoad
1
Riso 1
2 fz1 CLoad Riso 5.34 use 5.36
2 29.8kHz 1F

Zero, Case B, CLoad 2.9nF, fz1 4.07MHz :

1
fz1
2 Riso CLoad
1
Riso 13.48 use 13.7
2 4.07MHz 2.9nF

47
 CT 1TF LT 1TH

5),6) Loop Gain, Case A V+

+
V-
Vtest
V+ 15V
- Riso 5.36Ohm
U1 OPA627E VOUT
+
+
CLoad 1uF
V- 15V V+ VOA
Loop Gain (Aol ) = VOA
V-

Phase Margin at fcl = 87.5 degrees

48
 CT 1TF LT 1TH

5),6) Loop Gain, Case B V+

+
V-
Vtest
V+ 15V
- Riso 13.7Ohm
U1 OPA627E VOUT
+
+
CLoad 2.9nF
V- 15V V+ VOA
Loop Gain (Aol ) = VOA
V-

Phase Margin at fcl = 54 degrees

49
 V+

7) AC VOUT/VIN, Case A V+ 15V

V-

- Riso 5.36Ohm
U1 OPA627E VOUT
+
+

+
CLoad 1uF
V- 15V V+ VOA
VIN

V-
20
VOA
-3dB=1.58MHz
0
VOUT/VIN
Riso Compensation VOUT
Gain (dB)

-20
Case A, CLoad=1uF -3dB=30.44kHz

-40

-60

-80

-45
Phase [deg]

-90

-135

-180
1 10 100 1k 10k 100k 1M 10M
50
Frequency (Hz)
 V+

8) Transient Analysis, Case A V-

V+ 15V
- Riso 5.36Ohm
U1 OPA627E VOUT
+
+
10.00m

+
CLoad 1uF
VOUT / VIN V- 15V V+ VOA
VIN
Transient Analysis
VIN Case A, CLoad=1uF V-

-10.00m
10.27m

VOA

-10.27m
10.01m

VOUT

-10.01m
0 500u 1m 2m 2m
Time (s) 51
Riso Compensation: Key Design Consideration
Accuracy of VOUT depends on Load Current
V+
Light Load Current
VOA 5V
V-
ILoad 4.970179mA
V+ 15V - Riso 6Ohm
+
A VOUT 4.970179V
+
+
U1 OPA627E CLoad 1uF
VIN 5V
V+ RLoad 1kOhm
V2 15V

V-

V+
V-
VOA 5V Heavy Load Current
ILoad 24.271845mA
- Riso 6Ohm
V+ 15V +
+
A VOUT 4.854369V
+
U1 OPA627E CLoad 1uF
VIN 5V RLoad 200Ohm
V+
V2 15V

V-

52