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Control unit
coordinates the activities taking place in the CPU, memory and peripherals
System clock
generates clock pulses to step the control unit through its operation
Also
Registers
special storage locations to hold information temporarily
CPU Registers
R2
R3
Program Status Register
Counter (SR) R4
(PC)
R5
External bus
Main Memory
CPU Registers
Contd.
CPU Registers Contd.
No No
Depends on:
Clock speed
Word size
Bus size
- Data bus
- Address bus
Control bus
Architecture