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Electronic Devices & Circuits

(Unit – II / Transistors & FET)

Prepared By
Dr. K. Umapathy

1
Unit – II / Syllabus
• Transistors & FET
• Transistor Operation – Current Components- CB, CE
& CC Configuration and Characteristics – Early Effect
– Eber Molls model of Transistor – h parameters of
CE, CB & CC Configurations – Construction &
Characteristics of JFET – Relation between Pinch-off
Voltage & Drain current – JFET as voltage variable
resistor – MOSFET – Depletion & Enhancement
types.

2
Introduction to Transistors

3
Introduction
• Developed by Dr. Shockley along with Bell Labs in 1951.
• Main building block for modern electronic systems.
• A three terminal device whose output current, voltage,
power controlled by input current.
• Widely used as primary component for amplifier in
Communication systems.
• Used as switching device in Digital electronics.
• Important property of increasing the strength of a weak
signal called amplification.
• Consists of two PN junctions.

4
Construction of Transistor
• Three terminals of a transistor – Emitter, Base &
Collector.
• Emitter – supplies the charge carriers – heavily doped.
• Base – middle region for both PN junctions – lightly
doped.
• Collector – collects the charge carriers – moderately
doped.

5
Transistor Packages

6
Transistor Symbols

7
Modes of Transistor Operation

8
Modes of Transistor Operation (contd)

9
Transistor Configurations

10
Characteristics of Transistors in different configurations

11
Unbiased Transistor
• A transistor with three terminals emitter, base &
collector left open – unbiased transistor or open-
circuited transistor.
• Under these conditions – diffusion of free electrons
across the PN junctions – produce two depletion layers
as shown in below figure.
• The barrier potential for these depletion layers at 25 C
is 0.7V and 0.3V for silicon & germanium transistors
respectively.
• Since these regions have different doping levels, the
width of depletion layers do not remain the same.
• The width of emitter-base depletion layer is smaller
12
Unbiased Transistor (contd)
• When compared to that of collector-base depletion
layer.
• Penetration of depletion layers will be more into base
region and less into emitter & collector regions due to
the difference in doping levels.
• An unbiased transistor is never used in practice.

13
Topic 1

Transistor Operation

14
Fig1 - Operation of NPN in CB

15
Emitter & Base Currents
• Figure 1 shows the NPN transistor in active mode – in
Common base configuration.
• The emitter-base junction is forward biased & the
collector-base junction is reverse biased.
• The forward bias on the emitter-base junction causes
the free electrons in the N type emitter region to move
towards the base region which constitutes the emitter
current IE.
• Some of the free electrons recombine with the holes in
the base region – forms the base current IB.
• But most of the free electrons from emitter move
towards the collector region as the base width is very
small – less chance for recombination in base region. 16
Collector Current
• This forms the collector current IC.
• Also called injected current – this current injected from
the emitter into the collector region.
• Another component of collector current due to
thermally generated carriers called reverse saturation
current which is quite small.

17
Fig 2 - Leakage Current of PNP in CB

18
Leakage Current of PNP in CB
• (a) When the switch closed  majority carriers holes
move from emitter towards the collector region through
the base.
• The emitter junction & collector junctions are forward
biased & reverse biased respectively.
• Some holes recombine with electrons in the base –
forming the base current IB.
• Most of the holes move towards the collector – forming
the collector current IC.
• The emitter current – sum of base current & collector
current.

19
Leakage Current of PNP in CB (contd)
• (b) When the switch opened - disconnects the emitter
from the base & the emitter junction is open circuited.
• Hence no emitter current, no base current or collector
current.
• Normally the collector junction is reverse biased due to
the holes injected from the emitter.]
• But now, this collector junction is forward biased due to
thermally generated minority carriers – electrons from P
type collector & holes from N type base.
• This minority carriers diffuse across the collector base
junction – produce a current called reverse saturation
current or collector cut-off current or leakage current
from collector to base with emitter open ICO 20
Leakage Current of PNP in CB (contd)
• Hence the total collector current given by-
• IC = αIE + ICO
• α = (IC – ICO)/ IE
• Substuiting IE = IB + IC in the above equation –

21
Topic 2

Current Components in BJT


(a) Current gain of BJT in CB
CB dc Current gain
• Consider the transistor in CB Configuration shown in
figure 1
• Here emitter current is the input current & Collector
current is the output current
• Ratio of output current to input current – current gain
of transistor.
• Since both currents either alternating or direct current
– two types of current gains – dc current gain and ac
current gain.
• CB dc current gain – α = IC / IE
• Since collector current always less than emitter current
– current gain less than unity.
• IC = α IE; IE = IB + IE; IB = IE – IC = IE - α IE = (1-α) IE
CB ac current gain
• Ratio of small changes in collector current to
small changes in emitter current for a constant
collector-base voltage.
• Given by – α0 = ΔIC / ΔIE
• Also called CB short circuit current gain or small
signal current gain.
(b) Current gain of BJT in CE
CE dc Current gain
• Consider the transistor in CE Configuration shown in
figure 2
• Here base current is the input current & Collector
current is the output current
• Ratio of output current to input current – current gain of
transistor.
• Since both currents either alternating or direct current –
two types of current gains – dc current gain and ac
current gain.
• CE dc current gain – β = IC / IB
• Since collector current always much higher than base
current – current gain greater than unity.
• IC = β IB; Typical Value of β ranges between 20 and 250.
CE ac current gain
• Ratio of small changes in collector current to
small changes in base current for a constant
collector-emitter voltage.
• Given by – β0 = ΔIC / ΔIB
• Also called CE short circuit current gain or small
signal current gain.
(c) Current Gain of BJT in CC
CC current gain
• NPN transistor connected in CC configuration as
shown in Figure 3.
• Emitter-Base junction forward biased and Collector-
base junction reverse biased.
• The collector is not at dc ground but at ac ground
since voltage of dc supply has zero resistance to ac
signal.
• Output is taken across the emitter.
• Here input current is base current and the output is
emitter current.
• CC current gain given by – IE/IB = IE /IC * IC/IB
• Γ = (1/ α )* β
• Substuiting α = β / (1+ β) in above -- 1+ β
Relation between α and β
• Emitter current – sum of collector current and
base current.
• IE = IB + IC ; Dividing by IC on both sides –
• IE / IC = (IB / IC) + 1
• Since IC / IE = α and IC/IB = β;
• 1 / α = (1 / β) + 1 = (1+ β) / β
• Therefore α = β / (1+ β)
• α (1+ β) = β
• α = β (1-α) ; β = α / (1-α)
Topic 3

Characteristics of BJT in CB
Configuration

32
Figure 1 Circuit Arrangement for CB

33
Figure 2 Input Characteristics of CB

34
Input Characteristics - CB
• Relation between Emitter current (IE) & Emitter-base
voltage (VEB) for a constant Collector-base voltage
(VCB).
• Also known as Base curves of a transistor.
• For different fixed values of VCB, the Emitter-base
voltage is varied & corresponding Emitter current
values are noted and a graph plotted as shown in
Figure 2.
• The emitter current is negligibly small below the cut-
in voltage.
• This value of cut-in voltage is 0.5 V and 0.1 V for Si
and Ge Transistors. 35
Input Characteristics - CB (contd)
• Beyond cut-in voltage, the emitter current increase
rapidly for a small increase in Emitter-base voltage -
 Input resistance very small.
• The base curves shift upwards leading to a
phenomenon called Base width modulation or Early
effect.
• AC input resistance calculated using the base
curves of the transistor given by –
• Ri = ΔVEB / ΔIE for a constant VCB
• Typical Value is 50 Ohms.

36
Figure 3 - Output Characteristics - CB

37
Output Characteristics – CB
• Relation between Collector current (IC) & Collector-base
voltage (VCB) for a constant Emitter Current (IE).
• Also known as Collector curves of a transistor.
• For different fixed values of IE, the Collector-base voltage
is varied & corresponding values of Collector current are
noted and a graph plotted as shown in Figure 3.
• Curves divided into three regions – Saturation region,
Active region & Cut-off region.
• Saturation region – to left of vertical dashed line – a
small change in VCB results in large value of current.
• Active region – the collector current constant and equal
to the emitter current.

38
Output Characteristics – CB (contd)
• Cut-off region – corresponds to the curve IE = 0 since both
junctions reverse biased.
• Collector current flows even if VCB =0 due to injection
of electrons into the base under forward biased
Emitter-base junction.
• Small amount of current flows even if emitter current is
zero called Collector leakage current.
• Collector current independent of Collector-base
voltage in the active region.
• Curves used to determine two parameters – one
Output Resistance and other small signal common base
current gain given by –
• Ro = Δ VCB / Δ IC; Typical Value is 50 K;
• αo = Δ IC / Δ IE; Typical Value is Unity.
39
Topic 4

Characteristics of BJT in CE
Configuration

40
Figure 1 – Circuit arrangement for CE

41
Figure 2 Input Characteristics of CE

42
Input Characteristics of CE
• Relation between Base current (IB) & Base-
emitter voltage (VBE) for a constant Collector-
emitter voltage (VCE).
• For different fixed values of VCE, the Base-
emitter voltage is varied & corresponding values
of Base current are noted and a graph plotted as
shown in Figure 2.
• The base current is negligibly small below the
cut-in voltage.
• This value of cut-in voltage is 0.5 V and 0.1 V for
Si and Ge Transistors.
43
Input Characteristics of CE (contd)
• Beyond the Cut-in voltage, the base current
increases wrt Base-emitter voltage for a constant
value of VCE in a linear manner - Input resistance
higher when compared to CB.
• The curves shifting downwards for increasing values
of VCE due to the increase in depletion width of the
base region.
• Used to determine the value of Input resistance -
• Ri = ΔVBE / ΔIB for a constant VCE – Range from 600
ohms to 4000 ohms.

44
Figure 3 Output Characteristics of CE

45
Output Characteristics of CE
• Relation between Collector current (IC) & Collector-
emitter voltage (VCE) for a constant Base Current (IB).
• For different fixed values of IB, the Collector-emitter
voltage is varied & corresponding values of Collector
current are noted and a graph plotted as shown in Figure
3.
• Curves divided into three regions – Saturation region,
Active region & Cut-off region.
• Saturation region – if VCE increased above zero, the
collector current increases rapidly depending the value of
base current.
• Active region – if VCE increased further, the collector
current slightly increases thereby reducing the base
current due to early effect.
46
Output Characteristics of CE (contd)
• Cut-off region – corresponds to the curve IB = 0
since both junctions reverse biased.
• Small amount of collector current flows even if
base current zero called Collector leakage
current.
• Curves used to determine two parameters – one
Output Resistance and other small signal
common emitter current gain given by –
• Ro = Δ VCE / Δ IC ; Range from 10 K to 50 K.
• βo = Δ IC / Δ IB; Range from 20 - 250
47
Topic 5

Characteristics of BJT in Common


Collector Configuration

48
Fig 1 – Circuit Arrangement for CC Transistor

49
Input Characteristics - CC
• Relation between Base current (IB) & Base-collector
voltage (VBC) for a constant Emitter-collector voltage
(VEC).
• Also known as Base curves of a transistor.
• For different fixed values of VEC, the Base-collector
voltage (VBC) is varied & corresponding Base current
values (IB) are noted and a graph plotted as shown in
Figure 2.
• The base current is negligibly small below the cut-in
voltage.
• This value of cut-in voltage is 0.5 V and 0.1 V for Si
and Ge Transistors. 50
Fig 2 – Input Characteristics of BJT in CC

51
Fig 3 – Output Characteristics of BJT in CC

52
Output Characteristics – CC
• Relation between Emitter current (IE) & Emitter-Collector
voltage (VEC) for a constant Base Current (IB).
• Also known as Collector curves of a transistor.
• For different fixed values of IB, the Emitter-Collector
voltage is varied & corresponding values of Emitter
current are noted and a graph plotted as shown in Figure
3.
• Curves divided into three regions – Saturation region,
Active region & Cut-off region.
• Saturation region – to left of vertical dashed line – a
small change in VEC results in large value of emitter
current.
• Active region – the emitter current remains constant and
a small value of current flows in Cut-off region.
53
Topic 6

Base Width Modulation or Early


Effect

54
Figure 1 Input Characteristics of CB

55
Introduction
• In figure 1, the emitter base diode characteristics shift
upward by increasing the value of Collector-base
voltage (VCB).
• This occurs due to a phenomenon called Base width
modulation or Early effect.
• In a PN junction, the width of the depletion layer
increases wrt reverse bias voltage.
• In a transistor, the emitter-base junction is forward
biased and no effect on the width of the depletion
layer.
• Since Collector-base junction reverse biased – direct
impact on the width of the depletion layer.
• On increasing the collector voltage – the width of the
depletion layer increases.

56
Reduction of Base width
• Since base lightly doped when compared to
collector, this depletion layer penetrates deeply
into the base region thereby reducing the
effective width of the base.
• This variation of the effective base width by
increasing the collector voltage called base
width modulation or early effect.

57
Impact of Early Effect
• Reduces the chances of recombination of
electrons with holes in the base region thereby
increasing the common base current gain wrt
Collector-base voltage.
• Increases the concentration of minority carriers
within the base thereby increasing the emitter
current.
• For large collector voltage, the effective base
width reduced to zero causing the voltage
breakdown of the transistor.
• This phenomenon called Punch-through.
58
Topic 7

Ebers-Moll Model of a Transistor

59
Figure 1 Ebers Moll Model for PNP

60
Introduction
• A transistor has two PN junctions & the base region
common to both junctions and forms a coupling
between them.
• Since transistors constructed with very narrow base
regions – an electrical interaction exists between the
junctions called Transistor action.
• Figure 1 shows the Current components in a PNP
transistor – Emitter current and Collector current.
• Voltages - VCB & VEB appear across the collector-base
and emitter-base junctions.
• Emitter current has two components – current
associated with emitter-base diode (IED) and current
associated with collector-base diode (ICD).
• The component αR. ICD – a portion of collector-base
diode coupled to the emitter through the base.
61
Eber Molls Equations for PNP
• The following observations from Figure 1 – Eber Molls
Model for a PNP Transistor.
• Model consists of two diodes connected back-back –
emitter-base junction & collector-base junction of a
transistor.
• Two controlled current sources – αR ICD and αF IED –
indicate coupling between the junctions.
• The currents IED & ICD related to VED & VCD by the
following equations –

62
Eber Molls Equations for PNP (contd)
• IES – reverse saturation current of emitter-base junction.
• ICS - reverse saturation current of collector-base
junction.
• αF – forward transmission from emitter to collector –
common base current gain – value ranges from 0.98 to
0.998.
• αR – reverse transmission from collector to emitter –
inverse alpha of a transistor – value ranges from 0.4 to
0.8.
• The equation – αF. IED = αR. ICD -- reciprocity condition
for a transistor.
• Figure 2 shows the Ebers Moll model for a NPN BJT.
63
Figure 2 Ebers Moll Model for NPN

64
Eber Molls Equations for NPN

65
Figure 3 Approximate Models of BJT
• In saturation region - both the junctions are forward
biased – both diodes act as short circuits. Transistor
acts as a short circuit.
• In active region – first junction FB & Second junction RB
– emitter-base diode acts as short circuit & collector-
base diode acts as open circuit.
• In saturation region - both the junctions are reverse
biased – both diodes act as open circuits. Transistor
acts as a open circuit.

66
Accurate Saturation Region Model
• Generally VEB & VCB are zero in the saturation region
but always some voltage drop across the transistor
terminals.
• These values are essentially those across the forward
biased diodes.
• In accurate models these values are – 0.8 V & 0.6 V for
PNP and NPN transistors respectively.

67
Accurate Active Region Model
• The approximate model of active region converted to
accurate model by adding a battery voltage VEB(active)
whose value is 0.7 V.

68
Accurate Cut-off Region Model
• Generally the approximate model given earlier
is sufficient for this model – since the transistor
is open circuited.

69
Ebers Moll Model for CE Transistor
• The Ebers Moll model for a transistor in CE
configuration in the active region shown below.
• Also called dc model of a transistor.

70
Ebers Moll Model for CE Transistor (contd)
• The dc model of a transistor in CE in a convenient
mode is given below.
• Here the current gain βF replaced by β.

71
Topic 8

Hybrid Parameters for Transistors

(‘h’ parameters)

72
Introduction
• The hybrid parameters are also called ‘h’
parameters.
• Generally used to determine the amplifier
characteristic parameters such as voltage gain,
input and output resistances etc.
• Gives accurate results in transistor amplifier
circuit analysis.

73
Figure 1 - h parameters of a Linear circuit

74
h parameters for a Linear circuit
• Figure 1 shows the model of a linear device or circuit
represented by a box and four terminals – two for input
& two for output.
• The behavior of the circuit specified by two voltages –
input & output voltage and by two currents – input &
output current.
• The polarity of voltages – upper terminal positive and
lower terminal negative.
• Both currents flow into the box.
• If opposite to above – all four parameters assumed to be
negative.
• The equivalent circuit – hybrid model of the linear circuit
and h11, h12, h21, h22 are hybrid parameters. 75
h parameters for a Linear circuit (contd)
• The hybrid equations obtained by applying KCL to the
input and output circuits of the model.
• These four parameters completely describe the behavior
of the circuit and are constant.
• They are expressed in different units – h11 in Ohms, h12
& h21 are dimensionless and h22 in mhos.
• They have mixed units – called hybrid parameters or h
parameters.

76
Determination of h parameters
• The parameters – h11 & h21 determined by short
circuiting the output terminals of a given circuit.
• The parameters – h12 & h22 determined by open
circuiting the input terminals of a given circuit.
• Determination of h11 & h21: a short circuit at the output
will make v2 equal to zero.
• Substuiting value of v2=0 in –
• v1 = h11. i1 + h12. v2 ; v1 = h11.i1 - h11 = v1/i1
• Substuiting value of v2=0 in –
• i2= h21.i1 + h22.v2 ; i2 = h21.i1 -- h21 = i2 /i1
• First parameter – Input resistance with o/p shorted
• Second parameter – Forward current gain with o/p 77
Determination of h parameters (contd)
• Determination of h12 & h22: a open circuit at the input
will make i1 equal to zero.
• Substuiting value of i1=0 in –
• v1 = h11. i1 + h12. v2 ; v1 = h12.v2 - h12 = v1/v2
• Substuiting value of i1=0 in –
• i2= h21.i1 + h22.v2 ; i2 = h22.v2 -- h22 = i2 /v2
• Third parameter – Reverse Voltage gain with i/p open.
• Fourth parameter – Output conductance with i/p open.

78
Standard Representation for h parameters
• The parameters – h11 & h21 are called forward
parameters.
• h12 & h22 are called reverse hybrid parameters.
• It is more convenient to represent the parameters h11,
h21, h12 & h22 as – hi, hf, hr and ho respectively.
• Here –
• i means input; f –forward; r – reverse and o = output.

79
h parameter Notations for Transistors
• For a small signal operation, the behavior of a
transistor is like a linear device.
• But for small signal operation, every transistor has four
h-parameters depending the following factors –
transistor type, configuration, operating point,
frequency & temperature.
• Can be obtained experimentally or graphically from the
transistor characteristics.

80
Hybrid Equivalent Circuit of Transistor
• The following figure shows the transistor with input &
output terminals.
• Amplifier formed by connecting a signal source at the
input terminals & a load resistance at the output
terminals.
• Represents in any one of three possible configurations.

81
Hybrid Equivalent for CE Transistor
• In this configuration – the input signal applied between
the base & emitter terminals and output across the
collector & emitter terminals.
• The expressions for the input voltage & output current
are -

82
Hybrid Equivalent for CB Transistor
• In this configuration – the input signal applied
between the emitter & base terminals and
output across the collector & base terminals.
• The expressions for the input voltage & output
current are -

83
Hybrid Equivalent for CC Transistor
• In this configuration – the input signal applied
between the base & collector terminals and
output across the emitter & collector terminals.
• The expressions for the input voltage & output
current are -

84
Example for Hybrid Parameters
• Determine the value of h-parameters for the
given circuit.

85
Answers for the Problem
• Input resistance h11 = 8 ohms
• Forward current gain h21 = -0.5
• Reverse voltage gain h12 = 0.5
• Ouput conductance h22 = 0.125 mhos

86
Topic 9

Construction of JFET

87
Introduction
• A three terminal device used for a variety of applications
similar to that of BJT.
• Primary difference between FET & BJT – BJT a current
controllable device & FET a voltage controllable device.
• Current controllable device – IB controls the collector
current which is the output current.
• Voltage controllable device – VGS controls the drain
current which is the output current.
• FET’S have high input impedance when compared to
BJT’S .
• Includes applications – analog switching, high input
impedance amplifiers, microwave amplifications & IC’S.
• Has negative temperature at high current – leads to 88
Introduction (contd)
• Uniform temperature distribution over the device &
prevents it from thermal runaway.
• Since unipolar devices – do not suffer from minority
carrier storage effects and used for higher switching
speeds & higher cut-off frequencies.
• Devices are basically square law or linear devices –
hence inter-modulation products are very smaller.

89
Types of JFET
• Two types of JFET – N channel JFET & P channel JFET
depending their structure.
• Basic construction of N channel JFET shown in Figure 1
(a) – consists of a N type semiconductor bar with two P
type heavily doped regions on either side.
• These P type regions form – two PN junctions.
• The space between the junctions – called channel
• Both the P type regions connected internally by a
terminal called Gate.
• The electrical connections from the N type bar – one
drain & other source.
• Drain – the terminal through which electrons leave the
semiconductor ; Source – electrons enter semiconductor.
90
Types of JFET (contd)
• Whenever a voltage applied between the drain and
source terminals – a current flows through the N-
channel.
• This current comprises only majority charge carriers –
electrons. Hence JFET – a unipolar device whereas BJT a
bipolar device. Similarly the construction of P channel
JFET also shown in Figure 1 (b).

91
Figure 1 - Types & Symbols of JFET’s

92
Topic 10

Operation of JFET

93
Fig 1 – N channel JFET

94
Formation of Depletion Region
• Consider a N channel JFET as shown in Figure 1.
• P type gate & the N type channel – PN junction. PN
junction always reverse biased for normal JFET operation.
• Reverse biasing applied either by a voltage across the
gate & source terminals (Method 1) or across the drain to
source terminals (Method 2)
• When a PN junction reverse biased – electrons & holes
diffuse across the junction, form a depletion region,
width of depletion region increases with increase in RB
voltage.
• If junctions equally doped – depletion regions extend
equally in both regions otherwise depletion extends
more into the region of lower doping. 95
Method 1 – RB the PN junction
• If P region heavily doped when compared to N regions –
depletion region extends less into P region & deeper
into N regions.
• If no applied voltage across gate & source – depletion
region symmetrical around the junction.
• The conductivity of the depletion region zero and the
width of the channel reduced.
• It further reduces with the increase in the RB voltage
across the gate & source terminals.

96
Method 2 – RB the PN junction
• The drain to source voltage also produces RB across the
PN junction similar to that of VGS.
• Consider two variable resistances ra & rb across the
channel whose values depend upon VDS & VGS
respectively.
• Now the drain current flows through the device from
drain to source terminals – causes a voltage drop across
the resistance rb – in turn reverse biases the PN junction
with the gate terminal open – shown in Figure 2 (a).
• Depletion region not symmetrical – more deeper into
the channel near the drain terminal when compared to
source terminal.
• Voltage drop across ra greater than drop across rb. 97
Fig 2 – Effect of VDS on the channel

98
Operation of JFET
• Reverse biasing for a N channel JFET done by applying
either negative gate voltage or positive drain voltage.
• The effect is to form a depletion region within the
channel.
• When a voltage applied between drain & source
terminals – a drain current flows through the device.
• This drain current is maximum when no voltage applied
across gate and source terminals.
• If VGS applied along with drain voltage, the depletion
region increases with the increase in the RB voltage.
• This reduces the effective width of the channel thereby
reducing the drain current as shown in figure 3 (a).
99
Fig 3 - Operation of JFET

100
Operation of FET (contd)
• If gate voltage increased further – a stage will come that
two depletion regions touch each other blocking the
channel completely as shown in figure 3 (b).
• Here the drain current becomes zero.
• The value of VGS at which the drain current becomes
zero or the channel completely pinched off called pinch-
off voltage (VGS(off)).
• This pinch-off voltage negative for N channel FET which
depends upon – doping of N, P regions of the device &
width of channel structure.
• The operation of P channel FET similar to N channel FET
except that – majority carriers = holes, polarities of gate
& drain supply voltages reversed. 101
Topic 11

Characteristics of JFET

102
Introduction
• Drain characteristics – relationship between drain
current (ID) & drain-source voltage (VDS) for different
values of VGS.
• Transfer characteristics - relationship between drain
current (ID) & gate-source voltage (VGS) for different
values of VDS.
• The drain & transfer characteristics obtained for N
channel FET in common source configuration as shown
in Figure 1.

103
Fig 1 – Circuit for Characteristic Curves

104
Fig 2 – Drain Characteristics of JFET

105
Drain Characteristics of FET
• The drain-source voltage varied and the corresponding
values of drain current noted for various fixed values of
gate-source voltage.
• The characteristic curve divided into four regions
specifically for the curve – VGS = 0 V as shown in Figure 2
(b).
• 1) Ohmic region – curve OA – drain current increases
linearly with drain-source voltage due to N type
semiconductor bar acting as a simple resistor.
• 2) Curve AB – drain current increases at reverse square
law rate wrt drain-source voltage – drain current
increases slowly compared to that of Ohmic region.
• Increasing VDS – RB voltage increases – channel width 106
Drain Characteristics of FET (contd)
• Decreases and reduced to a minimum value called
pinch-off at point ‘B’.
• The drain-source voltage at which the channel pinch-off
occurs called pinch-off voltage (Vp).
• 4) Pinch-off region – also called saturation region
indicated by curve AB – the drain current remains
constant at the maximum value (IDSS) & depends upon
the applied VGS value – given by --
• ID = IDSS [1 – (VGS /VP)]2
• The above equation called Shockly’s equation.

107
Fig 3 – Transfer Characteristics of JFET

108
Transfer Characteristics of JFET
• These curves obtained by varying the gate-source
voltage (VGS) & observing the corresponding values of
drain current (ID) for different fixed values of drain-
source voltage (VDS).
• The upper end of the curve indicates the drain current
value equal to IDSS with lower end equal to VGS(off) of VP.
• The curve is a part of a parabola and given by-
• ID = IDSS [1 – (VGS /VGS(off))]2
• ID = IDSS [1 – (VGS /VP)]2

109
JFET Parameters
• 1) DC Drain resistance (RDC) – also called static or
dynamic resistance of channel – given by RDC = VDS / ID.
• 2) AC Drain resistance (rd) – also called dynamic drain
resistance when the FET operating in the pinch-off
region or saturation region – given by rd = ΔVDS / ΔID.
• 3)Transconductance (gm) – also forward
transconductance given by – gm = ΔID/ ΔVGS.
• 4) Amplification Factor (μ) – ratio of the small change in
drain-source voltage to gate-source voltage for a
constant drain current – μ = ΔVDS / ΔVGS.
• 5) Input Resistance (Ri) – given by Ri = VGS / IGSS where
IGSS is the gate reverse current.
110
Topic 12

Relation between Pinch-off Voltage &


Gate-Source Voltage

111
Fig 1 – Drain Characteristics of FET

112
First Effect
• In the drain characteristics of FET, if the gate-source
Voltage increased above zero to -1V, -2V, -3V etc will
have two effects –
• 1) Value of pinch-off voltage reached at a smaller value
of drain current when compared to VGS=0V.
• 2) Value of VDS decreased when compared to that of
VGS= 0V.
• The reverse bias voltage across the gate-source junction
– sum of VGS and VDS. Hence for fixed value of VDS,
increasing VGS will increase the reverse bias.
• Thus if VGS increased from zero to -1V the gate-source
junction becomes reverse biased even if the drain
current equal to zero. 113
Second Effect
• The amount of reverse bias voltage produced by the
drain current will be decreased by One Volt.
• The increased value of VGS will add to the reverse bias at
the junction produced by the drain current.
• Hence lower value is required to reach the pinch-off
condition earlier.
• VGS = 0V produces a pinch-off voltage of 4V.
• If VGS= -1V, the channel requires only 3V drop instead of
4V from the drain-source voltage to reach the pinch-off
condition. The relation between drain current & pinch-
off voltage given by –
• ID = IDSS [1 – (VGS /VP)]2
114
Topic 13

JFET as a Voltage Variable Resistor

115
Introduction
• FET is a device usually operated in the constant-current
portion of its drain characteristics as shown in Figure 1.
• If it is operated on the region prior to pinch-off (that
is where VDS is small, say below 100 mV), it will behave
as a voltage-variable resistor (WE).
• It is due to that in this ohmic region drain-to-source
resistance RDS can be controlled by varying the bias
voltage VGS.
• In such applications the FET is also referred to as
a voltage-variable resistor or volatile dependent
resistor.
• It finds applications in many areas where this property is
useful. 116
Fig 1 – Drain Characteristics for VGS = 0V

117
Operation in Ohmic Region
• Figure 2 shows the drain characteristic curves for a 2N
5951 in the ohmic region (i.e. for low VDS).
• From the characteristic curve that RDS varies with VGS.
• For example, when VGS = 0, RDS = 133 ohm and when
VGS = – 2 V, RDS = 250 ohm.
• Because of this a JFET operating in the ohmic region
with small ac signals acts as a voltage-controlled
resistance.
• The drain curves shown in figure 2 extend on both sides
of the origin.
• This means that a JFET can be employed as a voltage-
variable resistor for small ac signals, typically those less
than 100 mV. 118
Fig 2 – Low Level Drain Characteristics

119
Applications
• When it is employed in this way, it does not require a dc
drain voltage from the supply.
• All that is required is an ac input signal.

120
Differences between BJT & JFET

121
Transistor VS FET

122
Introduction to MOSFET

123
Introduction to MOSFET
• MOSFET – Metal oxide semiconductor field effect
transistor.
• Has three terminals – gate, source & drain like that of
JFET.
• Unlike JFET – gate of a MOSFET insulated from the
channel. Hence called IGFET – Insulate gate field effect
transistor.
• Two types of MOSFET’S – Depletion type MOSFET’S also
called D-type MOSFET’S and Enhancement MOSFET’S –
also called E-type MOSFET’S.
• The primary difference between them depends upon
the construction.
124
Topic 14

Depletion Type MOSFET

125
Fig 1 – Construction of D-type MOSFET

126
Construction of D-type MOSFET
• Figure 1 shows the basic structure of a N channel
depletion type MOSFET.
• Consists of a N type material with an insulated gate on
the left & P region on the right.
• The P region called substrate which reduces the
conducting path of the channel.
• A thin layer of silicon dioxide deposited on the left side
of the channel called gate terminal.
• Due to gate terminal – negligible gate current flows even
when the gate voltage is positive.
• No PN junction exists in MOSFET.

127
Working of D-type MOSFET
• Can be operated in two modes –
• Depletion mode: when the gate voltage negative
• Enhancement mode: when the gate voltage positive.
• This device operated in two modes – called depletion-
enhancement type MOSFET (DE type MOSFET).
• This device acts as a parallel plate capacitor with the
gate as one plate & the semiconductor channel the
other plate with Sio2 layer acting as a dielectric.
• If one plate of capacitor made negative, the other plate
will be come positive by induction & vice versa.

128
Fig 2 - D-type MOSFET – Depletion Mode

129
D-type MOSFET – Depletion Mode
• In this mode – negative gate voltage applied – induces a
positive charge in the channel.
• In the vicinity of positive charge, the electrons repelled
away in the channel – channel becomes depleted of
free electrons thereby reducing the drain current.
• If VGS increased further, the channel totally depleted of
free electrons – drain current becomes zero.
• Thus with negative gate voltage – operation of MOSFET
similar to that of JFET.
• Since channel becomes depleted of free electrons –
depletion mode.

130
Fig 3 - D-type MOSFET – Enhancement Mode

131
D-type MOSFET – Enhancement Mode
• In this mode – gate voltage positive – induces negative
charge in the channel – increases the number of free
electrons thereby increasing the drain current.
• Hence this mode called Enhancement mode.
• Depletion type MOSFET – can conduct even if VGS = OV
– called Normally ON MOSFET.

132
Fig 4 – Drain Characteristics – D type MOSFET

133
Drain Characteristics – D-type MOSFET
• Figure 4 shows the drain characteristics of D type
MOSFET in common source configuration.
• These curves plotted for both positive & negative values
of gate voltage.
• If VGS = 0 & negative – depletion mode and if VGS = 0 &
positive – enhancement mode of operation.
• Drain characteristics of D type MOSFET similar to that of
JFET.
• But JFET not operated with positive values of gate
voltage.

134
Fig 5 – Transfer Characteristics – D type MOSFET

135
Transfer Characteristics – D-type MOSFET
• Figure 5 shows the transfer characteristics or
transconductance curves for N channel depletion type
MOSFET.
• The region AB of the curve is similar to that of JFET and
extends for the positive value of gate voltage also.
• The value IDSS represents the maximum value of drain
current at which VGS = 0V – given by
• ID = IDSS [1 – (VGS /VGS(off))]2

136
Topic 15

Enhancement Type MOSFET

137
Introduction
• This device – no depletion mode & can be operated only
with enhancement mode.
• Differs from depletion type MOSFET such that – no
physical channel available in E type MOSFET as shown in
Figure 1.
• The P type substrate extends the Sio2 layer completely.
• Figure 2 shows the normal biasing for N channel E-type
MOSFET.
• This E-type MOSFET can be operated only with positive
values of VGS.
• If VGS = 0, the drain supply forces some free electrons
from source to drain but not permitted by the P region –
hence no drain current – called Normally–off MOSFET138
Fig 1 – Construction of E type MOSFET

139
Operation of E type MOSFET
• If some positive voltage applied at the gate – induces a
negative charge in the P region by attracting free
electrons from the source.
• If gate made more positive – attracts more no of
electrons forming a layer called N type inversion layer.
• The minimum value of VGS required to produce the
inversion layer called Threshold voltage VGS(th).
• If VGS > VGS(th) – drain current flows using the inversion
layer.
• If VGS < VGS(th) – no drain current flows.

140
Fig 2 - Characteristics of E-type MOSFET

141
Drain Characteristics – E type MOSFET
• When the gate-source voltage less than the threshold
value – no drain current flows
• But a small amount of drain current flows through
device due to thermally generated electrons in the P
type region.
• When the VGS greater than threshold – significant value
of drain current flows due to the formation of inversion
layer.
• The drain current increases with the increase in gate
voltage as shown in Figure 2.

142
Transfer Characteristics – E type MOSFET
• Figure 3 shows the transfer characteristics of N channel
E type MOSFET.
• When VGS = 0, no drain current flows.
• If VGS increased above the threshold value, the drain
current current increases rapidly wrt VDS and given by –
• ID = K [VGS – VGS(th)]2 where ‘K’ is a constant whose value
depends upon the type of MOSFET.

143
Differences between JFET &
MOSFET

144
JFET Vs MOSFET

145

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