FLIP-FLOPS AND

MEMORY
FLIP-FLOP:-
Flip-Flop is a memory element which
is capable of storing one bit of
information and it is used in clocked
sequential circuits.
A flip-flop has two outputs, one for
normal value and other for
complement value of the bit stored in
it.
Basic flip-flop
 What is a flip-flop ?
A flip-flop can maintain a binary state indefinitely
(As long as power is delivered to the circuit) until
directed ? by an input signal to the switch states.
A flip-flop is also known as bistable multivibrator .
Flip-Flops are different types depending on how
their inputs and clock pulse cause transition
between two states.
What is a Clock Pulse ?
 Sometimes called CP, the Clock pulse is the
vibration of a quartz crystal located inside a
computer and is used to synchronize the timing of
hardware components. The speed of the computer's
processor, measured in MHz or GHz, refers to its
number of clock pulse cycles per second.
 TYPES OF FLIP-FLOPS

There are four types of flip – flops

1) RS flip-flop.
2) D flip-flop.
3) JK flip-flop.(not in the scope of syllabus)
4) T flip-flop. (not in the scope of syllabus)
RS FLIP-FLOP

The ‘S’ in the RS flip-flop

stands for Set where as
the ‘R’ in the ‘RS’ flip flop
Stands for Reset.
This type of flip-flop
is sometimes called a
direct coupled RS
flip-flop or SR latch
 D FLIP-FLOP
The D flip-flop is widely used. It
is also known as a "data" or
"delay" flip-flop.
The D flip-flop captures the
value of the D-input at a
definite portion of the clock
cycle (such as the rising edge of
the clock). That captured value
becomes the Q output. At other
times, the output Q does not
change. The D flip-flop can be
viewed as a memory cell, a
zero-order hold, or a delay
Line.
An D flip-flop can be derived
from RS Flip flop using the
NAND GATES
Advantages of D Flip-flops.
1) The forbidden condition of RS flip –flop
(when both the inputs are 1 in nor gate
or both inputs being 0 in nand gate ) is
over come using D Flip-flop.
2) We can still avoid the race around
condition by using D flip flop.
3) These flip-flops are very useful, as
they form the basis for shift registers
,which are an essential part of many
electronic devices. The advantage of
the D flip-flop over the D-type
"transparent latch" is that the signal
on the D input pin is captured the
moment the flip-flop is clocked, and
subsequent changes on the D input will
be ignored until the next clock event.
An exception is that some flip-flops
have a "reset" signal input, which will
reset Q (to zero), and may be either
asynchronous or synchronous with the
clock.
T flip flop
If the T input is high, the T flip-flop changes state
("toggles") whenever the clock input is strobe. If the
T input is low, the flip-flop holds the previous value.
This behaviour is described by the characteristic
equation:
Q n e x t = T ⊕ Q = T Q ¯ + T ¯ Q {\displaystyle
Q_{\rm {next}}=T\oplus Q=T{\overline
{Q}}+{\overline {T}}Q} (expanding the XOR
operator)
JK flip flop
 The JK flip-flop augments the behaviour of the SR flip-flop (J=Set,
K=Reset) by interpreting the J = K = 1 condition as a "flip" or
toggle command. Specifically, the combination J = 1, K = 0 is a
command to set the flip-flop; the combination J = 0, K = 1 is a
command to reset the flip-flop; and the combination J = K = 1 is a
command to toggle the flip-flop, i.e., change its output to the logical
complement of its current value. Setting J = K = 0 maintains the
current state. To synthesize a D flip-flop, simply set K equal to the
complement of J. Similarly, to synthesize a T flip-flop, set K equal to
J. The JK flip-flop is therefore a universal flip-flop, because it can
be configured to work as an SR flip-flop, a D flip-flop, or a T flip-
flop.
 The characteristic equation of the JK flip-flop is:
 Q n e x t = J Q ¯ + K ¯ Q {\displaystyle Q_{\rm
{next}}=J{\overline {Q}}+{\overline {K}}Q}
The end

Group 6  A presentation made by

 Anand Sharma
 Raunak Gupta
 Anish Rao Renathi