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Touch-Panel Controller

Implemented with LTPS TFTs

KeeChan Park, JaeEun Pi, et al.


Konkuk University

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Contents

1. Introduction
2. System Overview
3. Unit Circuits
4. Measured Results
5. Summary

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Introduction
Backgrounds
 Touch panel technology provides new opportunity for display
developers. → Many technologies are competing.
 Digital and analog circuits can be integrated on glass substrates
using low-temperature poly-Si (LTPS) TFTs.

Purpose of Our Work


 Integration of touch-panel controller on glass substrate using LTPS
TFTs → Elimination of TSP driver IC.
 Application to low-end TSP system.

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Overall Block Diagram
Oscillatory
Ring Oscillator Freq. Divider Level Shifter
Signal Clock
VDD.TP VY Clock
+

VDD.TP, GND
Touch Point Touch Point Power / Signal
VX , VY Switching Circuit
ITO ITO
VX −+
ITO ITO
Y VDD.TP VDATA

X VREF 2-Stage
...
4-wire resistive touch panel Comparators [1 ∙·∙ 7]
Generator

7-bit Data
3-bit Register for X 3-bit Data
6-bit Digital Output 7-to-3 Encoder
3-bit Register for Y
Clock

4
Ring Oscillator
VDD

Oscillatory
Signal
23 CMOS inverters

Output of ring oscillator is fed into frequency divider to obtain clock signal of tens of
Hz.

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Switching Circuit
V X, V Y Clock

Oscillatory
Ring Oscillator Freq. Divider Level Shifter VDD.TP
VDD.TP
Signal Clock
Touch
VY
Clock
Panel
+

VDD.TP, GND
Touch
Point
Touch
Point
VX , VY
Power / Signal Upper
ITO ITO Switching Circuit
ITO
VX
ITO ITO
VDD.TP VDATA
Y

X VREF1
VREF ..
2-Stage
Generator . Comparators [1 ∙·∙ 7]
VREF7

7-bit Data Lower


6-bit Digital Output
3-bit Register for X 3-bit Data
7-to-3 Encoder
ITO
3-bit Register for Y
Clock

GND

6
2-Stage Comparator
VDD

VDD

VOUT

VBFOUT
1d- 1d+

VSS
VREF VDATA
1.25V 0~10V
2.50V
3.75V
5.00V
6.25V
7.50V
VSS
8.75V

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Simulation Results - 1st Stage Output

VREF = 1V 2V 3V 4V 5V 6V 7V 8V 9V 10V

VREF = 1V
2V 3V 4V 5V 6V 7V 8V 9V 10V

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Simulation Results - 2nd Stage Output

VREF = 1V 2V 3V 4V 5V 6V 7V 8V 9V 10V

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N-Channel TFT Model for Simulation
W/L = 20um / 20um
μFE=68cm2/Vs, Vt=1.8V
VDS=10V

VDS=0.1V VGS=9V

VGS=6V

VGS=3V

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P-Channel TFT Model for Simulation
W/L = 20um / 20um
μFE=50cm2/Vs, Vt=-2.3V
VDS=-10V

VDS=-0.1V

VGS=-9V

VGS=-6V
VGS=-3V

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Measured Results - Buffered Output

VREF = 1V 2V 3V 4V 5V 6V 7V 8V 9V 10V

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7-to-3 Encoder
Output of
Comparator No.1 3Bit Register Input 3

Output of
Comparator No.2 3Bit Register Input 2

Output of
Comparator No.3
3Bit Register Input 1
Output of
Comparator No.4

Output of 0000000 → 000


Comparator No.5 0000001 → 001
0000011 → 010
Output of 0000111 → 011
Comparator No.6 .
.
.
Output of 1111111 → 111
Comparator No.7

13
Layout

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Measured Performance

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Summary
 A touch-panel controller has been successfully implemented with
LTPS TFTs on a glass substrate.
 The controller switches coordinate axes in forcing voltage gradient
on one ITO plate and simultaneously in sensing the intermediate
voltage via the other ITO plate.
 2-Stage comparators generates digital signals with acceptable
accuracy for low-end applications.

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