DESIGN AND IMPLEMENTATION OF CARRY SELECT ADDER

WITHOUT USING MULTIPLEXERS

PRESENTED BY: BATCH C21

U.SHIVAAMRUTH (15H51A04G9)
G.SHANMUKH SAI (15H51A04D8)
G.SRI CHANDANA (15H51A04D5)
MINI PROJECT COORDINATOR
Mr.C.VEERANJANEYULU
ASSISTANT PROFESSOR,
CMRCET.
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
CMR COLLEGE OF ENGINEERING & TECHNOLOGY
(AUTONOMOUS)
Kandlakoya(vi), Medchal (dt), 501401.
 CONTENTS
•INTRODUCTION

•OBJECTIVE

•BLOCK DIAGRAM

•REQUIREMENTS

•PRINCIPLE OF OPERATION

•FLOWCHART

•RESULTS

•ADVANTAGES

•APPLICATIONS

•REFERENCES

•CONCLUSION
 INTRODUCTION

 Very-large-scale integration (VLSI) is the process of

creating integrated circuits by combining thousands
of transistor-based circuits into a single chip.

 Design of high performance digital adder is an

important requirement in advanced digital
processors for faster computation.

 The design and implementation of high performance

carry select adder using Kogge Stone adder in two
different approaches is done.
 OBJECTIVE

 To design high performance carry select adder

(using Kogge Stone adder , Excess -1 adder)
without using multiplexers in order to reduce the
carry propagation delay as well as decreases the
area and thereby increases the performance of
the system.
 BLOCK DIAGRAM
 EXISTING SYSTEM:

Limitations:
• Higher carry propagation delay.
• More power consuming.
• More area.
 BLOCK DIAGRAM
IMPLEMENTED SYSTEM:
APPROACH 1: APPROACH 2:

n n n n

n n n n

•Carry select adder with •Carry select adder with

KS adder(Cin=0),Excess 1 adder KS adder( Cin=0) and first
and MUX. zero finding logic.
 REQUIREMENTS
 SoftwareRequirements:
XILINX Version.
Language:

VERILOG HDL
 Hardware Requirements:

PC
 PRINCIPLE OF OPERATION
• Knowles showed that fan-out is reduced without increase in
logical depth using Kogge Stone structure.

• We use the Kogge Stone scheme that limits the fan-out at

each node to unity.
 PRINCIPLE OF OPERATION
CARRY OUTPUT EQUATIONS CARRY OUTPUT EQUATIONS OUPUT SUM EQUATIONS FOR
FOR KOGGE STONE ADDER FOR KOGGER STONE KOGGE STONE ADDER
ADDER(Cin=0)

C1= g0+p0cin C1= g0 s0 = Cin ^ p0

C2= (g1+p1g0) s1= C1 ^ p1

C2= (g1+p1g0) + p1p0cin

C3= (g2+p2g1) + p2p1c1 C3= (g2+p2g1) + p2p1c1

s2 = C2 ^ p2

C4= (g3+p3g2) + s3 = C3 ^ p3
p3p2(g1+p1g0) + C4= (g3+p3g2) + p3p2
p3p2 p1p0cin (g1+p1g0)
 FLOW CHART
APPROACH 1: APPROACH 2:

START START

Input data to Input data to

Kogge Stone Kogge Stone
adder adder

Excess 1 adder Zero finding logic

If ‘0’ Cin= If ‘1’ If ‘0’ Cin= If ‘1’

0/1 0/1

Print the Print the Print the Print the

Kogge stone Excess 1 adder Kogge stone Excess 1 adder
adder output output adder output output
through mux through mux

STOP STOP
 RESULTS
APPROACH 1 : SIMULATED OUTPUT
 RESULTS
APPROACH 2 : SIMULATED OUTPUT
 ADVANTAGES
 Less area
 Less delay

 More speed

 Better performance
 REFERENCES
 [1] O. J. Bedrij, “Carry-select adder,” IRE Trans. Electron.
Computer., pp.340–344, 1962.

 [2] J. Sklansky, “Conditional-Sum Addition Logic” IRE.

Transactions on Electronic Computers, vol. EC-9, pp. 226-231,
1960.

 [3] P.M. Kogge, H.S. Stone; “A Parallel Algorithm for the

Efficient Solution of a General Class of Recurrence
Equations”IEEE Trans., C22(8):786-793, Aug. 73.

 [4] R.E. Ladner, M.J. Fischer; “Parallel Prefix

Computation”JACM, 27(4):831-838, Oct. 80.

 [5] R.P. Brent, H.T. Kung; “A Regular Layout for Parallel Adders”
IEEE Trans., C-31(3):260-264, March 82.
 CONCLUSION

 The design of carry select adder is implemented

with Kogge Stone tree using two different
approaches. One approach uses Excess1 adder and
the other uses first zero finding logic to realize the
carry select adder.

 CSA with MUX performs better in terms of delay

and CSA without MUX performs better in terms of
area. CSA without MUX performs slightly better
compared to CSA with MUX when the area-delay
product is taken.
THANK YOU
QUERIES
Print the Kogge
stone adder
output through
mux
• Knowles showed that fan-out is reduced
without increase in logical depth using Kogge
Stone structure.

• We use the Kogge Stone scheme that limits

the fan-out at each node to unity.
• c5= (g4+p4g3) + p4p3 (g2+p2g1) + p4p3 p2p1c1
• c6= (g5+p5g4) + p5p4 (g3+p3g2) + p5p4 p3p2c2
• c7= (g6+p6g5) + p6p5 (g4+p4g3) + p6p5 p4p3c3
• c8= (g7+p7g6) + p7p6 (g5+p5g4) + p7p6 p5p4
[(g3+p3g2) + p3p2 (g1+p1g0)] +
p7p6 p5p4 p3p2 p1p0cin
CARRY OUTPUT EQUATIONS CARRY OUTPUT EQUATIONS
FOR KOGGE STONE ADDER FOR KOGGE STONE ADDER(Cin=0)

• c1= g0+p0cin • c1= g0

• c2= (g1+p1g0) + p1p0cin • c2= (g1+p1g0)
• c3= (g2+p2g1) + p2p1c1 • c3= (g2+p2g1) + p2p1c1
• c4= (g3+p3g2) + p3p2(g1+p1g0) • c4= (g3+p3g2) + p3p2 (g1+p1g0)
+ p3p2 p1p0cin
 BLOCK DIAGRAM
APPROACH 1: APPROACH 2:

Carry select adder with KS adder( Cin=0),Excess 1 Carry select adder with KS adder( Cin=0)
adder and MUX. and first zero finding logic.