AGENDA OF UNIVERSAL SERIAL BUS

• General Information
• Technical Information
• Specification Information
• Coding
 General Information
1. Introduction
2. History, Speeds, data rates, connections
3. Advantages
4. Disadvantages
5. Hardware and software tools
Introduction:
• Universal Serial Bus (USB) is the
common interface that enables
commutations between the host
and device
• Its Works as Command and
response mode.
• It’s a 7 bit addressable
• Up to 127 devices can be connected
to any one USB bus at any one given
time.
• A USB system is a unidirectional communications hierarchy
consisting of a single USB Host controller.
• All components of a USB system connect to each other using
one of the USB specified Cables and connectors .

• USB signals are transmitted using

differential signaling on a twisted-pair
data cable ( D+ and D-)
History, Speeds, data rates, connections
•By Joint efforts of Intel, Microsoft, Digital Equipment
Corporation, IBM, NEC, Nortel, Compaq. (USB-IF)
•Compete with IEEE 1394 STD.
Version Speed modes Released Data rates Types Power Application
Delivery
1.0 Low Speed 1996 1.5 Mbps Keyboard, Mouse,
Game Peripherals
1.1 Full speed 12 Mbps Half Scanner, Printer,
Duplex 2.5W Digital audio
2.0 High speed 2000 480 Mbps Broadband, Mass
storage, Imaging
3.0 Super speed 2008 5 Gbps
Full 4.5~7. 5W Real Time
3.1 Super speed plus 2013 10 Gbps
Duplex Streaming, Portable
3.2 SS + (with Multi 2017 20 Gbps Storages Devices
link mode) 100W
Advantages
• Ease of Use
• Single Interface for multiple
devices
• Auto-configuration
• Easy to expand
• Compact Size
• Speed
• Reliability
• Low cost
• Low power consumption
Limitations:-
• Distance
• Broadcasting.
• Each USB device can't have more than 5 "nodes"
between it and the PC
• Speed compared with other protocols.
 Hardware and software tools
• Hardware tools:
– Teledyne lecroy Prosuite.
– ITIC 1480A USB 2.0 Protocol Analyzer.
• Software Tools
– notepad++,
– putty,
– svn server
 Technical Information
• USB Set up or Architecture
– SoC Setup and Device
– Analyzer Setup
• Speed modes Circuits
• Communication States
• Power Distribution
• Data Protocol
• Device Stages
• Bus Enumeration
• Descriptors
• Host controllers and types
• Initialization analyzers,
• Requests
USB Set up on X86 Environment
USB Set up on PC Environment
USB Set up on SOC Environment
USB Set up ARM SoC Environment

PC to Monitor
with trace 32
C
Core o
IDE
n
U t
S r
B o JTAG
l
AMBA l
BUS AHB e
r
Bridge

........
.........
USB Set up on Analyzer Environment

Lecroy Analyzer

Analyzer Exerciser

SoC Target Board

Core
Controller

PC to Monitor

USB device
 USB Speed Modes Circuit
Low Speed Mode Full Speed Mode
Power Delivery
USB Data Protocol Hierarchy:

Pipes • Message
• Stream

• Control

Transfers • Interrupt
• Isochronous
• Bulk
• Set up Token

Packets • Data
• Handshake
• Start of frame
 PIPES
Stream Message
Isochronous Bulk Interrupt Control
Set up
Data
Status

IN OUT IN OUT
Token DATA HS SOF
S-8/32 PID-8 FRAME - 11 CRC-5 EOP-3
S-8/32 PID-8 EOP-3
S-8/32 PID-8 DATA-0~8192 CRC-16 EOP-3

S-8/32 PID-8 ADD-7 EP-4 CRC-5 EOP-3

Write operation
Control Transfer

Read operation
Protocol layer
 Difference between Transfers
Control Interrupt Isochronous Bulk
Application Identify and configure the device Keyboard, mouse Audio, video Data Printer, scanner
works on Command and status
Byte size Packet Data Data Data Data
Low speed 8 byte 8 byte - -
0~8192
Full Speed 8,16,32,64 64 byte 1023 byte 8,16,32,64
Hi-speed Only 64 byte 1024 byte 1024 byte 512 byte

Set up Data Set up Data

Process Set up Data Status. Status. No status Status.

Error Correction Yes Yes No Yes

Flow of data IN and OUT IN or OUT IN or OUT IN or OUT
Priority 1 2 3 4
% of Bandwidth Mini 10 for Low/Full and 20 for high Max 90 at low / full ,80 at high speed None
reserved speed (Combined for interrupt and Isochronous)

Message type Bi directional unidirectional unidirectional unidirectional

Latency - Guaranteed Latency Bounded latency minimum latency.

Guaranteed No Yes Yes N0

Scheduling
Vacant bit Padding - Depends on band No padding
complication width
Timing Diagram
 Communication States
• Detached
• Attached
• Idle
• J, K and SEO States
• Single Ended One (SE1)
• Reset
• EOP signal
• Suspend
• Resume
• Keep Alive Signal
 Bus Enumeration

• USB Enumeration is the process of detecting, identifying and loading drivers for a USB
device.
•This involves a mixture of hardware techniques for detecting something is present and
software to identify what has been connected.
 Detecting
• A USB interface consists of 4 wires. Power,
Ground, Data Plus (USBDP) and Data
Minus (USBDM). A USB host port with no
devices connected uses 15kohm resistors
to connect both USB DP and USB DM to
GND.
• When a USB device (sometimes referred
to as a slave) is plugged into a USB host
there is a change on these USB data lines.
It is this change that the USB host uses to
detect a device has been connected. This
change is also used to identify the speed
of device attached
 identifying
• A low speed USB device (1.5Mbps) uses a 1k5 pull-up resistor to VCC on
the USB DM signal line.
• A full speed USB device (12Mbps) uses a 1k5 pull-up resistor to VCC on the
USB DP signal line.
• A high speed USB device (480Mbps) will initially appear as a full speed
device to the host. The first thing the USB host does is to attempt to send
/receive packets at high speed to the USB device. This is known as J and K
chirp and if communication is successful it will be assumed that the USB
device is a high speed device. If this initial communication fails then the
USB host assumes that the device is a full speed device.
• This means a high speed device has a 1k5 pull up resistor on USB DP that
can be switched in / out of circuit.
• A J state is defined as a differential signal on USBDP and USB DM >=
+300mV.
• A K state is defined as a differential signal on USBDP and USB DM >= -
300mV
 Descriptors
Device Configuration Interface String End point
Device
Device Class
Configuration
Interface
String
End Point
 Initialization analyzers
• Teledyne lecroy Prosuite.
• ITIC 1480A USB 2.0 Protocol Analyzer
 Host Controllers
• Universal Host Controller
Interface (UHCI)
• Open Host Controller
Interface (OHCI)
• Enhanced Host Controller
Interface (EHCI)
• USB OTG controllers
• In every bus we can
connect only Host
controllers.
The Set up packets
 PIPES
Stream Message
Isochronous Bulk Interrupt Control

SYNC PID ADD EP DATA CRC EOP

Token DATA HS SOF

S-8/32 PID-8 FRAME - 11 CRC-5 EOP-3
S-8/32 PID-8 EOP-3
S-8/32 PID-8 DATA-0~8192 CRC-16 EOP-3

S-8/32 PID-8 ADD-7 EP-4 CRC-5 EOP-3