3 8086 Instructions

Microprocessors and Peripherals
Chapter – 2:
8086 Instruction Set and Assembler
Directives
1
Machine Language Instruction Format
• A machine language instruction format has one or more
number of fields associated with it.
• The first field is called is as operation code field or opcode

field, which indicates types of operation to be performed by
the CPU.
• The instruction format also contains other field also known as

operands field.
• CPU executes the instruction using the information which

reside in these fields .
• There are six general formats of instruction in 8086 in
instruction set.
• Length of an instruction may vary from one byte to six byte.
2
• Byte 2 has three fields
– Mode field (MOD)
– Register field (REG) used to identify the register for the first operand
– Register/memory field (R/M field)
3
• The opcode usually appears in the first byte, but in the few
instruction, a register destination is in the first byte and few
other instruction may have their three bits of opcode in the
second byte.
• The opcodes have the single bit indicator.
• Their definition and significance are given as follows:
– W-bit :
• This indicates whether the instruction operates over an
8-bit 16-bit data /operands.
• If W bit is zero, the operand is of 8-bit and if W is 1, the
operand is of 16-bits.
– D-bit:
• This is valid in case of double operand instruction.
• One of the operands must be a register specified by
REG field.
• The register specified by REG is source operand if
D=0, else, it is a destination operand.
4
• S-bit :
− This bit is called sign extension bit. The S bit is used
along with W-bit to show the type of operation.
− 8-bit operation with 8-bit immediate operand is
indicated by S=0, W=0;
− 16-bit operation with 16 bit immediate operands is
indicated by S=0, W=1 and
− 16 bit operation with a sign extended immediate data is
given by S=1, W=1
• V-bit:
− This is used in case of shift and rotate instruction.
− This bit is set to 0, if shift count is one and is set to 1,if
CL contains the shift count.
5
• Z-bit:
− This bit is used by REP instruction to control the loop.
− If Z-bit is equal to1,the instruction with REP prefix is executed until
the zero flag matches the Z-bit.
– Please note that usually all the addressing modes have DS as the default
data segment.
– However, the addressing modes using BP and SP have SS as the default
segment register.
– DS is the default data segment register when a data is to be referred

as an operand.
– CS is the default code segment register for storing program codes
(executable codes).
– SS is the default segment register for the stack data accesses and
operations.
– ES is the default segment register for the destination data address.
6
1. One byte instruction:
− This format is only one byte long may have the implied data or
register operands.
− The least significant 3-bits of the opcode are used for specifying the
register operands, if any.
− Otherwise, all the 8-bits form an opcode and the operands are
implied.
2. Register to Register:
− This format is 2 bytes long.
− The first byte of code specifies the operation code and width of the
operand specified by w bit.
− The second byte of the code shows the register operands and R/M
field.
3. Register to/from Memory with no Displacement:

− This format is also 2 bytes long and similar to the register to register
format except for the MOD field.
− The mode field shows the mode of addressing.
− The MOD, R/M, REG and the W field are decided in table. 7
4. Register to /from Memory with Displacement:
– This type of instruction format contains one or two additional bytes for
displacement along with two byte the format of register to/form
memory without displacement.
5. Immediate Operand to register:
– In this format, the first byte as well as the 3 bits from the second byte
which are used for REG field in the case of register to register format
are used for opcode.
– It also contains one or two bytes of immediate data.
6. Immediate Operand to Memory with 16-bit displacement:
– This type of instruction format requires 5 or 6 bytes for coding.
– The first 2 bytes contain the information regarding OPCODE, MOD,
and R/M.
– The remaining 4 bytes contain 2 bytes of displacement and 2 bytes of
data.
8
Register to Register:
Register to/from Memory with no Displacement:
Register to /from Memory with Displacement:
Immediate Operand to register:
Immediate Operand to Memory with 16-bit displacement:
9
• The MOD, R/M, REG and the W field are given as:-
10
• Assignment of codes with different registers
11
Software
• The sequence of commands used to tell a microprocessor what to do is
called a program,
• Each command in a program is called an instruction
• A program written in machine language is referred to as machine code
ADD AX, BX
(Opcode) (Destination operand) (Source operand )
LABEL: INSTRUCTION ; COMMENT

Address identifier Does not generate any
machine code
Ex. START: MOV AX, BX ; copy BX into AX
12
Addressing Modes Of 8086 [1]
• Addressing mode indicate a way of locating data or operands.
• Depending upon data types used in the instruction and the memory
addressing modes, any instruction may belong to one or more addressing
modes, or some instruction may not belong to any of the addressing
mode.
• Thus the addressing modes describes the types of operand and the way
they are accessed for executing an instruction.
• According to the flow of instruction execution, the instruction may be
categorized as
– Sequential control flow instruction and
– Control transfer instruction.
• Sequential execution, transfer control to the next instruction appearing
immediately after it (in the sequence) in the program.
• The control transfer instruction, on the other hand, transfer control to
some predefined address or the address somehow specified in the
instruction after their execution.
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1. Immediate In this type of addressing, immediate data is a
part of instruction ,and appears in the form of the
successive byte.
Example: MOV AX,0005H
– In this example, 0005H is the immediate data. The immediate data

may be 8-bit in the size.
2. Direct In the direct addressing mode, a 16-bit memory

address is directly specified in the instruction as a part of it.
Example: MOV AX,[5000H]
– Here data resides in a memory location in the data segment, whose

effective address may be computed using 5000H as the offset
address and content of DS as segment address.
14
3. Register: In the register addressing mode, the data is stored in a
register and it is referred using the particular register. All the registers,
except IP, may be used in this mode.
Example: MOV BX, AX
4. Register Indirect: Sometimes the address of memory location which

contain data or operand is determined in an indirect way, using the
offset register.
– This mode of addressing is known as register indirect mode.
– In this addressing mode the offset address of data is in either BX or
SI or DI register.
Example: MOV AX,[BX]
– The default segment is either DS or ES.

– Here, data is present in a memory location in DS whose offset
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address is in BX.
5. Indexed: In this addressing mode offset of the operand is stored
in one of the index register.
– DS is the default segment for index register SI and DI.
– In case of string instruction DS and ES are default segment for
SI and DI respectively.
Example: MOV AX,[SI]
– Here data is available at an offset address stored in SI in
DS.
6. Register Relative: In this addressing mode the data is
available at an effective address formed by adding an 8-bit or 16-
bit displacement with the content of any one of the register BX,
BP,SI and DI in the default (either DS or ES) segment.
Example: MOV AX,50H[BX]
– Here the effective address is given as
10H*DS+50H+[BX].
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7. Based Indexed: The effective address of data is formed, in this
addressing mode, by adding content of base register (any one of BX or
BP) to the content of an index register (any one of SI or DI).
The default segment register may be ES or DS.
Example: MOV AX, [BX] [SI]

– Here BX is the base register and SI is the index register.
8. Relative Based Index: The effective address is formed by adding an 8 or
16bit displacement with sum of content of any one of the base register
(BX or BP) and any one of the index register, in a default segment.
Example: MOV AX, 50H [BX] [SI]

– Here 50H is an immediate displacement, BX is a base register and SI
is an Index register.
17
For the control transfer instructions, the addressing mode

depend upon whether the destination location is within
the same segment or in a different one.
– Basically, there are two addressing modes for the control
transfer instruction, viz. intersegment and intrasegment
addressing mode.
– If the location to which the control is to be transferred lies
in a different segment other than the current one, the
mode is called intersegment mode.
– If the destination location lies in the same segment the
mode is called intrasegment mode.
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10.Intrasegment Indirect Mode:
In this mode, the displacement to which the control is to be transferred, is in
the same segment in which the control transfer instruction lies ,but it is
passed to the instruction indirectly.
Here the branch address is found as the content of a register or memory
location. This addressing mode may be used in the unconditional branch
instruction.
Example: JMP [BX]; jump to effective address stored in BX register.
11.Intersegment Direct: In this mode, the address to which the control is

to be transferred is in a different segment. This addressing mode
provides a means of branching from one code segment to another code
segment. The CS and IP of the destination address are specified directly
in the instruction.
Example JMP 5000H :2000H;

– Jump to effective address 2000H segment 5000H.
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12.Intersegment indirect: In this mode the address to which
the control is to be transferred lies in a different segment
and it is passed to the instruction indirectly, i. e. IP(LSB)
and CS (MSB) sequentially.
Example JMP [2000H];

– The starting address of the memory block may be
referred using any of the addressing modes, except
immediate mode.
– Jump to an address in the other segment specified at
effective address 2000H in DS , that points to the
memory block as said above.
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Instruction Set Of 8086/8088
• The categories of 8086/8088 instructions are.
1. Data Copy/Transfer Instruction: These are used to transfer data

from source operand to destination operand.
2. Arithmetic and Logical Instruction: These instructions perform
arithmetic, logical, increment, decrement, compare and scan
operations.
3. Branch instruction: These instruction transfer control of execution to
the specified address.
4. Loop Instruction: These instructions are used to implement
unconditional and conditional loops.
5. Machine control instruction: These instruction control the machine
status.
6. Flag Manipulation Instruction: All the instruction which directly affect
flag register, come under this group of instruction.
7. Shift and Rotate Instruction: These instruction involve the bitwise
shifting or rotation in either direction with or without count.
8. String Instruction: These instruction involve various string
manipulation operation like load, MOVE, scan, compare, etc. These
instructions are only to be operated upon the strings.
21
Data copy/Transfer Instruction
• MOV: Move
– This data transfer instruction transfers data from one register/memory location to
another register/memory location.
– The source may be any one of the segment register or other general or special
purpose register or a memory location and, another register or memory location
may act as destination.
– However in the case of immediate addressing mode ,a segment register cannot be a
destination register.
– To load the segment register with immediate date, one will have to load any general
purpose register with the data and then it will have to be moved to that particular
segment register.
• Examples:
MOV AX, 5000H; Immediate

MOV AX,BX Register
MOV AX, [SI]; Indirect
MOV AX, [2000H]; Direct
MOV AX, 50H[BX]; Based relative, 50H Displacement
MOV DS, 5000H; Not permitted (invalid)
– Thus to transfer an immediate data in to the segment register, we perform the

operation
MOV AX, 5000H

MOV DS, AX
22
 MOV Instruction - The MOV instruction copies a
word or a byte of data from a specified source to a
specified destination .
MOV op1, op2

Example:
 MOV CX, 037AH ; MOV 037AH into the CX.

 MOV AX, BX ; Copy the contents of register BX
;to AX
 MOV DL,[BX] ; Copy byte from memory at BX
to DL ( BX contains the offset of
byte in DS).
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8086 Microprocessor
1. Data Transfer Instructions
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
MOV reg2/ mem, reg1/ mem
MOV reg2, reg1 (reg2)  (reg1)

MOV mem, reg1 (mem)  (reg1)
MOV reg2, mem (reg2)  (mem)
MOV reg/ mem, data
MOV reg, data (reg)  data

MOV mem, data (mem)  data
XCHG reg2/ mem, reg1
XCHG reg2, reg1 (reg2)  (reg1)

XCHG mem, reg1 (mem)  (reg1)
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MOV Example
• MOV AX,1000h
• MOV [100h],AX
• MOV BX,[0100h]
• MOV BYTE PTR [0200h],10h

• MOV WORD PTR [0300h],10h
• MOV AX,2300h
• MOV DS,AX
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MOV : 16 / 8 Bit register
To move value

between registers,
their size must be
the same.
MOV : Memory
Given only offset where to put value, it will

automatically select DS as the segment register.
27
Byte ordering : Little endian
• Since, x86’s byte

ordering is little
endian.
• Therefore, the LSB
will be placed at
lowest address and
MSB will be placed at
highest address.
28
Data Transfer Instructions - MOV
Mnemonic Meaning Format Operation Flags affected
MOV Move Mov D,S (S)  (D) None
Destination Source
Memory Accumulator
Accumulator Memory
NO MOV
Register Register Memory Memory
Register Memory Immediate Segment Register
Memory Register Segment Register Segment Register
Register Immediate
Memory Immediate
Seg reg Reg 16
Seg reg Mem 16
Reg 16 Seg reg
Memory Seg reg
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• XCHG: Exchange
– This instruction exchanges the contents of the specified source and
destination operands, which may be registers or one of them may be a
memory location.
– However, exchange of contents of two memory locations is not
permitted. Immediate data also not allowed in these instructions .
– XCHG [5000H], AX; This instruction exchanges data between AX and a

memory location [5000h] in the data segment.
– XCHG BX, AX; This instruction exchanges data between AX and BX.
• IN: Input the port

– This instruction is used for reading an input port.
– The address of the input port may be specified in the instruction directly or
indirectly.
– AL and AX are the allowed destinations for 8 and 16 bit operations.
– If the port address is 16 bits it must be in DX.
– IN AL, 03H; This instruction reads data from an 8 bit port whose address is
03h and stores it in AL.
– IN AX, DX; This instruction reads data from a 16 bit port whose address is in
DX (implicit) and stores it in AX.
30
Data Transfer Instructions - XCHG
Mnemonic Meaning Format Operation Flags affected
XCHG Exchange XCHG D,S (S) (D) None
Destination Source
Accumulator Reg 16
Example: XCHG START [BX]
Memory Register
Register Register
Register Memory NO XCHG
MEMs
SEG REGs
31
• XCHG Instruction - The Exchange instruction
XCHG op1, op2
• The both operands must be the same size and one of
the operand must always be a register .
• Example:
• XCHG AX, DX ;Exchange word in AX with word in DX
• XCHG BL, CH ;Exchange byte in BL with byte in CH
• XCHG AL, Money [BX] ;Exchange byte in AL with
byte in memory at EA.
32
 IN Instruction - This IN instruction will copy data
from a port to the AL or AX register.
 For the Fixed port IN instruction type the 8 – bit
port address of a port is specified directly in the
instruction.
Example:
 IN AL,0C8H ;Input a byte from port 0C8H to AL
 IN AX, 34H ;Input a word from port 34H to AX
 A_TO_D EQU 4AH

 IN AX, A_TO_D ;Input a word from port 4AH to AX
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 For a variable port IN instruction, the port address
is loaded in DX register before IN instruction.
DX is a 16 bit register.
 Port address range from 0000H – FFFFH.
Example:
 MOV DX, 0FF78H ; Initialize DX point to port

 IN AL, DX ; Input a byte from an 8 bit
port 0FF78H to AL
 IN AX, DX ; Input a word from 16 bit port
0FF78H to AX.
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• OUT: Output to the Port
– This instruction is used for writing to an output port.
– The address of the output port may be specified in the instruction
directly or implicitly in DX.
– Contents of AX or AL are transferred to a directly or indirectly
addressed port after execution of this instruction.
– The data to an odd addressed port is transferred on D8- D15 while
that to an even addressed port is transferred on D0-D7.
– The registers AL and AX are the allowed source operands for 8 bit
and 16 bit operations respectively.
– If the address is of 16 bits it must be in DX.
– OUT 03H, AL; This sends data available in AL to a port whose
address is 03H.
– OUT DX,AX; This sends data available in AX to a port whose address
is specified implicitly in DX.
• XLAT: Translate
– The translate instruction is used for finding out the address codes in
case of code conversion problem, using look up table technique.
35
 OUT Instruction - The OUT instruction copies a byte
from AL or a word from AX or a double from the accumulato
to I/O port specified by op.
 Two forms of OUT instruction are available :
(1) Port number is specified by an immediate byte
constant, ( 0 - 255 ).It is also called as fixed port form.
(2) Port number is provided in the DX register ( 0 –
65535 )
Example:
(1)
OUT 3BH, AL ; Copy the contents of the AL to port 3Bh
OUT 2CH,AX ; Copy the contents of the AX to port 2Ch
(2)
MOV DX, 0FFF8H ; Load desired port address in DX
OUT DX, AL ; Copy the contents of AL to FFF8h
OUT DX, AX ; Copy content of AX to port FFF8H
36
IN OUT
• IN AL,03H
• IN AX,DX
• MOV DX,0800H
IN AX,DX
• OUT 03H,AL
• OUT DX,AX
• MOV DX,0800H
OUT DX,AX
37
8086 Microprocessor
Instruction Set
IN A, [DX] OUT [DX], A
IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

(AL)  (PORT) (PORT)  (AL)
IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

(AX)  (PORT) (PORT)  (AX)
IN A, addr8 OUT addr8, A
IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)
IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)
38
The XLAT Instruction
Mnemonic Meaning Format Operation Flags
XLAT Translate XLAT ((AL)+(BX)+(DS)0)  (AL) None
Example:
Assume (DS) = 0300H, (BX)=0100H, and (AL)=0DH

XLAT replaces contents of AL by contents of memory location with
PA=(DS)0 +(BX) +(AL)
= 03000H + 0100H + 0DH = 0310DH
Thus
(0310DH)  (AL)
39
• Push: Push to stack
– This instruction pushes the content of the specified register/memory location on to the
stack.
– The stack pointer is decremented by 2, after each execution of the instruction.
– The actual current stack-top is always occupied by the previously pushed data.
– Hence, the push operation decrements SP by two and then stores the two byte content
of operands on to the stack.
– The higher byte is pushed first and then the lower byte.
– Thus out of two decremented stack address the higher byte occupies the higher
address and the lower byte occupies the lower address.
• The actual operation takes place as SS:SP points to the stack top of 8086 system
as shown in figure and AH, AL contain data to be pushed.
40
• Push: Push to stack
– The sequence of operations are:
• Current stack top is already occupied so decrement SP by one then store
AH into address pointed to by SP.
• Further decrement SP by one and store AL in to the location pointed by
SP.
– Thus SP is decremented by 2 and AH-AL contents are stored in stack
memory as shown in figure
– Now contents of SP points to a new stack top.
– Example
• PUSH AX
• PUSH DS
• PUSH [5000H]; content of location 5000H and 5001 H in DS are pushed
on to stack.
• To read the contents for the stack memory POP instruction is used.
41
• POP: Pop from stack
– This instruction when executed, loads the specified register/ memory location with the
content of the memory location of which the address is formed using the current stack
segment and stack pointer as usual.
– The stack pointer is incremented by 2.
– The POP instruction serves exactly opposite to PUSH instruction.
• The sequence of operation is as below:
– Contents of stack memory location is stored in AL and SP incremented by one.
– Further contents of memory location pointed by SP are copied to AH and SP is again
incremented by 1.
– Effectively SP is incremented by 2 and points to next stack top.
• The example of these instructions are shown follows
– POP AX
– POP DS
– POP [5000H]
42
8086 Microprocessor
PUSH reg16/ mem
PUSH reg16 (SP)  (SP) – 2

MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (reg16)
PUSH mem (SP)  (SP) – 2

MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (mem)
POP reg16/ mem
POP reg16 MA S = (SS) x 1610 + SP

(reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2
POP mem MA S = (SS) x 1610 + SP

(mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2
43
PUSH POP
PUSH AX POP AX
PUSH DS POP DS
PUSH[5000] POP[5000]
44
• LEA: Load effective address
– The load effective address instruction loads the effective address
formed by destination operand into the specified source register.
• LEA BX, ADR; Effective address of label ADR i.e. offset of ADR
will be transferred to Register BX.
• LEA SI, ADR [BX]; offset label ADR will be added to content of BX
to form effective address and it will be loaded in SI.
• LDS/LES: Load pointer to DS/ES
– This instruction loads the DS or ES register and the specified destination
register in the instruction with the content of memory location specified as
source in the instruction.
– Ex: LDS BX, 5000H/LES BX, 5000H
45
Data Transfer Instructions – LEA, LDS, LES
Mnemo Meaning Format Operation Flags
nic affected
LEA Load LEA Reg16,EA EA  (Reg16) None
Effective
Address
LDS Load LDS Reg16,MEM (MEM)  (Reg16) None
Register
And DS (Mem+2)  (DS)
LES Load LES Reg16,MEM (MEM)  (Reg16) None

Register
and ES (Mem+2)  (ES)
LEA SI DATA (or) MOV SI Offset DATA

46
• LAHF: Load AH from lower byte of flag
– This instruction loads the AH register with the lower byte of the flag register.
– This command may be used to observe the status of all the condition code flags
(except overflow) at a time.
• SAHF: Store AH to Lower Byte of flag register

– This instruction sets or resets the condition code flags (except overflow) in the
lower byte of flag register depending upon the corresponding bit positions in AH.
– If a bit in AH is 1, the flag corresponding to the bit position is set,else reset.
• PUSHF: Push Flags to Stack

– The push flag instruction pushes the flag register on to the stack; first the upper
byte and then the lower byte is pushed on to it.
– The SP is decremented by 2, for each push operation.
– The general operation of the is instruction is similar to the PUSH operation.
• POPF: Pop flags from stack

– The pop flag instruction loads the flag register completely (both bytes) from the
word contents of the memory location currently addressed by SP and SS.
– The SP is incremented by 2, for each push operation
47
Arithmetic instructions
• These instructions perform the arithmetic operations, like addition,
subtraction, multiplication and division along with the respective ASCII
and decimal adjust instructions.
• The increment and decrement also belong to this type of instructions.
• ADD: Add
– This instruction adds the immediate data or contents of the memory locations
specified in the instruction or a register (source ) to the contents of the
another register (destination) or memory location.
– The result is in the destination operand. However, both the source and
destination operands can not be memory operands.
– That means memory to memory addition is not possible. Also contents of
segment register can not be added using this instruction.
– Flag register entries will get affected due to this istruction.
– Examples:
1. ADD AX, 0100H Immediate

2. ADD AX, BX Register
3. ADD AX, [SI] Register Indirect
4. ADD AX, [5000H] Direct
5. ADD [5000H], 0100H Immediate
6. ADD [5000H], [0100H] Invalid instruction
48
• ADC: Add with Carry
– This instruction performs same operation as ADD instruction, but adds
the carry flag bit (which may be set as a result of the previous
calculations) to the result.
– All the condition code flags effected by this instruction.
– Examples:
– ADC 0100H Immediate (AX implicit)

– ADC AX, BX Register
– ADC AX, [SI] Register Indirect
– ADC AX, [5000H] Direct
– ADC [5000H], 0100H Immediate
• INC : Increment
– This instruction increases the contents of the specified register or
memory location by 1.
– All the condition code flags are affected except the carry flag CF.
– This instruction adds 1 to the contents of the operand.
– Immediate data cannot be operand of this instruction.
– INC AX Register
– INC [BX] Register Indirect
– INC [5000H] Direct 49
• DEC: Decrement :
– The decrement instruction subtracts 1 from the contents of the specified
register or memory location.
– All the condition code flags, except the carry flag, are affected depending
upon the results.
– Immediate data cannot be operand of this instruction.
– DEC AX Register
– DEC [5000H] Direct
• SUB: Subtract
– The subtract instruction subtracts the source operand from the destination
operand and result is left in destination operand.
– Source operand may be a register, memory location or immediate data and
the destination operand may be a register or a memory location, but source
and destination operands both must not be memory operands.
– Destination operand can not be an immediate data.
– All the condition code flags are effected by this instruction.
– SUB AX, 0100H Immediate [destination AX]

– SUB AX, BX Register
– SUB AX, [5000H] Direct
– SUB [5000H], 0100H Immediate
50
• SBB: Subtract with Barrow
– The Subtract with Barrow instruction subtracts the source operand and the borrow flag
(CF) which may be reflect the result of previous calculations, from the destination
operand.
– Subtract with Barrow, here means subtracting 1 from the subtraction obtained by SUB,
if carry (borrow) flag is set.
– The result stored in destination operand. All flags are effected (condition code) by this
instruction.
– SBB AX, 0100H Immediate [destination AX]
– SBB AX, BX Register
– SBB AX, [5000H] Direct
– SBB [5000H], 0100H Immediate
• CMP: Compare
– This instruction compares the source operand, which may be a register or an
immediate data or a memory location, with a destination operand that may be register
or memory location.
– For comparison, it subtracts the source operand from destination operand but does not
stores the result anywhere.
– The flags are affected depending upon the result of subtraction.
– If both operands are equal, zero flag is set. If source operand is greater than destination
operand carry flag is set or else carry flag is reset.
– CMP BX, 0100H Immediate

– CMP AX, 0100H Immediate
– CMP [5000H], 0100H Direct
– CMP BX, [SI] Register Indirect
– CMP BX, CX Register 51
• AAA: ASCII Adjust After Addition:
– The AAA instruction executed after ADD instruction that adds two ASCII
coded operands to give a byte of result in AL.
– The AAA instruction converts the resulting contents of AL to unpacked
decimal digits.
– After the addition, the AAA instruction examines the lower 4 bits of Alto check
whether it contains the valid BCD number in the range 0 to 9.
– If it is between 0 to 9 and AF is zero, AAA sets the 4 high order bits of AL to 0.
– The AH must be cleared before addition.
– If the lower digit of AL is between 0 to 9 and AF is set, 06 added to AL.
52
– If the lower digit of AL is between 0 and 9 and AF is set, 06 is added to AL.
– The upper 4 bits of AL are cleared and AH is incremented by one.
– If the value in lower nibble of AL is greater than 9 then the AL is incremented
by 06,AH is incremented by 1 the AF and CF flags are set to 1, and the higher
4 bits of AL are cleared to 0.
– The remaining flags are unaffected.
– The AH is modified as sum of previous content (usually 00) and carry from the
adjustment.
– This instruction does not give exact ASCII codes of the sum, but they can be
obtained by adding 3030H to AX.
• AAS:ASCII Adjust AL after Subtraction

– AAS instruction correct the result in AL register after subtracting two unpacked
ASCII operands.
– The result is in unpacked decimal format.
– If the lower 4bits of AL register are greater than 9 or if the AF flag is 1,
– The AL is decremented by 1, the CF and AF are set to 1, otherwise the CF
and AF are set to 0.
– The result need no correction. As a result the upper nibble of AL is 00 and the
lower nibble may be any number from 0 to 9. The procedure is similar to the
AAA instruction except for the subtraction of 06 from AL.
– AH is modified as difference of previous contents (usually 0) of AH and borrow
for adjustment.
53
• AAM:ASCII Adjust after Multiplication
– This instruction after execution converts the products
available in AL in to unpackaged BCD format.
– The AAM instruction follows a multiplication instruction
that multiplies two unpacked BCD operands i.e. higher
nibbles of the multiplication operands should be 0.
– The multiplication of such operands is carried out using
MUL instruction.
– Obviously the result of multiplication is available in AX.
– The following AAM instruction replaces content of AH by
tens of decimals multiplication and AL by singles of the
decimal multiplication.
– MOV AL , 04 ; AL ← 04
– MOV BL, 09 ; BL ← 09
– MUL BL ; AH-AL ← 24H(9*4)
– AAM ; AH ←03; AL ← 06
54
• AAD:ASCII Adjust before Division
– Though the names of these two instruction (AAM and
AAD) appear to be similar there is a lot of difference
between their function.
– The AAD instruction converts two unpacked BCD digits in
AH and AL to the equivalent binary number in AL.
– This adjustment must be made before dividing the two
unpacked BCD digits in AX by an unpacked BCD byte.
– PF, SF, ZF are modified while AF, CF, OF are undefined,
after the execution of instruction AAD.
– In the instruction sequence this instruction appears before
DIV instruction unlike AAM appears after MUL.
– The examples explains the execution of the instruction.
– Let AX contents as 0508H
– AAD; Result in AX will be 003AH
55
Packed BCD & Unpacked BCD
• The Intel Instruction set can handle both packed (two digits
per byte) and unpacked BCD (one decimal digit per byte)
• We will first look at unpacked BCD
• Unpacked BCD can be either binary or ASCII.
• Consider the number 4567
Bytes then look like 34h 35h 36h 37h OR: 04h 05h 06h 07h
• In packed BCD where there are two decimal digits per byte
• 99h = 99d 4567d= 4567d
• Unpacked BCD representation contains only one decimal
digit per byte. The digit is stored in the least significant 4 bits;
the most significant 4 bits are not relevant to the value of the
represented number.
• Packed BCD representation packs two decimal digits into a
single byte.
56
• BCD takes more space and more time than
standard binary arithmetic
• It is used extensively in applications that deal with
currency because floating point representations are
inherently inexact
• Database management systems offer a variety of
numeric storage options; “Decimal” means that
numbers are stored internally either as BCD or as
fixed-point integers
• BCD offers a relatively easy way to get around size
limitations on integer arithmetic
57
Unpacked BCD Arithmetic
• With unpacked BCD we wish to add strings such as
'989' and '486' and come up with the string '1475'.
• With BCD you can use the standard input and
output routines for strings to get numbers into and
out of memory without converting to binary
• BCD arithmetic uses the standard binary arithmetic
instructions and then converts the result to BCD
using BCD adjustment instructions.
58
BCD Adjustment Instructions
• Four unpacked adjustment instructions are available:
AAA (ASCII Adjust After Addition)
•AAS (ASCII Adjust After Subtraction) AAM (ASCII
Adjust After Multiplication) AAD (ASCII ADjust
BEFORE Division)
•Except for AAD the instructions are used to adjust
results after performing a binary operation on
ASCII or BCD data
•AAD (in spite of the mnemonic) is used after a
DIV instruction
59
• DAA: Decimal Adjust Accumulator
– This instruction is used to convert the result of addition of two packed
BCD number to a valid BCD number.
– The result has to be only in AL, if the lower nibble is greater than 9,
after addition or if AF is set, it will add 06 to the lower nibble in AL.
– After addition 06 in the lower nibble of AL if the upper nibble of AL is
greater than 9 or if carry flag is set, DAA instruction adds 60H to AL.
– The instruction DAA affects AF, CF ,PF and ZF flags. The OF is
undefined.
• DAS: Decimal Adjust after Subtraction
– This instruction converts the result of subtraction of two packed BCD
numbers to a valid BCD number.
– The subtraction has to be in AL only, if the lower nibble of AL is
greater than 9 this instruction will subtract 06 from lower nibble of AL.
– If the result of subtraction sets the carry flag or if upper nibble is
greater than 9 it subtracts 60H from AL.
– This instruction modifies the AF, CF, SF, PF and ZF flags. The OF is
undefined after DAS instruction.
60
• NEG: Negate
– The negate instruction forms 2’s complement of the specified destination in
the instruction.
– For obtaining 2’s complement it subtracts the component of destination from
zero.
– The result is stored back in the destination operand which may be a register
or a memory location.
– If OF is set it indicates that the operation could not be completed successfully.
This instruction affects all the condition code flags.
• MUL: Unsigned Multiplication Byte or Word

– This instruction multiplies an unsigned bytes or word by the contents of AL.
– The unsigned byte or word may be in any one of the general purpose register
or memory location (Immediate operand not allowed)
– The most significant word of the result is stored in DX, while the least
significant word of the result is stored in AX.
– All the flags are modified depending upon the result.
– Example
• MUL BH ;(AX) ← (AL) * (BH)
• MUL CX ;(DX) (AX) ← (AX) * (CX)
• MUL WORD PTR[SI] ;(DX) (AX) ← (AX) * [SI]
61
• IMUL: Signed multiplication
– This instruction multiplies a signed byte in source operand by a signed byte in
AL or a signed word in source operand by a signed word in AX.
– The source can be a general purpose register, memory operand, index
register or base register, but it cannot be immediate data.
– In case of 32 bit result , the higher order word (MSW) is stored in DX and
lower order word is stored in AX.
– The AF, PF, SF and ZF flags are undefined after IMUL.
– If AH and DX contain parts of 16 and 32 bit result respectively CF and OF
both will be set.
– The AL and AX are the implicit operand in case of 8bits and 16bits
multiplication respectively.
– Example
– IMUL BH
– IMUL CX
– IMUL [SI]
• CBW: Convert Signed Byte or Word
– This instruction converts a signed byte to a signed word.
– In other words, it copies the sign bit of a byte to be converted to all bits in the
higher byte of the result word.
• CWD: Convert Signed Word to Double word
– This instruction copies the sign bit of AX to all the bits of DX register.
62
Multiplication and Division
63
64
MUL op
Example:
AL = 21h (33 decimal)
BL = A1h(161 decimal )
MUL BL ; AX =14C1h (5313 decimal),
since AH≠0,CF and OF will set to 1.
MUL BH ; AL times BH, result in AX

MUL CX ; AX times CX, result high word in DX,
low word in AX.
Example:
69 * 14
AL = 01000101 = 69 decimal
BL = 00001110 = 14 decimal
IMUL BL ;AX = 03C6H = + 966 decimal

MSB = 0 because positive result
IMUL BL ;AX = F98Ch = - 1652 decimal

MSB = 1 because negative result
Result is 2’s complement of the
no.
• DIV: Unsigned Division
– This instruction performs unsigned division.
– It divides an unsigned word or double word by a 16bit or 8bit operand.
– The dividend must be in AX for 16-bit operation and divisor may be
specified using any one of the addressing modes except immediate.
– The result will be in AL while AH will contain the remainder.
– In case of double word dividend (32-bit) the higher word should be in DX
and lower word should be in AX.
– The divisor may be specified as already explained.
– The quotient and the remainder, in this case will be in AX and DX
respectively.
– This instruction does not affect any flag.
• IDIV: Signed Division

– This instruction performs the same operation as the DIV instruction but with
signed operands.
– The result are stored similarly as in case of DIV instruction in both cases or
word and double word division.
– The result will also be signed numbers.
– The operands are also specified in the same way as DIV instruction.
– Divide by 0 interrupt is generated, if the result is too big to fit in AX (16-bit
dividend operation) or AX and DX (32-bit dividend operation).
– All the flags are undefined after IDIV instruction.
67
DIV Instruction - This instruction is used to divide an
Unsigned word by a byte or to divide an unsigned
double word by a word.
When dividing a word by a byte , the word must

be in the AX register.
After the division AL will contains an 8- bit result
(quotient) and AH will contain an 8- bit remainder.
If an attempt is made to divide by 0 or the quotient is

too large to fit in AL ( greater than FFH ), the 8086
will automatically do a type 0 interrupt .
Example:
DIV BL ;Word in AX / byte in BL
Quotient in AL . Remainder in AH. 68
When a double word is divided by a word,
the most significant word of the double word must
be in DX and the least significant word of the double
word must be in AX.
After the division AX will contain the 16 –bit result

(quotient ) and DX will contain a 16 bit remainder.
Again , if an attempt is made to divide by zero or

quotient is too large to fit in AX (greater than FFFFH )
the 8086 will do a type of 0 interrupt .
Example:
DIV CX ; (Quotient) AX= (DX:AX)/CX
(Reminder) DX=(DX:AX)/CX
69
Example:
AX = 37D7H = 14, 295 decimal
BH = 97H = 151 decimal
DIV BH ;AX / BH
AX = Quotient = 5EH = 94 decimal
AH = Remainder = 65H = 101 decimal
IDIV Instruction - This instruction is used to divide a
signed word by a signed byte or to divide a signed double
word by a signed word.
Example:
IDIV BL ;Signed word in AX is divided by signed byte in BL
Example
IDIV BP ;divide a Signed double word in DX and
AX by signed word in BP
IDIV BYTE PTR[BX] ; divide AX by a byte at offset [BX] in DS
• A signed word divided by a signed byte

AX = 00000011 10101011 = 03ABH = 39 decimal
BL = 11010011 = D3H = - 2DH = - 45 decimal
IDIV BL; Quotient AL= ECH = - 14H = -20 decimal

Remainder AH = 27H = + 39 decimal
71
72
Logical instructions
• These types of instructions are used for carrying out the bit by bit shift ,
rotate or basic logical operation. All the condition code flags are affected
depending upon the result. Basic logical operation available with 8086
instruction set are AND, OR, NOT, and XOR.
• AND: Logical AND
– This instruction bit by bit ANDs the source operand that may be an immediate,
a register or a memory location to the destination operand that may be
register or memory location.
– The result is stored in the destination operand. both the operands cannot be
memory location or immediate operands.
– Example
– AND AX, 0008H
– AND AX, BX
• OR: Logical OR
– The OR instruction carries out the OR operation in the same way as described
in case of AND operation.
– The limitation on source and destination operands are also the same as in the
case of AND operation.
– Examples
– OR AX, 0098H
– OR AX, BX
– OR AX, [5000H]
73
• NOT: Logical Invert
– The NOT instruction complements the content of an operand register or a
memory location, bit by bit.
• NOT AX
• NOT [5000H]
• XOR: Logical Exclusive OR

– The XOR operation is again carried out in a similar way to the AND and OR
operation.
– The constraints in the operands are also similar. The XOR operation gives a
high output when the two input bits are dissimilar. Otherwise the output is zero.
• XOR AX,0098H
• XOR AX,BX
• TEST: Logical Compare Instruction

– The TEST instruction performs a bit by bit logical AND operation on the two
operands. Each bit of the result is then set to 1 if the corresponding bits of both
operands are 1,else the result bit is reset to 0.
– The result of this ANDing operation is not available for further use, but flags are
affected.
– The affected flags are OF, CF, SF, ZF, and PF. The Operands may be register,
memory or immediate data.
• TEST AX, BX
• TEST [0500H], 06H
• TEST [BX] [DI], CX
74
• SHL/SAL: Shift Logical/Arithmetic Left
– These instruction shifts the operand word or byte , bit by bit to the left and insert
zeros in the newly introduced least significant bits.
– In case of all SHIFT and ROTATE instruction, the count is either 1 or specified
by register CL.
– The operand may reside in a register or memory location but cannot be
immediate data. All the flags are affected depending upon the result.
• SHR: Shift Logical Right

– This instruction performs bit-wise right shifts on the operand word or byte that
may reside in a register or memory location, by the specified count in the
instruction and inserts zeroes in the shifted position.
– The result is stored in the destination operand.
• SAR: Shift Arithmetic Right

– This instruction performs right shift on the operand word or byte, that may be
register or memory location by the specified count in the instruction.
– It inserts the most significant bit of the operand in the newly inserted
position. The result is stored in the destination operand.
– This shift operation shifts the operand through the carry flag.
– All the condition code flags are affected.
• Immediate operand is not allowed in any of the shift instruction.

75
SHL/SAL: Shift Logical/Arithmetic Left
SHR: Shift Logical Right
76
SAR: Shift Arithmetic Right
• ROR: Rotate Right without Carry

− This instruction rotates the contents of the destination operand to the right
(bitwise) either by one or by the count specified in CL Excluding carry.
− The least significant bit is pushed in to the carry flag and simultaneously it is
transferred in the most significant bit position at each operation.
− The remaining bits are shifted right by the specified position.
− The PF, SF and ZF flags are left unchanged by rotate operation.
− The operand may be a register or a memory location but it cannot be an
immediate operand.
77
• ROL: Rotate Left without Carry
• This instruction rotates the content of destination operand to the left by the specified
count (bit-wise) excluding carry.
• The most significant bit is pushed in to the carry flag as well as the least significant
bit position at each operation.
• The remaining bits are shifted left subsequently by the specified count position.
• The PF, SF and ZF flags are left unchanged in this rotate operation.
• The operand may be a register or a memory location.
• RCR: Rotate Right through Carry

• This instruction rotates the contents (bit-wise) of the destination operand right by the
specified count through carry flag.
• For each operation the remaining bits are shifted right by the specified count position.
• The SF, PF and ZF are left unchanged.
• The operand may be register or memory location.
• RCL: Rotate Left through Carry

• This instruction rotates (bit-wise) the contents of the destination operand left by the
specified count through the carry flag.
• For each operation the carry flag is pushed in to LSB, and the MSB of the operand is
pushed in to carry flag.
• The remaining bits are shifted left by the specified position.
• The SF, PF and ZF are left unchanged.
• The operand may be register or memory location.
78
ROR: Rotate Right
without Carry
ROL: Rotate Left

without Carry
RCR: Rotate Right

through Carry
RCL: Rotate Left

through Carry
79
String Manipulation Instruction
• A series of data bytes or words available in memory at consecutive
location, to be referred to collectively or individually, are called as byte
string or word string.
• For example a string of a character may be or located in consecutive
memory location where each character may be represented by its ASCII
equivalent.
• For referring to string, two parameters are required (a) starting or end
address of string (b) length of string.
• The length of string usually stored as a count in CX register.
• The incrementing or decrementing of pointer in case of 8086 string
instruction depends upon the direction flag status.
• If it is a byte string operation the index register are updated by one.
• If it is word string operation the index register are updated by two.
• The counter in both cases, is decremented by one.
• REP: Repeat Instruction Prefix

– This instruction is used as a prefix to other instruction.
– The instruction to which the REP prefix is provided is executed repeatedly
until the CX register becomes Zero.
– When CX becomes zero the execution proceeds to the next instruction in
sequence.
80
• MOVSB/MOVSW: Move String Byte or String Word
– Suppose a string of bytes stored in a set of memory location to be moved
to another set of destination location.
– The starting byte of the source string is located in the memory location
whose address may be computed using SI (source index) and DS (data
segment) contents.
– The starting address of the destination location where this string has to be
relocated is given by DI (destination index) and ES (extra segment) contents.
– The starting address of source string is 10H*DS+[SI], while the starting
address of the destination string is 10H*ES+[DI].
– The MOVSB/MOVSW instruction moves a string of bytes /words pointed to by
DS:SI (source) pair to the memory location pointed to by ES:DI pair
(destination).
– The length of the byte string or word string must be stored in CX
register.
– No flags are affected by this instruction.
– After the MOVS instruction is executed once, the index register are
automatically updated and CX is decremented.
– The incrementing or decrementing of pointer i.e. SI and DI depend upon the
direction flag DF.
– If DF is 0, the index register are incremented, otherwise they are
decremented in case of all the string manipulation instruction.
81
1. Example for MOVSB 2. Example for MOVSB
– MOV AX, 2000H – MOV AX, 5000H
– MOV DS, AX – MOV DS, AX
– MOV AX, 3000H – MOV AX, 3000H
– MOV ES,AX – MOV ES,AX
– MOV CX, 00FFH – MOV CX, 00FFH
– MOV SI, 1000H – LEA SI, SOURCE_STRING
– MOV DI, 2000H – LEA DI, DESTIN_STRING
– CLD – CLD
– REP MOVSB – REP MOVSB
82
• CMPS: Compare String Byte or String
– The CMPS instruction can be used to compare two string of bytes or
words.
– The length of the string must be stored in a register CX.
– If both the byte or word string are equal, zero flag is set.
– The flags are affected in same way as CMP instruction.
– The DS:SI point to the two string.
– The REP instruction prefix is used to repeat the operation till CX
becomes zero
• SCAS: Scan String Byte or String Word
– This instruction scans string of byte or words for an operand byte or
word specified in the register AL or AX.
– The string is pointed to by ES; DI register pair.
– The length of the string is stored in CX.
– The DF controls the mode for scanning of the string.
– Whenever a matched to the specified operand, is found in the string,
execution stops and zero flag is set.
– If no match is found, the zero flag is reset.
83
• Example for CMPSB 2. Example for SCAS
– MOV AX, 2000H
– MOV DS, AX – MOV AX, 5000H
– MOV AX, 3000H – MOV ES, AX
– MOV ES,AX – MOV CX, 00FFH
– MOV CX, 00FFH – LEA DI, DESTIN_STRING
– MOV SI, 1000H – CLD
– MOV DI, 2000H – REPNE SCASW
– CLD
– REP CMPSB
84
• LODS: Load String Byte or String Word
– The LODS instruction loads the AL /AX register by the content of a string pointed to by
DS;SI register pair.
– The SI is modified automatically depending upon DF.
– The DF plays exactly to same role as in case of MOVSB/MOVSW instruction.
– If it is a byte transfer (LODSB), the SI is modified by one and if it is a word transfer
(LODSW ), the SI is modified bye two.
– No other flags are affected by this instruction.
• STOS: Store String Byte or String Word

– The STOS instruction stores the AL/AX register contents to a location in string pointed
by ES:DI register pair.
– The DI is modified accordingly. No flags are affected by this instruction.
– The direction flag controls the string instruction execution.
– The source index SI and destination index DI are modified after each iteration
automatically. If DF is 1, then the execution follows auto decrement mode.
– In this mode SI and DI are decremented automatically after each iteration (by 1 or 2
depending upon byte or word operation).
– Hence, in auto decrement mode, the string are referred to by their ending addresses.
– If DF =0, then execution follows auto increment mode.
85
Control transfer or Branching Instruction
• The control transfer instructions transfer the flow of execution of the
program to a new address specified in the instruction directly or indirectly.
• When this type of instruction is executed, the CS and IP registers get

loaded with new values of CS and IP corresponding to the location where
the flow of execution is going to transferred.
• Unconditional control transfer (Branch) instruction

– In case of unconditional control transfer instructions, the execution control is
transferred to the specified location independent of any status or condition.
– The CS and IP are unconditionally modified to the new CS and IP.
• Conditional control transfer (Branch) instruction

– In the conditional control transfer instructions, the control is transferred to the
specified location provided the result of the previous operation satisfies a
particular condition.
– Other wise, the execution continues in normal flow sequence.
– The results of the previous operations are replicated by condition code flags.
86
SUBROUTINE & SUBROUTINE HANDILING INSTRUCTIONS
Main program
Subroutine A
First Instruction
Call subroutine A
Next instruction
Return
Call subroutine A
Next instruction
87
 A subroutine is a special segment of program that can be called for
execution from any point in a program.
 An assembly language subroutine is also referred to as a
“procedure”.
 Whenever we need the subroutine, a single instruction is inserted
in to the main body of the program to call subroutine.
 To branch a subroutine the value in the IP or CS and IP must be
modified.
 After execution, we want to return the control to the instruction
that immediately follows the one called the subroutine i.e., the
original value of IP or CS and IP must be preserved.
 Execution of the instruction causes the contents of IP to be saved
on the stack. (this time (SP)  (SP) -2 )
 A new 16-bit (near-proc, mem16, reg16 i.e., Intra Segment) value
which is specified by the instructions operand is loaded into IP.
 Examples: CALL 1234H 88
• Unconditional Branch Instructions
– CALL Unconditional Call
• This instruction is used to call a subroutine from a main program.
• There are again two types of procedures depending upon whether it
is available in the same segment (Near CALL, i.e. +/- 32K
displacement) or in other segment (FAR CALL, i.e. anywhere
outside the segment).
• The modes for them are called as intrasegment and intersegment
addressing modes respectively.
• On execution, this instruction stores the incremented IP (i.e.
address of the next instruction) and CS onto the stack and loads the
CS and IP registers, respectively, with the segment and offset
addresses of the procedure to be called.
• In case of NEAR CALL it pushes only IP register and in case of
FAR CALL it pushes IP and CS both onto the stack.
• The NEAR and FAR CALLS are discriminated using opcode.
89
CALL Instruction - This Instruction is used to transfer
execution to a subprogram or procedure. There are two
basic types of CALL ’s : Near and Far.
A Near CALL is a call to a procedure which is in the
same code segment as the CALL instruction .
When 8086 executes the near CALL instruction it
decrements the stack pointer by two and copies the offset
of the next instruction after the CALL on the stack.
This offset saved on the stack is referred as the return
address, because this is the address that execution will
returns to after the procedure executes.
A near CALL instruction will also load the instruction
pointer with the offset of the first instruction in the
procedure. 90
A Far CALL is a call to a procedure which is in a
different segment from that which contains the
CALL instruction .
When 8086 executes the Far CALL instruction it
decrements the stack pointer by two again and
copies the content of CS register to the stack.
It then decrements the stack pointer by two again and
copies the offset contents offset of the instruction
after the CALL to the stack.
Finally it loads CS with segment base of the segment
which contains the procedure and IP with the offset
of the first instruction of the procedure in segment. 91
• Inter Segment
– At starting CS and IP placed in a stack.

– New values are loaded in to CS and IP given by the
operand.
– After execution original CS, IP values placed as it
is.
Far-proc
Memptr32
These two words (32 bits) are loaded directly into IP
and CS with execution at CALL instruction.
First 16  IP
Next 16  CS 92
Mnem- Meaning Format Operation Flags
onic Affected
CALL Subroutine CALL operand Execution continues from none

call the address of the
subroutine specified by
the operand. Information
required to return back to
the main program such as
IP and CS are saved on
the stack.
Operand
Near-proc
Far – proc
Memptr 16
Regptr 16
Memptr 32
93
• RET: Return From the Procedure
– At each CALL instruction, the IP and CS of the next instruction is
pushed onto stack, before the control is transferred to the procedure.
– At the end of the procedure, the RET instruction must be executed.
– When it is executed, the previously stored content of IP and CS along
with flags are retrieved into the CS, IP and flag register from the stack
and execution of the main program continues further.
– The procedure may be a near or far procedure. In case of a FAR
procedure, the current contents of the SP points to IP and CS at the
time of return.
– While in case of a NEAR procedure, it points to only IP.
– Depending upon the type of procedure and the SP contents, RET

instruction is of four types:-
1. Return within segment.
2. Return within segment adding 16 bit immediate displacement to the SP
contents.
3. Return intersegment.
4. Return intersegment adding 16 bit immediate displacement to the SP
contents.
94
• INT: Interrupt Type N
– In the interrupt structure of 8086/8088, 256 interrupts are
defined corresponding to the types from 00H to FFH.
– When an INT N instruction is executed, the TYPE byte N
is multiplied BY 4 and the contents of IP and CS of the
interrupt service routine will be taken from the
hexadecimal multiplication (N * 4) as offset address and
0000 as segment address.
• INTO: Interrupt on Overflow

– This command is executed, when the overflow flag OF set.
– The new contents of IP and CS are taken from the
address 0000:0010 as explained in INT type instruction.
– This is equivalent to a Type 4 interrupt instruction.
95
• JMP: Unconditional Jump:
– This instruction unconditionally transfers the control of execution to the
specified address using an 8 bit or 16 bit displacement (intrasegment
relative, short or long) or CS:IP (intersegment direct far).
– No flags are affected by this instruction.
– Corresponding to the methods of specifying jump addresses, the JUMP
instruction may have the following three formats.
• IRET: Return from ISR

– When an interrupt service routine is to be called, before transferring control to
it, the IP, CS and flag register are stored on to the stack to indicate the
location from where the execution is to be continued, after the ISR is
executed.
– So at the end of each ISR, when IRET is executed, the values of IP, CS and
flags are retrieved from the stack to continue the execution of the main
program.
– The stack is modified accordingly.
96
• LOOP: Loop Unconditionally
– This instruction executes the part of the program from the label or address
specified in the instruction up to the loop instruction, CX number of times.
– The following sequence explains the execution.
– At each iteration, CX is decremented automatically.
– In other words, this instruction implements DECREMENT COUNTER and
JUMP IF NOT ZERO structure.
• Condition Branch instructions

– When these instructions are executed, execution control is transferred to
address specified relatively in the instruction, provided the condition implicit in
the opcode is satisfied.
– If not the execution continues sequentially.
– The conditions, here, means the status of condition code flags.
– These type of instructions do not affect any flag.
– The address has to be specified in the instruction relatively in terms of
displacement which must lie within 80H to 7FH bytes from the address of
branch instruction.
– In other words, only short jumps can be implemented using conditional branch
instructions.
– A label may represent the displacement, if it lies within above specified range.
97
98
•LOOP: Loop Conditionally
99
Flag Manipulation and Processor Control Instructions
• These instructions control the functioning of the available hardware inside
the processor chip.
• These are categorized into two types;
– (a) flag manipulation instructions and

– (b) machine control instructions.
• The flag manipulation instructions directly modify some of the flags of

8086.
• The machine control instructions control the bus usage and execution.
• These instructions modify the Carry (CF), Direction (DF) and Interrupt (IF)
flags directly.
• The DF and IF, which may be modified using the flag manipulation
instructions, further control the processor operation; like interrupt
responses and auto increment or auto decrement modes.
• Thus, the respective instructions may also be called machine or
processor control instructions.
• The other flags can be modified using POPF and SHAF instructions,
which are termed as data transfer instructions,
100
Flag manipulation Instructions
Sr. No. Instruction Function
1 CLC Clear carry flag
2 CMC Complement carry flag
3 STC Set carry flag
4 CLD Clear direction flag
5 STD Set direction flag
6 CLI Clear interrupt flag
7 STI Set interrupt flag
Flag manipulation Instructions

Sr. No. Instruction Function
1 WAIT Wait for test input pin to go low
2 HLT Halt the processor
3 NOP No operation
4 ESC Escape to external devices like numeric co-processor
5 LOCK Bus lock instruction prefix.
101
Programming with an Assembler
• A programmer called ‘assembler’ is used to convert the mnemonics of
instructions along with the data into their equivalent object code modules.
• These object code modules may further be converted in executable code using
the linker and load programs.
• This type of programming is called assembly level programming.
• In assembly language programming, the mnemonics are directly used in the user
programs.
• The assembler performs the task of coding.
• The advantages of assembly language over machine language are as follows:-
1. The programming in assembly language is not as complicated as in machine language

because the function of coding is performed by assembler.
2. The chances of error being committed are less because the mnemonics are used
instead of numerical opcodes. It is easier to enter an assembly language program.
3. As the mnemonics are purpose- suggestive the debugging is easier.
4. The constants and address locations can be labeled with suggestive labels hence
imparting a more friendly interface to user.
5. Advanced assemblers provide facilities like macros, lists etc. making the task of
programming much easier
6. The memory control is in the hands of users as in machine language
7. The results may be stored in a more user friendly form
8. The flexibility of programming is more in assembly language programming as compared
to machine language because of advanced facilities available with the modern
assemblers.
102
Programming with an Assembler
• Basically, the assembler is a program that converts an assembly input
file also called as source file to an object file that can further be
converted into machine codes or an executable file using linker.
• The recent versions of assembler are designed with many facilities like
macro assemblers, numerical processor assembler, procedure,
functions and so on.
• In book( RAY), the assembly language programming using MASM
(Microsoft Macro Assembler).
• There are a number of assemblers available like MASM, TASM and
DOS assembler.
• MASM is one of popular assemblers used along with a LINK program
to structure the code generated by MASM in the form of an executable
file.
• MASM reads the source programs its input and provides an object
file.
• The LINK accepts the object file produced by MASM as input and
produces EXE file.
103
Assembler Directives and Operators
• To make the programming on microprocessor simpler,
assemblers are used. The main role of the assembler is to
convert the assembly language program in to the machine
language program and in 8086 since the hand coding is a
tedious job mostly people follow the assembler for
programming the microprocessor.
• For completing the task of the assembly, assembler needs
some hints from the programmer i.e. the required storage
of particular constant or variable, logical names of the
segments, types of different subroutines or modules, end
of file etc.
• Such hints are given by the assembler directives.
• Another type of hint which helps the assembler to assign a
particular constant with a label or initialize particular memory
locations or labels with constants is an operator. 104
Assembler Directives
Instructions to the Assembler regarding the program being

executed.
Control the generation of machine codes and organization of

the program; but no machine codes are generated for
assembler directives.
Also called ‘pseudo instructions’

Used to
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..
105
Naming Data and addresses
Programs work with three general categories of data
Constants ,Variables and Addresses
Constants ,Variables and Addresses can be given

Names in your programs and assembler can use
these names to find a desired data or address when
referred to in a program.
Directives are for storage requirement of
 a particular constant or a variable
 Logical names of segments
 Types of different routines and modules
 End of file etc
106
 Assembler directives are specific for a
particular assembler
 However all the popular assemblers like
the Intel 8086 macro assembler, the turbo
assembler and the IBM macro assembler
use common assembler directives
107
• DB: Define Byte
– It is used to reserve byte or bytes of memory locations in the available memory
space.
• DW: Define Word (1 – word = 2 – bytes)
– It is used to reserve word or words of memory locations in the available memory
space.
• DD: Define Double Word (1 – double word = 4 – bytes)
– It is used to reserve word or words of memory locations in the available memory
space.
• DQ: Define Quad Word (1 – quad word = 8 – bytes)
– It is used to reserve two words of memory locations in the available memory
space.
• DT: Define Ten Bytes
– It is used to reserve ten bytes of memory locations in the available memory
space.
• Usage:
– RANKS DB 01H,02H,03H
– WORDS DB 1234H,0250H,03ABH
– LABEL1 DQ 1234567887654321H
– PLAYERS_RANKS DT 01H,02H,03H, 31H,22H,03H 21H,32H,07H 10H,
108
Assemble Directives ---for variables
Define Byte
Define a byte type (8-bit) variable

The DB directive is used to declare a byte-type variable or to set
aside one or more storage locations of type byte in memory .
Reserves specific amount of memory locations to each variable
Range : 00H – FFH for unsigned value; 00H – 7FH for positive value
and 80H – FFH for negative value
General form : variable DB value/ values

RANKS DB 01H,02H,03H(Reserves four memory locations for a list named
RANKS & initializes them with the four specified values)
MESSAGE DB ‘GOOD MORNING’
db “Hello” reserve 5 bytes, and initiallize ASCII equivalent of characters of
“Hello”.
109
• Multiple definitions can be abbreviated
Example:
message DB ’B’
DB ’y’
DB ’e’
DB 0DH
DB 0AH
can be written as
message DB ’B’,’y’,’e’,0DH,0AH
• More compactly as
message DB ’Bye’,0DH,0AH
8086 Microprocessor
Assemble Directives
Define Word
Define a word type (16-bit) variable

Reserves two consecutive memory locations to each
variable
Range : 0000H – FFFFH for unsigned value;
0000H – 7FFFH for positive value and 8000H – FFFFH for
negative value
General form : variable DW value/ values
The DD directive is used to declare a variable of type

doubleword or to reserve memory locations which can be
accessed as type doubleword (Define Doubleword)
The DQ directive is used to tell the assembler to declare

a variable 4 words in length or to reverse 4 words of
storage in memory (Define Quadword) 111
DUP
Allows a sequence of storage locations to be defined or reserved .
If you need to declare a large array you can use DUP operator.
The syntax for DUP:
number DUP ( value(s) )
number - number of duplicate to make (any constant value).
value - expression that DUP will duplicate.
for example:
DB 4 DUP(9) is an alternative way of declaring:
DB 9, 9, 9, 9,
DB 100 dup (?) define 100 bytes, with no initial values for bytes
Only used as an operand of a define directive
DB 40 DUP (?) ; 40 words, uninitialized
DW 10h DUP (0) ; 16 words, initialized as 0
Arrays
• Arrays can be seen as chains of variables. A text string is an
example of a byte array, each character is presented as an
ASCII code value (0..255).
• Here are some array definition examples:
a DB 48h, 65h, 6Ch, 6Ch, 6Fh, 00h
b DB 'Hello', 0
b is an exact copy of the a array, when compiler
sees a string inside quotes it automatically converts it to
set of bytes.
You can access the value of any element in array using

square brackets, for example:
• MOV AL, a[3]
113
Arrays
• Any consecutive storage locations of the same size
can be called an array
X DW 40CH,10B,-13,0
Y DB 'This is an array'
Z DD -109236, FFFFFFFFH, -1, 100B
• Components of X are at X, X+2, X+4, X+8
• Components of Y are at Y, Y+1, …, Y+15
• Components of Z are at Z, Z+4, Z+8, Z+12
Assembler Directives(contd.)
Assume:logical segment name
• Used to tell the assembler the names of the logical
segments to be assumed for different segments used in
program.
• You must tell the assembler that what to assume for any
segment you use in the program.
• Example, ASSUME CS: CODE tells the assembler that the
instructions for the program are in segment named CODE,
and hence the CS register is to be loaded with the segment
address allotted by the operating system for label CODE.
• ASSUME DS:DATA indicates that data items related to the

program are available in logical segment named DATA.
• Segment initialization
116
END – End the program
•To tell the assembler to stop fetching the instruction and end
the program execution
•END is placed after the last statement of a program to tell the
assembler that this is the end of the program module.
•The assembler will ignore any statement after an END
directive. Carriage return is required after the END directive
•ENDS - This ENDS directive is used with name of the
segment to indicate the end of that logic segment.
•ENDP - ENDP directive is used along with the name of the
procedure to indicate the end of a procedure to the assembler
117
Example:
 CODE SEGMENT ;Here it Starts the logic
segment containing code
Some instructions statements to perform the logical
operation
 CODE ENDS ;End of segment named as CODE
 Example:
 SQUARE_NUM PROCE ; It start the procedure
Some steps to find the square root of a number
 SQUARE_NUM ENDP ;Here it is the End for the
procedure
118
Assemble Directives
SEGMENT : Used to indicate the beginning of a code/ group of
data/ group of instructions to be put together in a particular
segment and is called logical segment .
The started segment is also assigned a name i.e label by this
statement.
Can use labels upto 31 characters , Spaces not allowed but

underscore can be used in between
General form:
Segnam SEGMENT
…
… Program code
… or
… Data Defining Statements
…
…
Segnam ENDS
User defined name of the

segment 119
• EVEN – This EVEN directive instructs the assembler to
increment the location of the counter to the next even address
if it is not already in the even address
• If the word is at even address 8086 can read a memory in 1 bus cycle.
– If the word starts at an odd address, the 8086 will take 2 bus cycles to
get the data.
– A series of words can be read much more quickly if they are at even
address.
– When EVEN is used the location counter will simply incremented to
next address and NOP instruction is inserted in that incremented
location.
• Example:
DATA1 SEGMENT
SALES DB 9 DUP(?) ;declare an array of 9 bytes
EVEN ; increment location counter to 000AH
RECORD DW 100 DUP( 0 ) ;Array of 100 words will start from an even
address for quicker read
DATA1 ENDS
120
• EQU - This EQU directive is used to assign a label with a
value or a symbol. Each time the assembler finds the name
in the program, it will replace the name with the value or
symbol you give to that name.
– Example:
• FACTOR EQU 03H ; you have to write this statement at the
starting of your program and later in the program you can use this
as follows
• ADD AL, FACTOR ; When it codes this instruction the assembler
will code it as ADD AL, 03H
• The advantage of using EQU in this manner is, if FACTOR is

used many no of times in a program and you want to change
the value, all you have to do is change the EQU statement at
beginning, it will change the rest .
121
EQU Directive
EQU – Equate
•It is just to reduce the recurrence of the numerical values
or constants in a program code
•name EQU expression
– expression can be string or numeric
– Use < and > to specify a string EQU
– these symbols cannot be redefined later in the
program
sample EQU 7Fh;assigns 7FH with label
sample
aString EQU <1.234>
message EQU <This is a message>
• EXTRN: External and PUBLIC: public
– The directive EXTERN informs the assembler that the
names, procedures and labels declared after this directive
have already been defined in some other assembly
language modules.
MODULE 1 SEGMENT
PUBLIC FACTORIAL FAR
MODULE 1 ENDS
MODULE 2 SEGMENT
EXTRN FACTORIAL FAR
MODULE 2 ENDS
GROUP: Group the Related Segment
– This directive is used to form logical groups of segments
with similar purpose or type.
– This directive is used to inform the assembler to form a
logical group of the following segment names.
• PROGRAM GROUP CODE, DATA, STACK 123
• PUBLIC
– The PUBLIC directive is used along with the EXTRN directive.
– This informs the assembler that the labels, variables constants, or
procedures declared PUBLIC may be accessed by other assembly
modules to form their codes, but while using the PUBLIC declared
labels, variables, constants or procedures the user must declare them
externals using the extern directive.
• SEGMENT: Logical Segment

– The SEGMENT directive marks the starting of logical segment.
– The start of a segment is also assigned a name, i.e. label, by this
statement.
• EXE.CODE SEGMENT GLOBAL
;Start of segment named EXE.CODE, that can be accessed by
any other module.
• EXE.CODE ENDS ; End of EXE.CODE logical segment.
124
• LOCAL
– The labels, variables, constants or procedures declared LOCAL in a
module are to be used only by the particular module.
– LOCAL a, b, DATA, ARRAY, ROUTINE
• NAME: Logical Name of a Module
– The NAME directive is used to assign a name to an assembly
language program module.
• The module, may now be referred to by its declared name.
• ORG: Origin
– The ORG directives directs the assembler to start the memory
allotment for the particular segments, block or code from the declared
address in the ORG statement.
– If an ORG 200H address in code segment is present at the starting of
the code segment of that module then the code will start from 200H
address in code segment
125
• .
• PROC: Procedure
– The PROC directives marks the start of named procedure in the
statement.
– Also the types NEAR or FAR specify the type the procedure i.e.
whether it is to be called by the main program located within 64k of
physical memory or not.
• PTR: Pointer
– The POINTER operator is used to declare the type of a label, variable
or memory operand.
– The operator PTR prefixed by either BYTE or WORD.
– If prefix is byte then the particular label, variable or memory operand is
treated as an 8-bit quantity, while if word is the prefix, then it is treated
as a 16-bit quantity.
MOV AL, BYTE PTR [SI]
INC BYTE PTR [BX]
MOV BX,, BYTE PTR [2000H]
INC WORD PTR [3000H]
126
• GLOBAL
– The labels, variables, constants or procedures declared GLOBAL may
be used by other modules of the program. Once a variable is declared
GLOBAL, it can be used by any module in the program.
ROUTINE PROC GLOBAL
• FAR PTR
– This directive indicates the assembler that the label following FAR
PTR is not available within the same segment and the address of the
label is of 32- bits i.e. 2-bytes offset followed two byte segment
address.
JMP FAR PTR LABEL
CALL FAR PTR ROUTINE
• NEAR PTR
– This directive indicates that the label following NEAR PTR is in the
same segment and needs only 16-bit i.e. 2-byte offset to address it.
JMP NEAR PTR LABEL
CALL NEAR PTR ROUTINE
127
•SHORT
– The SHORT operator indicates to the assembler that only one byte is
required to code the displacement for a jump (i.e. displacement is
within -128 to +127 bytes from address of the byte next to the jump
opcode).
• JMP SHORT LABEL
•OFFSET: Offset of a Label
– When the assembler comes across the OFFSET operator along with a
label, it first computes the 16-bit displacement (also called as offset
interchangeably) of the particular label, and replaces the string
OFFSET LABEL by the computed displacement. This operator is used
with arrays, strings, labels and procedures to decide their offset in
their default segments.
• CODE SEGMENT
• MOV SI, OFFSET LIST
• CODE ENDS
• DATA SEGMENTS
• LIST DB 10H
• DATA ENDS
128
• LABEL: label
– The Label directive is used to assign a name to the
current content of the location counter.
– When the assembly process starts, the assembler
initializes a location counter to keep track of memory
location assigned to the program.
• LENGTH: Byte Length of a label

– This directive is not available in MASM.
– This is used to refer to the length of data array or string.
– MOV CX, LENGTH ARRAY
129
Assemble Directives
EXAMPLES
ORG 1000H Informs the assembler that the statements

following ORG 1000H should be stored in
memory starting with effective address 1000H
LOOP EQU 10FEH Value of variable LOOP is 10FEH
_SDATA SEGMENT In this data segment, effective address of

ORG 1200H memory location assigned to A will be 1200H
A DB 4CH and that of B will be 1202H and 1203H.
EVEN
B DW 1052H
_SDATA ENDS
130
8086 Microprocessor
Assemble Directives
PROC
procname PROC[NEAR/ FAR]
ENDP
FAR …
… Program statements of the
NEAR … procedure
RET Last statement of the

procedure
procname ENDP
User defined name of the

procedure
131
Assemble Directives
Examples:
ADD64 PROC NEAR The subroutine/ procedure named ADD64 is

declared as NEAR and so the assembler will code
… the CALL and RET instructions involved in this
… procedure as near call and return
…
RET
ADD64 ENDP
CONVERT PROC The subroutine/ procedure named

FAR CONVERT is declared as FAR and so the assembler
will code the CALL and RET instructions involved in
… this procedure as far call and return
…
…
RET
CONVERT ENDP
132
8086 Microprocessor
Assemble Directives
Reserves one memory location for 8-bit
SHORT signed displacement in jump instructions
Example:
JMP SHORT AHEAD The directive will reserve one memory

location for 8-bit displacement named
AHEAD
133
8086 Microprocessor
Assemble Directives
MACRO Indicate the beginning of a macro
MACRO
ENDM ENDM End of a macro
General form:
macroname MACRO[Arg1, Arg2

...] Program
statements in
… the macro
…
…
macroname ENDM
User defined name of

the macro
134
Program Example
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; ;
; This is an example program. It prints the ;
; character string "Hello World" to the DOS standard output ;
; using the DOS service interrupt, function 9. ;
; ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
hellostk SEGMENT BYTE STACK 'STACK' ;Define the stack segment
DB 100h DUP(?) ;Set maximum stack size to 256 bytes (100h)
hellostk ENDS
hellodat SEGMENT BYTE 'DATA' ;Define the data segment

dos_print EQU 9 ;define a constant via EQU
strng DB 'Hello World',13,10,'$' ;Define the character string
hellodat ENDS
hellocod SEGMENT BYTE 'CODE' ;Define the Code segment

START: mov ax, SEG hellodat ;ax <-- data segment start address
mov ds, ax ;ds <-- initialize data segment register
mov ah, dos_print ;ah <-- 9 DOS 21h string function
mov dx,OFFSET strng ;dx <-- beginning of string
int 21h ;DOS service interrupt
mov ax, 4c00h ;ax <-- 4c DOS 21h program halt function
int 21h ;DOS service interrupt
hellocod ENDS
END START ; ‘END label’ defines program entry

3 8086 Instructions

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Microprocessors and Peripherals

• The first field is called is as operation code field or opcode

• The instruction format also contains other field also known as

• CPU executes the instruction using the information which

– DS is the default data segment register when a data is to be referred

3. Register to/from Memory with no Displacement:

Register to/from Memory with no Displacement:

Register to /from Memory with Displacement:

Immediate Operand to register:

Immediate Operand to Memory with 16-bit displacement:

(Opcode) (Destination operand) (Source operand )

LABEL: INSTRUCTION ; COMMENT

– In this example, 0005H is the immediate data. The immediate data

2. Direct In the direct addressing mode, a 16-bit memory

– Here data resides in a memory location in the data segment, whose

4. Register Indirect: Sometimes the address of memory location which

Example: MOV AX,[BX]

– The default segment is either DS or ES.

Example: MOV AX, [BX] [SI]

Example: MOV AX, 50H [BX] [SI]

For the control transfer instructions, the addressing mode

Example: JMP [BX]; jump to effective address stored in BX register.

11.Intersegment Direct: In this mode, the address to which the control is

Example JMP 5000H :2000H;

Example JMP [2000H];

1. Data Copy/Transfer Instruction: These are used to transfer data

MOV AX, 5000H; Immediate

MOV DS, 5000H; Not permitted (invalid)

– Thus to transfer an immediate data in to the segment register, we perform the

MOV AX, 5000H

MOV op1, op2

 MOV CX, 037AH ; MOV 037AH into the CX.

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

MOV reg2/ mem, reg1/ mem

MOV reg2, reg1 (reg2)  (reg1)

MOV reg/ mem, data

MOV reg, data (reg)  data

XCHG reg2/ mem, reg1

XCHG reg2, reg1 (reg2)  (reg1)

• MOV BYTE PTR [0200h],10h

To move value

Given only offset where to put value, it will

• Since, x86’s byte

– XCHG [5000H], AX; This instruction exchanges data between AX and a

• IN: Input the port

XCHG Exchange XCHG D,S (S) (D) None

 A_TO_D EQU 4AH

 MOV DX, 0FF78H ; Initialize DX point to port

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

IN A, [DX] OUT [DX], A

IN AL, [DX] PORTaddr = (DX) OUT [DX], AL PORTaddr = (DX)

IN AX, [DX] PORTaddr = (DX) OUT [DX], AX PORTaddr = (DX)

IN A, addr8 OUT addr8, A

IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)

IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)

Assume (DS) = 0300H, (BX)=0100H, and (AL)=0DH

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

PUSH reg16/ mem

PUSH reg16 (SP)  (SP) – 2

PUSH mem (SP)  (SP) – 2

POP reg16/ mem

POP reg16 MA S = (SS) x 1610 + SP