DESIGN OF HAMMING CODE USING VERILOG

Presented By: Guide:

Devanshu Anand Dr. Jamuna S.
Yuvraj Singh (Prof. ECE Dept. DSCE, Bangalore)
CONTENTS

• Introduction

• Design of (n,k,t) Hamming Code

• The (11,7,1)Hamming Code

• Calculation of parity (“r”) values

• Error Detection and Correction

• HDL Programming

• Simulation Results

• Conclusion
INTRODUCTION

• As compared to analog circuits, digital circuits are much more immune to

noise,but they are not completely immune from interference.

• The effect of interference is occasionally to change the value of a signal from 0 to

1 or from 1 to 0.This is called bit flip.This causes bit errors in memory.

• Some errors are transient,called soft errors and errors that persist in a memory
circuit are called hard errors.

• In mathematics, digital communication and information theory, error detection

and correction has great practical importance in maintaining information integrity
across noisy channels.
CONTD.....
• Error coding is considered as a method of detecting and correcting these errors to
ensure that the information is transferred intact from its source to its destination.

• There are various error detection and correction techniques such as Cyclic
Redundancy Checks (CRC), Parity check, LRC, VRC and Hamming Code. This
work focuses on Hamming code.

• Hamming codes can detect and correct a single bit-error in a block of data. In
these codes, every bit is included in a unique set of parity bits.

• Hamming code is an error-correction code that can be used to detect single and
double-bit errors and correct single-bit errors that can occur when binary data is
transmitted from one device into another.
Design of (n,k,t) Hamming Code

• Hamming code is an error-correction code that can be used to detect

single and double-bit errors and correct single-bit errors that can occur
when binary data is transmitted from one device into an-other.

• If our code word has N bits,we need log 2(k+1) additional check bits for
the error correcting code.

• The check bits are computed from the values of the data bits during a
write operation, and the entire ECC.
The (11,7,1) Hamming Code
• Basicaly we are focusing on (11,7,1) Hamming Code using verilog
hardware description language(HDL).
• Here "11" corresponds to the total number of Hamming code bits in a
transmittable unit comprising data bits and redundancy bits, 7 is the
number of data bits while‘1’ denotes the maximum number of error bits in
the transmittable unit.
• For example, a 7-bit ASCII code requires four redundancy bits that can be
added at the end of the data unit or interspersed with the original data bits
to form the (11, 7, 1) Hamming code.
• In Fig. 1, these redundancy bits are placed in positions 1, 2, 4 and 8 (the
positions in an 11-bit sequence that are powers of ‘2’). For clarity in the
examples below, these bits are referred to as ‘r1,’ ‘r2,’ ‘r4’ and ‘r8.’In the
Hamming code, each ‘r’ bit is the parity bit for one combination of data bits
as shown:
• r1: bits 1, 3, 5, 7, 9, 11
• r2: bits 2, 3, 6, 7, 10, 11
• r4: bits 4, 5, 6, 7
• r8: bits 8, 9, 10, 11
CALCULATION OF PARITY(“r”)VALUES

• In the first step, each bit of the

original character is placed in its
appropriate position in the 11-bit unit.
In the subsequent steps, the even
parities for the various bit
combinations are calculated. The
parity value for each combination is
the value of the corresponding ‘r’ bit.
ERROR DETECTION AND CORRECTON
• Suppose that by the time the above
transmission is received, the seventh
bit has changed from ‘1’ to ‘0.’
• The receiver takes the transmission
and recalculates four new parity bits,
using the same sets of bits used by
the sender plus the relevant parity ‘r’
bit for each set.
CONTD...

• Then It assembles the new parity values into a

binary number in the descending order of ‘r’
position (r8, r4, r2, r1). In the given example, this
step gives us the binary number ‘0111’ (‘7’
decimal), which is the precise location of the
corrupted bit.
• Once the bit is identified, the receiver can
complement its value and correct the error. The
beauty of the technique is that it can be easily
implemented in hardware and the code is
corrected before the receiver knows about it.
HDL PROGRAMMING

• Verilog is a general-purpose hardware description language that is easy to

learn and use. It is similar in syntax to the ‘C’ programming language. Verilog
allows different levels of abstraction to be mixed in the same model.

• Thus a designer can define a hardware model in terms of switches, gates,

register transfer level (RTL) or algorithmic/ behavioural code.

• The Hamming Encode is the (11, 7, 1) Hamming code encoder that converts a
7-bit ASCII code into an 11-bit code word and the Hamming_ Decode.v is the
(11, 7, 1) Hamming code decoder that converts an 11-bit code word back into
a 7-bitASCII code after correcting the single bit error, if any.
SIMULATION RESULTS

• Both these programs have been developed in Verilog HDL

and simulated using Xlinx ISE 14.3. The simulated outputs of
the encoder and the decoder are shown.
Encoder
Decoder
RTL SCHEMATIC

ENCODER DECODER
IMPLEMENT DESIGN
CONCLUSION

• The hamming code for the given bit sequence is written and the wave form is
observed , the input sequence is of 4 bit, 2r >= k+r+1 => r = 4, (11,7,1) therefore
redundant bits are 4 r1,r2,r3,r4 , hamming code sequence is of 11 in length. In the
7th bit error has occurred, once the bit is identified, we can complement its value
and correct the error. The encoder and decoder Verilog code are written , in Xilinx
we got the required o/p and the decoded bit sequence is matching.The Hamming
encoding and decoding both are verified for different data input in the format
(11,7,1) in both simulation and implementation in FPGA.
THANK YOU