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TOPIC 1
Introduction to Integrated
Circuit
2
Introduction to Integrated Circuit
What is an Integrated Circuit ?
3
Introduction to Integrated Circuit
4
Introduction to Integrated Circuit
– Evolution of logic complexity in IC
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Transistor Revolution
• Dr. John Bardeen, Dr. Walter Brattain, and Dr. William
Shockley discovered the transistor effect and developed the
first device in December, 1947. They were members of the
technical staff at Bell Laboratories in Murray Hill, NJ. They
were awarded the Nobel Prize in physics in 1956.
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Transistor Revolution
• Jack Kilby completed his first integrated circuit on
September 12, 1958 which was actually constructed
on germanium rather than silicon, as he could not find
a suitable piece of silicon at the time.
• The integrated circuit was fully functional, and Texas
Instrument officially announced it in January 1959.
1962 Fairchild IC 10
MOSFET TECHNOLOGY
• MOSFET transistor was first proposed and patented by Lilienfeld
(Canada) in 1925 and Heil (England) in 1935.
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Moore’s Law
13
Moore’s Law
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Evolution in DRAM Chip Capacity
15
Die Size Growth
16
Power Density
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Issues in Digital IC Design
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QUALITY DESIGN METRICS IN DIGITAL DESIGN
• Functionality
• Cost
– NRE (fixed) costs - design effort
– RE (variable) costs - cost of parts, assembly, test
• Reliability, robustness
– Noise margins
– Noise immunity
• Performance
– Speed (delay)
– Power consumption; energy
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• NRE (non-recurring engineering) costs
– Fixed cost to produce the design
• design effort
• design verification effort
• mask generation
– Influenced by the design complexity and designer
productivity
– More pronounced for small volume products
• Recurring costs – proportional to product volume
– Silicon processing
• also proportional to chip area
– Assembly (packaging)
– Test
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• Prime requirement –
IC performs the function it is designed for
• Normal behaviour deviates due to
– variations in the manufacturing process (dimensions and
device parameters vary between runs and even on a
single wafer or die)
– presence of disturbing on- or off-chip noise sources
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• from two wires placed side by side • from noise on the power
– inductive coupling and ground supply rails
• current change on one wire can – can influence signal
influence signal on the neighbouring levels in the gate
wire
– capacitive coupling
• voltage change on one wire can
influence signal on the neighbouring
wire
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• cross talk
in out
VOH , VIH - nominal high
voltage
VOL, VIL - nominal low
voltage
VM – gate or switching
threshold voltage
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Noise Margins is a measure of the
sensitivity of a gate to noise.
25
For robust circuits, we want the “0” and
“1” intervals to be as large as possible.
v0 v1 v2 v3 v4 v5 v6
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The signal voltage gradually The signal does not converge to
converges to the nominal signal any of the nominal voltage levels
after a number of inverter stages, but to an intermediate voltage
as indicated by the arrows. level. Hence, the characteristic is
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nonregenerative.
• Noise margin expresses the ability of a circuit to
overpower a noise source.
– noise sources: supply noise, cross talk, interference,
offset.
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• A gate must be unidirectional: changes in an output
level should not appear at any unchanging input of the
same circuit.
– In real circuits full directivity is an illusion (e.g., due to capacitive
coupling between inputs and outputs).
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Fan-out – number of load gates
connected to the output of the
driving gate.
o gates with large fan-out are slower
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• The ideal gate should have:
– infinite gain in the transition region
– a gate threshold located in the middle of the logic swing
– high and low noise margins equal to half the swing
– input and output impedances of infinity and zero, respectively.
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Performance
• The performance of a digital circuit is
expressed by the propagation delay and
the power consumption of a gate.
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• The propagation delay, tp of a gate defines
how quickly it responds to a change at its
input(s).
• It expresses the delay experienced by a
signal when passing through a gate.
• It is measured between the
50% transition points of the
input and output waveforms.
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35
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• Power consumption: how much energy is consumed
per operation and how much heat the circuit dissipates.
– supply line sizing (determined by peak power)
Ppeak = Vdd ipeak
– battery lifetime (determined by average power dissipation)
p(t) = v(t)i(t) = Vddi(t)
Pavg= 1/T ∫ p(t) dt = Vdd/T ∫ idd(t) dt
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• Propagation delay and the power consumption of a
gate are related – when a gate operates at high
speed, it will consume more power.
38
• Digital integrated circuits have come a long
way and still have quite some potential left for
the coming decades.