Advanced Computer Architecture

Unit-1
Introduction
Lecture-2
Sisir Kumar Jena
Asst. Professor
DIT University
How an Instruction gets Executed?

Instruction Fetch Obtained instruction from program storage Fetch

Instruction Decode Determine required actions and instruction size

Operand Fetch Locate and obtain operand data

Execute Compute Result value or status

Result Store Deposit Result in storage for later use

Next Instruction Determine successor instruction

How an instruction gets executed?
RAM

MAR MDR

IR PC ACC

CONTROL ALU

CLOCK
Instruction Fetch
RAM
• Address of the next instruction
is transferred from PC to MAR.
MAR MDR
• The instruction is located in
Memory

IR PC ACC

CONTROL ALU

CLOCK
Instruction Fetch
RAM • Instruction is copied from
memory to MDR
MAR MDR

IR PC ACC

CONTROL ALU

CLOCK
Decode the Instruction
RAM • Instruction is transferred to
and decoded in the IR
MAR MDR

IR PC ACC

CONTROL ALU

CLOCK
Execute the Instruction
RAM • Control unit sends signals to
appropriate devices to cause
execution of the instruction.
MAR MDR

IR PC ACC

CONTROL ALU

CLOCK
Parallel Computing
• Serial Computing VS Parallel Computing

Problem

Program

In I2 I1 CPU
Parallel Computing
• What is Parallel Computing?

Problem-n Problem-2 Problem-1

CPU-n CPU-2 CPU-1

Flynn’s Classification
• Michael Flynn (1972) introduced a classification of various computer
architectures based on notions of :
• Instruction Stream: is the sequence of instructions as executed by the
machine
• Data Stream: is a sequence of data including input, or partial or temporary
result, called by the instruction Stream.
• Classification
• Single Instruction Single Data (SISD)
• Single Instruction Multiple Data (SIMD)
• Multiple Instruction Single Data (MISD)
• Multiple Instruction Multiple Data (MIMD)
Flynn’s Classification(cont.)
• SISD Uniprocessor Architecture

Instruction Stream

Instruction Stream Processing Data Stream Memory

Control Unit
I/O Unit Unit

• Conventional Sequential Machines

SISD
• Represents most serial computers available today.
• Performance can be increased with Pipelining.
• Example:
• IBM 701, CDC 6600, IBM 360/91, PDP VAX11/780
 Flynn’s Classification(cont.)
• Single Instruction Multiple Data Distributed
Memory

Processing Local
Data Stream
Element1 Data Memory1
Stream
Instruction
Stream Data Sets
Control Unit Instruction Loaded from
Stream Host

Program Loaded
from Host Processing Local
Data Stream
Elementn Data Memoryn
Stream
SIMD
• Multiple processing elements controlled by a single control unit.
• Each processing units operated on different data
• Instructions are coming from the single control unit
• Example: STARAN, Illiac-IV, BSP
Flynn’s Classification(cont.)
• Multiple Instruction Single Data

Instruction Control Unit1 Control Unit2 Control Unitn

Stream
Instruction Instruction Instruction
Stream Stream Stream
Memory
(Program Processing Processing Processing
and Data) Data Unit1 Data Unit2 Unitn
Data Stream
Stream Stream

I/O Data Stream

• Same Data stream flows through a linear array of processors

executing different instruction streams : known as systolic array
MISD
• Multiple processor works on a single data stream with different
instruction.
• The result of one processor known as intermedia result is act as an
input to the next processor.
• No such architecture is practically available for such architecture.
Flynn’s Classification(cont.)
• Multiple Instruction Multiple Data Instruction
Stream

Control Processing
I/O Unit1 Instruction Unit1 Data
Stream Stream

Shared
Memory

Instruction Data
I/O Control Stream Processing Stream
Unitn Unitn

Instruction
• Parallel Computers Stream
MIMD
• Multiple processing units receives instruction from their control unit
and acts upon different data received from a shared memory.
• Multiple SISD (MSISD)
• Example:
• Cray-2, Univac 1100/80, IBM 370/168 MP
Flynn’s Classification (conclusion)
• Most parallel computers are MIMD (Most popular model)
• SIMD and MIMD are suitable for special-purpose computation.
• MISD – Least popular model
THANK YOU