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Logic gates
Output variables
Sequential circuits:
Consist of logic gates and storage elements
Outputs are a function of the inputs and the state of the storage
elements.
Depend not only on present inputs, but also on past values
Decimal Addition
BCD adder
1-bit Adder (HALF ADDER)
Performs the addition of two binary bits.
Four possible operations:
0+0=0
0+1=1
1+0=1
1+1=10
C1
S0
TWO DIFFERENT IMPLEMENTATIONS OF HALF
ADDER
T IMPLEMENTATIONS OF HALF ADDER
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Full Adder
Full adder (for higher-order bit addition)
Combinational circuit that performs the
additions of 3 bits (two bits and a carry-in
bit)
Ai Bi
1 bit
Ci+1 Ci
full adder
Si
Full Adder (cont.)
The K-maps for
Ai Bi Ci Si Ci+1
Ci+1: BiCi
Ai 0 0 0 0 0
0 0 10 0 0 1 1 0
0 1 0 1 0
0 1 1 1
0 1 1 0 1
1 0 0 1 0
BiCi
Si: 1 0 1 0 1
Ai
0 1 0 1 1 1 0 0 1
1 1 1 1 1
1 0 1 0
Full Adder (cont.)
Boolean equations:
Ci+1 = AiBi + AiCi + BiCi
Si = AiBi’ Ci’ + Ai’Bi’Ci + Ai’BiCi’ + AiBiCi
= Ai Bi Ci
You can design full adder circuit directly from
the above equations (requires 3 ANDs and 1 OR
for Ci+1 and 2 XORs for Si)
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Full Adder using 2 Half Adders
A full adder can also be realized with two half adders and an
OR gate, since Ci+1 can also be expressed as:
Ci+1 = AiBiCi + AiBi’Ci + Ai’BiCi + AiBiCi’
= AiBi + (AiBi’ + Ai’Bi)Ci
= AiBi + (Ai Bi)Ci
and Si = Ai Bi Ci
Ai
Bi Si
Ci+1
Ci
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X S
Z
C
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n-bit Combinational Adders
Perform parallel multi-bit addition
Ripple Carry Adder
Simple design
n-bit Addition
Design an n-bit binary adder which performs the
addition of two n-bit binary numbers and generates a
n-bit sum and a carry out.
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Logic symbol of 8 bit parallel adder (5)
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Four Bit Parallel Subtractor using
Full Adders
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4 bit Parallel Four Bit Adder / Subtractor
Circuit using Full Adders
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HALF SUBTRACTORS
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The truth table and the logic symbol for half subtractor
A’B A’B
AB’
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Di = A B
The Boolean expression for the borrow (B0) output is
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A’B’Bin A’B’Bin
A’BBin’ A’BBin’
A’BBin
AB’Bin’
ABBin ABBin
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Di=
A’B’Bin + A’BBin’ + AB’Bin’ + ABBin
= A’(B’Bin + BBin’) + A(B’ Bin’ + BBin)
= A’(B Bin) + A(B Bin)’
= A B Bin
B0
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Di = A B Bin
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LOGIC DIAGRAM FOR FULL SUBTRACTOR
Di = A B Bin
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Carry Look ahead Adder
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Implement:
C1 = G0+P0 C0
C2 = G1+P1C1 = G1+P1(G0+P0C0) = G1+P1G0+P1P0C0
C3 = G2 + P2C2 = G2+P2G1+P2P1G0+P2P1P0C0
C4 = G3+P3G2+P3P2G1+P3P2P1G0 + P3P2P1P0 C0
= G0-3 + P0-3C0
Group carry generate Group carry propagate
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C3
C2
C1
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BCD Adder
BCD Decimal Adder:
Requires 8 inputs (4 bits per decimal number)
5 outputs indicate the decimal sum and the carry
BCD addition rules: Add 0110 to the sum if it is
greater than 1010 to correct the carry bit
BCD ADDITION (1)…
Procedure:
Step 1: Add the two BCD numbers, using the rules
for binary addition
Step 2: If a 4-bit sum is equal to or less than 9, it is
a valid BCD number.
Step 3: If a 4-bit sum is greater than 9, or if a carry
out of the 4-bit group is generated, it is an invalid
result. Add 6 (0110) to the 4-bit sum in order to
skip the six invalid states and return the code to
8421. If a carry results when 6 is added, simply
add the carry to the next 4-bit group. 43
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CODE CONVERTERS
Code converter is a system which must be
introduced between the two systems if each
uses different codes for the same information.
Code converter is a system which makes two
system compatible even though both uses
different for information.
Code converters are specially used for
protecting private information
Excess-3 and gray codes
Excess-3 code
It is a non weighted code.
In XS-3, numbers are represented as decimal
digits, and each digit is represented by four
bits as the digit value plus 3 (the"excess“
amount).
The primary advantage of XS-3 coding over
non-biased coding is that a decimal number
can be nines' complemented as easily as a
binary number can be ones' complemented.
Self complementary or reflective code
Code Conversion Example
Convert from BCD code to Excess-3 code.
The 6 input combinations not listed are don’t cares.
These values have no meaning in BCD.
We can arbitrary assign them to 1 or 0.
Maps for Code Converter
The six don’t care minterms (10~15) are marked with X.
Maps for Code Converter
Excess-3 to BCD conversion
K map
Gray code
It was named after Frank Gray
It is also called as unit distance code
Gray code is a reflective binary code
Gray codes are non weighted and cyclic codes
Binary to gary conversion
GRAY TO BINARY
Truth table
Binary Comparators
Single bit comparator
A =B =>A’B’ + AB
A > B = >AB’
A< B = >A’B
Two-bit comparator compares two binary bits
2 bit comparator
Multiplexer
Digital multiplexers provide the digital
equivalent of analog selector switch.
Multiplexer connects one of n inputs to a
single output line, so that the logical value of
input is transferred to the output.
One of n input selection is determined by
select line m.
n=2m
4:1 multiplexer
Realizing higher order mux using
4:1 and 2:1
Realize 4:1 using 2:1 mux
Realize 8:1 using 4:1 mux
( Exercise)
DECODERS
It is a multiple-input , multiple-output logic
circuit which has n-inputs and 2n outputs.
It converts data from one format to another.
Several forms of decoder are:
2 to 4 line decoder
3 to 8 line decoder
4 to 16 line decoder
2 to 4 decoder with enable signal
Truth table of 3 to 8 decoder
Logic design using decoders
Implement the following function using a 3 to
8 line decoder.
i. F=∑m(0,4,6,7)
DEMUX
• The select lines determine 1 2N
Input Outputs
which output the input is (source) (destinations)
connected to.
• DEMUX Types N
1-to-2 (1 select line) Select
1-to-4 (2 select lines) Lines
1-to-8 (3 select lines)
1-to-16 (4 select lines)
1-to-4 De-Multiplexer (DEMUX)
D0
DEMUX
D1
IN
D2
D3
B A
B A D0 D1 D2 D3
0 0 IN 0 0 0
0 1 0 IN 0 0
1 0 0 0 IN 0
1 1 0 0 0 IN
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