Dominance Fault Collapsing

Definition
• If all tests of fault F2 detect another fault F1, then F2 is said to
dominate F1.
• In summary,
– The n-input boolean gate requires n+1 single stuck at faults to
be modeled
– To collapse faults of a gate , all faults from the output can be
eliminated retaining one type of fault (sa0 for AND and NAND;
sa1 for OR and NOR) on each input and the other type on any
one of the inputs
– The output faults of the NOT gate and the wire can be
removed as long as both faults on the input are retained
– No collapsing is possible for fan out
 Algorithm
1. Reads the .eqf file and picks up one fault from each line and
stores it in a file say .txt file
2. Reads the number of inputs from .lev file
3. Retain all the faults from the primary inputs
4. Drop the fault if its on the output line
5. Pick the fault if its not on any primary input or on any output line
6. If the fault is 0 (.int file) and the gates (.lev file) are either AND or
NAND, see whether the other inputs have a fan out or not . If the
other input doesn’t have fan out drop the fault else retain all the
faults
7. Similarly, if the fault is 1 and the gates are either OR or NOR see
whether the other inputs have a fan out or not. If the other input
doesn’t have fan out drop the fault else retain all the faults
 Results
• The number of faults in the dominance collapsed set is 16 as
compared to 22 of the equivalent collapsed set for circuit C17.
• The number of faults in the dominance collapsed set is 248 as
compared to 301 of the equivalent collapsed set for the circuit
74181(ALU with NAND gates)
All the results have been verified
Demo !!!!
Questions????