Unit 2

MOSFET dc analysis

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 Teaching Methodology Detailing
Lecture Topic Books Page No.
No.
1. Basics of MOS Transistor Operation, 120-123
Construction of n-channel E-MOSFET
2. E-MOSFET characteristics & parameters 124-128
Non-ideal voltage current characteristics
viz. T2:
3. 1. Finite output resistance,
2. Body effect Donald Neaman, 136-139
4. 3. Sub-threshold conduction “Electronic Circuit
4. Breakdown effects Analysis and
5. Temperature effects. Design”,3rd Edition,
Tata Mc Graw Hill.
5. Common source circuit, Load Line & 140-142
Modes of operation 149-150
6. Common MOSFET configurations: DC 151-153
7. Analysis

8. Constant current source biasing 704-706

and 708

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 Transistor

BJT FET IGBT

JFET MOSFET

DMOSFET EMOSFET

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Construction of n-channel E-MOSFET

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The MOS Transistor

Gate Oxide
Gate
Polysilicon Field-Oxide
Source Drain
(SiO2)
n+ n+

p+ stopper
p-substrate

Bulk Contact

CROSS-SECTION of NMOS Transistor

 JFET and MOSFET Transistorsor

Symbol

L = 0.5-10 mm
W = 0.5-500 mm

SiO2 Thickness = 0.02-0.1 mm

Device characteristics depend on L,W, Thickness, doping levels

MOSFET Transistor Fabrication Steps

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 n-channel MOSFET Basic Operation
Operation in the Cutoff region

pn junction:
reverse bias

iD=0
for vGS<Vt0

Schematic

When vGS=0 then iD=0 until vGS>Vt0 (Vt0 –threshold voltage)

n-channel MOSFET Basic Operation
Operation in the Triode Region

For vDS<vGS-Vt0 and vGS>Vt0 the NMOS is operating in the triode region

Resistor like characteristic

(R between S & D,
Used as voltage controlled R)

For small vDS, iD is proportional

to the excess voltage vGS-Vt0
n-channel MOSFET Basic Operation
Operation in the Triode Region


i D  K 2v GS  Vt 0 v DS  v DS
2

W  Kn'
Kn   
L  2
Device parameter Kn’ for
NMOSFET is 50 mA/V2
n-channel MOSFET Basic Operation
Operation in the Saturation Region (vDS is increased)

Tapering
of the
channel
- increments
of iD are
smaller
when
vDS is
larger When vGD=Vt0 then the channel
thickness is 0 and

i D  K vGS  Vt 0 
2
n-channel MOSFET Basic Operation

Example 12.1

An nMOS has W=160 mm, L=2 mm, KP= 50 mA/V2 and Vto=2 V.

Plot the drain current characteristic vs drain to source voltage

 
for vGS=3 V.
i D  K 2v GS  Vt 0 v DS  v DS
2

 W  KP
i D  K vGS  Vt 0  K  
2
L 2
n-channel MOSFET Basic Operation

Example 12.1
Characteristic

Channel length i D  Kv DS
2

modulation
id depends on vDS in
saturation region
(approx: iD =const in
saturation region)
p-channel MOSFET Basic Operation
It is constructed by interchanging the n and p regions of n-
channel MOSFET.

Symbol
Characteristic

How does p-channel

MOSFET operate?
-voltage polarities
-iD current
-schematic
Before electron inversion layer Equivalent circuit After electron inversion lay
formed formed

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Symbols for n-Channel Enhancement-Mode
MOSFET

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 Symbols for P-Channel Enhancement-Mode
MOSFET

Neamen Microelectronics, 4e Chapter 3-12

McGraw-Hill
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 E-MOSFET characteristics & parameters
MOSFET

Non saturation region VDS<VDS(sat)

saturation region VDS>VDS(sat)

Symbols

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 E-MOSFET characteristics & parameters
MOSFET
 Non Saturation or triode region:
VDS< VDS(sat)
iD  K n [2(VGS  VTN )VGS  VDS ]
2

k ,n W
K n  ConductionParameter  
2 L

 Saturation or triode region:

VDS> VDS (sat)
W  m n C ox 
  V gs  VTN 
2
iD
L 2 
 ox
C ox 
t ox

i D  k n ' V gs  VTN   K n ' V gs  VTN 

W 2 2

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Non-ideal voltage current characteristics

1. Finite output resistance ( in Saturation Region)

2. Body effect

3.Sub-threshold conduction

4. Breakdown effects

5.Temperature effects.

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Non-ideal voltage current characteristics
1. Finite output resistance ( in Saturation Region):

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Non-ideal voltage current characteristics
1. Finite output resistance ( in Saturation Region):

iD  K n VGSQ  VTN  (1  VDS )............(1)

2

 = Channel Length Modulation Parameter

From above graph the : For ID=0; (1  VDS )  0
VDS= - 1/
VDS=-VA
i D 1
ro  ( ) | VDS  Cons tan t
VDS
By diff. of equation 1 w.r.to VDS

ro  [K n VGSQ  VTN  ]1

2

1 V
ro  [I DQ ] 1   A .................(2)
I DQ I DQ

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 2. Body Effect

When two transistors are conducting, None zero drain-to- source voltage on M1
 Source M2 is not at same potential as the substrate
These bias condition means that a reverse – bias voltage exits across source –
Substrate PN junction
 Change in Source –Substrate junction voltage that change in Threshold voltage
 This is called the body effect.

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3. Subthreshold Condition

iD  K n Vgs  VTN 
2

Taking Square root on both side

id  Kn (VGS  VTN )
id Is linear function of VGS

As VGS< VTN : Id is not zero which is called

sub threshold conduction
Significant power dissipation may take place
for non conduction of more no. of MOSFET
on IC.

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4. Break down Effects
 Drain to Substrate PN junction may break down if applied voltage is
too High.( Avalanche Breakdown)

 Punch Through Effect – When drain voltage is large enough for the
depletion region.

 Near Avalanche or Snapback Break down – These are due to second

order effects within the MOSFET.

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5. Temperature Effects
 VTN and KN are function of temperature

 Magnitude of VTN decreases as Temperature increases and ID increases for the

applied VGS

 Kn is directly preoperational with Mobility of charge carrier in an inversion layer.

 As temp. increase the charge carrier starts vibrating which reduces their mobility.

 Kn reduces and drain current reduces

 Temp. depends of Kn is more as compared to VTN and overall ID reduces for

applied VGS

 The above action produces the negative feedback condition in MOSFET.

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Common source circuit, Voltage divider
biasing

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 Common MOSFET configurations: DC
Analysis
Vgs is the voltage that falls across the gate and
the source of the mosfet transistor. It is crucial
to calculate because in order to solve for Ids,
the current from the drain to the source,Vgs
must be known.

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Kn and Vtn are normally givens that you just plug into the
equation.
Once you solve for Ids, you will get two currents from solving that
quadratic equation. The current that produces a Vgs which is
greater than Vtn is the real current of the circuit and the other
should be eliminated.
Now we calculate Vds and the Q-point:

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