 Unsigned numbers are defined as data in

which all the bits are used to represent data,

and no bits are set aside for the positive or
negative sign. This means that the operand
can be between 00 and FFH (0 to 255
decimal) for 8-bit data.
 In the 8051, in order to add numbers together,
the accumulator register (A) must be involved.
The form of the ADD instruction is
ADD A, source ; A = A + source

 The instruction ADD is used to add two

operands. The destination operand is always in
register A while the source operand can be a
register, immediate data, or in memory.
Remember that memory-to-memory arithmetic
operations are never allowed in 8051 Assembly
language. The instruction could change any of
the AF, CF, or P bits of the flag register,
depending on the operands involved.
 Two numbers are stored in registers R0 and
R1. Verify if their sum is greater than FFH.
 MOV A, R0; move first number in A
 ADD A, R1; add second number to it
 JC MESSAGE; is sum>FFH, CY=1
 SJMP NEXT if CY=0, exit
 MESSAGE: MOV A,#’Y’;if CY=1 move Y into A
 MOV P1,A; send the message ‘Y’ in P1
 NEXT: NOP; do nothing
 END; end of file
 Chapter 2 contained a program that added 5
bytes of data. The sum was purposely kept
less than FFH, the maximum value an 8-bit
register can hold. To calculate the sum of any
number of operands, the carry flag should be
checked after the addition of each operand.
Example 6-2 uses R7 to accumulate carries
as the operands are added to A.
 Assume that RAM locations 40 – 44 have the
following values. Write a program to find the
sum of the values. At the end of the program,
register A should contain the low byte and R7
the high byte. All values are in hex.

 40=(7D) 41=(EB) 42=(C5) 43=(5B) 44=(30)

 When adding two 16-bit data operands, we
need to be concerned with the propagation of
a carry from the lower byte to the higher
byte. The instruction ADDC (add with carry) is
used on such occasions. For example, look at
the addition of 3CE7H + 3B8DH, as shown
below.
 Write a program to add two 16-bit numbers.
The numbers are 3CE7H and 3B8DH. Place
the sum in R7 and R6; R6 should have the
lower byte.
 Add two 32 bit numbers stored in RAM
locations.
 Let the 32 bit numbers be 01453BC0H and
56C705FEH and let them be stored in RAM
locations as shown below:
Address Data Address Data
40H C0H 50H FEH
41H 3BH 51H 05H
42H 45H 52H C7H
43H 01H 53H 56H
 The result of addition will be at least 4 bytes
long. If R0 and R1 (of bank 0 by default) are
used as pointers to the addends, there is no
other register available to act as pointer to
the result. Hence it will be necessary to use
R0 of the second register bank. Observe how
the banks are switched
 CLR C
 MOV R2, #04H
 MOV R0, #40H
 MOV R1,#50H
 SETB PSW.3
 MOV R0,#60H
 CLR PSW.3
 BACK: MOV A, @R0
 ADDC A,@R1
 INC R0
 INC R1
 SETB PSW.3
 MOV @R0,A
 INC R0
 CLR PSW.3
 DJNZ R2,BACK
 The result of addition will be stored in RAM
as:
Address Data
60H BEH
61H 41H
62H OCH
63H 58H
 BCD stands for binary coded decimal. BCD is
needed because in everyday life we use the
digits 0 to 9 for numbers, not binary or hex
numbers. Binary representation of 0 to 9 is
called BCD. In computer literature one
encounters two terms for BCD numbers, (1)
unpacked BCD, and (2) packed BCD. We
describe each one next.
BCD code
 In unpacked BCD, the lower 4 bits of the
number represent the BCD number, and the
rest of the bits are 0. For example, “0000
1001″ and “0000 0101″ are unpacked BCD
for 9 and 5, respectively. Unpacked BCD
requires 1 byte of memory or an 8-bit
register to contain it.
 In packed BCD, a single byte has two BCD
numbers in it, one in the lower 4 bits, and one in
the upper 4 bits. For example, “0101 1001″ is
packed BCD for 59H. It takes only 1 byte of
memory to store the packed BCD operands. And
so one reason to use packed BCD is that it is
twice as efficient in storing data.

 There is a problem with adding BCD numbers,

which must be corrected. The problem is that
after adding packed BCD numbers, the result is
no longer BCD. Look at the following.
Adding these two numbers gives 0011 111 IB (3FH), which is
not BCD! A BCD number can only have digits from 0000 to
1001 (or 0 to 9). In other words, adding two BCD numbers
must give a BCD result. The result above should have been 17
+ 28 = 45 (0100 0101). To correct this problem, the
programmer must add 6 (0110) to the low digit: 3F + 06 =
45H. The same problem could have happened in the upper
digit (for example, in 52H + 87H = D9H). Again to solve this
problem, 6 must be added to the upper digit (D9H + 60H =
139H) to ensure that the result is BCD (52 + 87 = 139). This
problem is so pervasive that most microprocessors such as
the 8051 have an instruction to deal with it. In the 8051 the
instruction “DA A” is designed/to correct the BCD addition
problem. This is discussed next.
 The DA (decimal adjust for addition)
instruction in the 8051 is provided to correct
the aforementioned problem associated with
BCD addition. The mnemonic “DA” has as its
only operand the accumulator “A”. The DA
instruction will add 6 to the lower nibble or
higher nibble if needed; otherwise, it will
leave the result alone. The following example
will clarify these points.
After the program is executed, register A will contain 72H
(47 + 25 = 72). The “DA” instruction works only on A. In
other words, while the source can be an operand of any
addressing mode, the destination must be in register A in
order for DA to work. It also needs to be emphasized that
DA must be used after the addition of BCD operands and
that BCD operands can never have any digit greater than
9. In other words, A – F digits are not allowed. It is also
important to note that DA works only after an ADD
instruction; it will not work after the INC instruction.
 Assume that 5 BCD data items are stored in
RAM locations starting at 40H, as shown
below. Write a program to find the sum of all
the numbers. The result must be in BCD.

 40= (71) 41=(11) 42=(65) 43=(59) 44=(37)

 SUBB A, source ; A=A-source-CY
 In many microprocessors there are two different
instructions for subtraction: SUB and SUBB
(subtract with borrow). In the 8051 we have only
SUBB. To make SUB out of SUBB, we have to make
CY = 0 prior to the execution of the instruction.
Therefore, there are two cases for the SUBB
instruction: (1) with CY = 0, and (2) with CY = 1.
First we examine the case where CY = 0 prior to
the execution of SUBB. Notice that we use the CY
flag for the borrow.
 In subtraction, the 8051 microprocessors
(indeed, all modern CPUs) use the 2′s
complement method. Although every CPU
contains adder circuitry, it would be too
cumbersome (and take too many transistors) to
design separate subtracter circuitry. For this
reason, the 8051 uses adder circuitry to perform
the subtraction command. Assuming that the
8051 is executing a simple subtract instruction
and that CY = 0 prior to the execution of the
instruction, one can summarize the steps of the
hardware of the CPU in executing the SUBB
instruction for unsigned numbers, as follows.
 Take the 2′s complement of the subtrahend (source
operand).

 Add it to the minuend (A).

 Invert the carry.

 These three steps are performed for every SUBB

instruction by the internal hardware of the 8051 CPU,
regardless of the source of the operands, provided
that the addressing mode is supported. After these
three steps the result is obtained and the flags are
set. Example 6-5 illustrates the three steps.
 If CY = 0 after the execution of SUBB, the
result is positive; if CY=1 the result is
negative and the destination has the 2’s
complement of the result. Normally the result
is left in 2’s complement, but the CPL
(complement) and INC (increment)instructions
can be used to change it.
 This instruction is used for multibyte
numbers and will take care of the borrow of
the lower operand. If CY = 1 prior to
executing the SUBB instruction, it also
subtracts 1 from the result. See Example 6-7.
 Analyze the following program:
 After the SUBB, A = 62H – 96H = CCH and the
carry flag is set high indicating there is a
borrow. Since CY = 1, when SUBB is executed
the second time A = 27H – 12H -1 = 14H.
Therefore, we have 2762H – 1296H = 14CCH.
 Student Home Work